src/southbridge/amd/sb700/sb700_lpc.c

   1 /*
   2  * This file is part of the coreboot project.
   3  *
   4  * Copyright (C) 2010 Advanced Micro Devices, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * This program is distributed in the hope that it will be useful,
  11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13  * GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this program; if not, write to the Free Software
  17  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  18  */
  19
  20 #include <console/console.h>
  21 #include <device/device.h>
  22 #include <device/pci.h>
  23 #include <device/pnp.h>
  24 #include <device/pci_ids.h>
  25 #include <device/pci_ops.h>
  26 #include <pc80/mc146818rtc.h>
  27 #include <pc80/isa-dma.h>
  28 #include <bitops.h>
  29 #include <arch/io.h>
  30 #include <arch/ioapic.h>
  31 #include "sb700.h"
  32
  33 static void lpc_init(device_t dev)
  34 {
  35         u8 byte;
  36         u32 dword;
  37         device_t sm_dev;
  38
  39         /* Enable the LPC Controller */
  40         sm_dev = dev_find_slot(0, PCI_DEVFN(0x14, 0));
  41         dword = pci_read_config32(sm_dev, 0x64);
  42         dword |= 1 << 20;
  43         pci_write_config32(sm_dev, 0x64, dword);
  44
  45         /* Initialize isa dma */
  46 #if CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT
  47         printk(BIOS_DEBUG, "Skipping isa_dma_init() to avoid getting stuck.\n");
  48 #else
  49         isa_dma_init();
  50 #endif
  51
  52         /* Enable DMA transaction on the LPC bus */
  53         byte = pci_read_config8(dev, 0x40);
  54         byte |= (1 << 2);
  55         pci_write_config8(dev, 0x40, byte);
  56
  57         /* Disable the timeout mechanism on LPC */
  58         byte = pci_read_config8(dev, 0x48);
  59         byte &= ~(1 << 7);
  60         pci_write_config8(dev, 0x48, byte);
  61
  62         /* Disable LPC MSI Capability */
  63         byte = pci_read_config8(dev, 0x78);
  64         byte &= ~(1 << 1);
  65         pci_write_config8(dev, 0x78, byte);
  66 }
  67
  68 static void sb700_lpc_read_resources(device_t dev)
  69 {
  70         struct resource *res;
  71
  72         /* Get the normal pci resources of this device */
  73         pci_dev_read_resources(dev);    /* We got one for APIC, or one more for TRAP */
  74
  75         pci_get_resource(dev, 0xA0); /* SPI ROM base address */
  76
  77         /* Add an extra subtractive resource for both memory and I/O. */
  78         res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
  79         res->base = 0;
  80         res->size = 0x1000;
  81         res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE |
  82                      IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  83
  84         res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
  85         res->base = 0xff800000;
  86         res->size = 0x00800000; /* 8 MB for flash */
  87         res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE |
  88                      IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  89
  90         res = new_resource(dev, 3); /* IOAPIC */
  91         res->base = IO_APIC_ADDR;
  92         res->size = 0x00001000;
  93         res->flags = IORESOURCE_MEM | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
  94
  95         compact_resources(dev);
  96 }
  97
  98 static void sb700_lpc_set_resources(struct device *dev)
  99 {
 100         struct resource *res;
 101
 102         pci_dev_set_resources(dev);
 103
 104         /* Specical case. SPI Base Address. The SpiRomEnable should be set. */
 105         res = find_resource(dev, 0xA0);
 106         pci_write_config32(dev, 0xA0, res->base | 1 << 1);
 107 }
 108
 109 /**
 110  * @brief Enable resources for children devices
 111  *
 112  * @param dev the device whose children's resources are to be enabled
 113  *
 114  */
 115 static void sb700_lpc_enable_childrens_resources(device_t dev)
 116 {
 117         struct bus *link;
 118         u32 reg, reg_x;
 119         int var_num = 0;
 120         u16 reg_var[3];
 121
 122         reg = pci_read_config32(dev, 0x44);
 123         reg_x = pci_read_config32(dev, 0x48);
 124
 125         for (link = dev->link_list; link; link = link->next) {
 126                 device_t child;
 127                 for (child = link->children; child;
 128                      child = child->sibling) {
 129                         if (child->enabled
 130                             && (child->path.type == DEVICE_PATH_PNP)) {
 131                                 struct resource *res;
 132                                 for (res = child->resource_list; res; res = res->next) {
 133                                         u32 base, end;  /*  don't need long long */
 134                                         if (!(res->flags & IORESOURCE_IO))
 135                                                 continue;
 136                                         base = res->base;
 137                                         end = resource_end(res);
 138                                         printk(BIOS_DEBUG, "sb700 lpc decode:%s, base=0x%08x, end=0x%08x\n",
 139                                              dev_path(child), base, end);
 140                                         switch (base) {
 141                                         case 0x60:      /*  KB */
 142                                         case 0x64:      /*  MS */
 143                                                 reg |= (1 << 29);
 144                                                 break;
 145                                         case 0x3f8:     /*  COM1 */
 146                                                 reg |= (1 << 6);
 147                                                 break;
 148                                         case 0x2f8:     /*  COM2 */
 149                                                 reg |= (1 << 7);
 150                                                 break;
 151                                         case 0x378:     /*  Parallal 1 */
 152                                                 reg |= (1 << 0);
 153                                                 break;
 154                                         case 0x3f0:     /*  FD0 */
 155                                                 reg |= (1 << 26);
 156                                                 break;
 157                                         case 0x220:     /*  Aduio 0 */
 158                                                 reg |= (1 << 8);
 159                                                 break;
 160                                         case 0x300:     /*  Midi 0 */
 161                                                 reg |= (1 << 18);
 162                                                 break;
 163                                         case 0x400:
 164                                                 reg_x |= (1 << 16);
 165                                                 break;
 166                                         case 0x480:
 167                                                 reg_x |= (1 << 17);
 168                                                 break;
 169                                         case 0x500:
 170                                                 reg_x |= (1 << 18);
 171                                                 break;
 172                                         case 0x580:
 173                                                 reg_x |= (1 << 19);
 174                                                 break;
 175                                         case 0x4700:
 176                                                 reg_x |= (1 << 22);
 177                                                 break;
 178                                         case 0xfd60:
 179                                                 reg_x |= (1 << 23);
 180                                                 break;
 181                                         default:
 182                                                 if (var_num >= 3)
 183                                                         continue;       /* only 3 var ; compact them ? */
 184                                                 switch (var_num) {
 185                                                 case 0:
 186                                                         reg_x |= (1 << 2);
 187                                                         break;
 188                                                 case 1:
 189                                                         reg_x |= (1 << 24);
 190                                                         break;
 191                                                 case 2:
 192                                                         reg_x |= (1 << 25);
 193                                                         break;
 194                                                 }
 195                                                 reg_var[var_num++] =
 196                                                     base & 0xffff;
 197                                         }
 198                                 }
 199                         }
 200                 }
 201         }
 202         pci_write_config32(dev, 0x44, reg);
 203         pci_write_config32(dev, 0x48, reg_x);
 204         /* Set WideIO for as many IOs found (fall through is on purpose) */
 205         switch (var_num) {
 206         case 2:
 207                 pci_write_config16(dev, 0x90, reg_var[2]);
 208         case 1:
 209                 pci_write_config16(dev, 0x66, reg_var[1]);
 210         case 0:
 211                 pci_write_config16(dev, 0x64, reg_var[0]);
 212                 break;
 213         }
 214 }
 215
 216 static void sb700_lpc_enable_resources(device_t dev)
 217 {
 218         pci_dev_enable_resources(dev);
 219         sb700_lpc_enable_childrens_resources(dev);
 220 }
 221
 222 static struct pci_operations lops_pci = {
 223         .set_subsystem = pci_dev_set_subsystem,
 224 };
 225
 226 static struct device_operations lpc_ops = {
 227         .read_resources = sb700_lpc_read_resources,
 228         .set_resources = sb700_lpc_set_resources,
 229         .enable_resources = sb700_lpc_enable_resources,
 230         .init = lpc_init,
 231         .scan_bus = scan_static_bus,
 232         .ops_pci = &lops_pci,
 233 };
 234 static const struct pci_driver lpc_driver __pci_driver = {
 235         .ops = &lpc_ops,
 236         .vendor = PCI_VENDOR_ID_ATI,
 237         .device = PCI_DEVICE_ID_ATI_SB700_LPC,
 238 };