1 #include <console/console.h>
4 #include <device/device.h>
5 #include <device/pci.h>
6 #include <device/pci_ids.h>
13 #define BRIDGE_IO_MASK (IORESOURCE_IO | IORESOURCE_MEM)
15 static void pci_domain_read_resources(device_t dev)
17 struct resource *resource;
19 /* Initialize the system wide io space constraints */
20 resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0));
21 resource->limit = 0xffffUL;
22 resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
24 /* Initialize the system wide memory resources constraints */
25 resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0));
26 resource->limit = 0xffffffffULL;
27 resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
30 static void ram_resource(device_t dev, unsigned long index,
31 unsigned long basek, unsigned long sizek)
33 struct resource *resource;
38 resource = new_resource(dev, index);
39 resource->base = ((resource_t)basek) << 10;
40 resource->size = ((resource_t)sizek) << 10;
41 resource->flags = IORESOURCE_MEM | IORESOURCE_CACHEABLE | \
42 IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
45 static void tolm_test(void *gp, struct device *dev, struct resource *new)
47 struct resource **best_p = gp;
48 struct resource *best;
50 if (!best || (best->base > new->base)) {
56 static uint32_t find_pci_tolm(struct bus *bus)
61 search_bus_resources(bus, IORESOURCE_MEM, IORESOURCE_MEM, tolm_test, &min);
63 if (min && tolm > min->base) {
69 #if CONFIG_HAVE_HIGH_TABLES==1
70 #define HIGH_TABLES_SIZE 64 // maximum size of high tables in KB
71 extern uint64_t high_tables_base, high_tables_size;
74 static void pci_domain_set_resources(device_t dev)
79 pci_tolm = find_pci_tolm(&dev->link[0]);
80 mc_dev = dev->link[0].children;
82 /* Figure out which areas are/should be occupied by RAM.
83 * This is all computed in kilobytes and converted to/from
84 * the memory controller right at the edges.
85 * Having different variables in different units is
86 * too confusing to get right. Kilobytes are good up to
87 * 4 Terabytes of RAM...
90 unsigned long tomk, tolmk;
93 /* Get the value of the highest DRB. This tells the end of
94 * the physical memory. The units are ticks of 32MB
97 tomk = ((unsigned long)pci_read_config8(mc_dev, 0x63)) << 15;
98 /* Compute the top of Low memory */
99 tolmk = pci_tolm >> 10;
101 /* The PCI hole does does not overlap the memory.
105 /* Write the ram configuration registers,
106 * preserving the reserved bits.
108 tolm_r = pci_read_config16(mc_dev, 0xc4);
109 tolm_r = ((tolmk >> 10) << 3) | (tolm_r & 0xf);
110 pci_write_config16(mc_dev, 0xc4, tolm_r);
112 /* Report the memory regions */
114 ram_resource(dev, idx++, 0, 640);
115 ram_resource(dev, idx++, 768, tolmk - 768);
117 #if CONFIG_HAVE_HIGH_TABLES==1
118 /* Leave some space for ACPI, PIRQ and MP tables */
119 high_tables_base = (tomk - HIGH_TABLES_SIZE) * 1024;
120 high_tables_size = HIGH_TABLES_SIZE * 1024;
123 assign_resources(&dev->link[0]);
126 static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
128 max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
132 static struct device_operations pci_domain_ops = {
133 .read_resources = pci_domain_read_resources,
134 .set_resources = pci_domain_set_resources,
135 .enable_resources = enable_childrens_resources,
137 .scan_bus = pci_domain_scan_bus,
140 static void cpu_bus_init(device_t dev)
142 initialize_cpus(&dev->link[0]);
145 static void cpu_bus_noop(device_t dev)
149 static struct device_operations cpu_bus_ops = {
150 .read_resources = cpu_bus_noop,
151 .set_resources = cpu_bus_noop,
152 .enable_resources = cpu_bus_noop,
153 .init = cpu_bus_init,
157 static void enable_dev(struct device *dev)
159 struct device_path path;
161 /* Set the operations if it is a special bus type */
162 if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
163 dev->ops = &pci_domain_ops;
166 else if (dev->path.type == DEVICE_PATH_APIC_CLUSTER) {
167 dev->ops = &cpu_bus_ops;
171 struct chip_operations northbridge_intel_i855pm_ops = {
172 CHIP_NAME("Intel 855PM Northbridge")
173 .enable_dev = enable_dev,