2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 #if (CONFIG_DIMM_SUPPORT & 0x000F)!=0x0005 /* not needed for AMD_FAM10_DDR3 */
22 static void print_tx(const char *strval, u32 val)
24 #if CONFIG_DEBUG_RAM_SETUP
25 printk(BIOS_DEBUG, "%s%08x\n", strval, val);
30 static void print_t(const char *strval)
32 #if CONFIG_DEBUG_RAM_SETUP
33 printk(BIOS_DEBUG, "%s", strval);
37 #if (CONFIG_DIMM_SUPPORT & 0x000F)==0x0005 /* AMD_FAM10_DDR3 */
39 #include "../amdmct/wrappers/mcti.h"
40 #include "../amdmct/amddefs.h"
41 #include "../amdmct/mct_ddr3/mwlc_d.h"
42 #include "../amdmct/mct_ddr3/mct_d.h"
43 #include "../amdmct/mct_ddr3/mct_d_gcc.h"
45 #include "../amdmct/wrappers/mcti_d.c"
46 #include "../amdmct/mct_ddr3/mct_d.c"
48 #include "../amdmct/mct_ddr3/mctmtr_d.c"
49 #include "../amdmct/mct_ddr3/mctcsi_d.c"
50 #include "../amdmct/mct_ddr3/mctecc_d.c"
51 #include "../amdmct/mct_ddr3/mctdqs_d.c"
52 #include "../amdmct/mct_ddr3/mctsrc.c"
53 #include "../amdmct/mct_ddr3/mctsdi.c"
54 #include "../amdmct/mct_ddr3/mctproc.c"
55 #include "../amdmct/mct_ddr3/mctprob.c"
56 #include "../amdmct/mct_ddr3/mcthwl.c"
57 #include "../amdmct/mct_ddr3/mctwl.c"
58 #include "../amdmct/mct_ddr3/mport_d.c"
59 #include "../amdmct/mct_ddr3/mutilc_d.c"
60 #include "../amdmct/mct_ddr3/modtrdim.c"
61 #include "../amdmct/mct_ddr3/mhwlc_d.c"
62 #include "../amdmct/mct_ddr3/mctrci.c"
63 #include "../amdmct/mct_ddr3/mctsrc1p.c"
64 #include "../amdmct/mct_ddr3/mcttmrl.c"
65 #include "../amdmct/mct_ddr3/mcthdi.c"
66 #include "../amdmct/mct_ddr3/mctndi_d.c"
67 #include "../amdmct/mct_ddr3/mctchi_d.c"
68 #include "../amdmct/mct_ddr3/modtrd.c"
70 #if CONFIG_CPU_SOCKET_TYPE == 0x10
72 #elif CONFIG_CPU_SOCKET_TYPE == 0x11
74 #include "../amdmct/mct_ddr3/mctardk5.c"
75 #elif CONFIG_CPU_SOCKET_TYPE == 0x12
76 //F (1207), Fr2, G (1207)
77 #include "../amdmct/mct_ddr3/mctardk6.c"
78 #elif CONFIG_CPU_SOCKET_TYPE == 0x13
80 #include "../amdmct/mct_ddr3/mctardk5.c"
82 #elif CONFIG_CPU_SOCKET_TYPE == 0x14
83 #include "../amdmct/mct_ddr3/mctardk5.c"
89 #include "../amdmct/wrappers/mcti.h"
90 #include "../amdmct/amddefs.h"
91 #include "../amdmct/mct/mct_d.h"
92 #include "../amdmct/mct/mct_d_gcc.h"
94 #include "../amdmct/wrappers/mcti_d.c"
95 #include "../amdmct/mct/mct_d.c"
98 #include "../amdmct/mct/mctmtr_d.c"
99 #include "../amdmct/mct/mctcsi_d.c"
100 #include "../amdmct/mct/mctecc_d.c"
101 #include "../amdmct/mct/mctpro_d.c"
102 #include "../amdmct/mct/mctdqs_d.c"
103 #include "../amdmct/mct/mctsrc.c"
104 #include "../amdmct/mct/mctsrc1p.c"
105 #include "../amdmct/mct/mcttmrl.c"
106 #include "../amdmct/mct/mcthdi.c"
107 #include "../amdmct/mct/mctndi_d.c"
108 #include "../amdmct/mct/mctchi_d.c"
110 #if CONFIG_CPU_SOCKET_TYPE == 0x10
112 #include "../amdmct/mct/mctardk3.c"
113 #elif CONFIG_CPU_SOCKET_TYPE == 0x11
115 #include "../amdmct/mct/mctardk4.c"
116 //#elif SYSTEM_TYPE == MOBILE
118 //#include "../amdmct/mct/mctardk5.c"
123 int mctRead_SPD(u32 smaddr, u32 reg)
125 return spd_read_byte(smaddr, reg);
129 void mctSMBhub_Init(u32 node)
131 struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
132 struct mem_controller *ctrl = &( sysinfo->ctrl[node] );
133 activate_spd_rom(ctrl);
137 void mctGet_DIMMAddr(struct DCTStatStruc *pDCTstat, u32 node)
140 struct sys_info *sysinfo = (struct sys_info *)(CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE - CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE);
141 struct mem_controller *ctrl = &( sysinfo->ctrl[node] );
143 for(j=0;j<DIMM_SOCKETS;j++) {
144 pDCTstat->DIMMAddr[j*2] = ctrl->spd_addr[j] & 0xff;
145 pDCTstat->DIMMAddr[j*2+1] = ctrl->spd_addr[DIMM_SOCKETS + j] & 0xff;
151 u32 mctGetLogicalCPUID(u32 Node)
153 /* FIXME: Move this to a more generic place. Maybe to the CPU code */
154 /* Converts the CPUID to a logical ID MASK that is used to check
155 CPU version support versions */
158 u32 family, model, stepping;
161 if (Node == 0xFF) { /* current node */
162 val = cpuid_eax(0x80000001);
164 dev = PA_NBMISC(Node);
165 val = Get_NB32(dev, 0xfc);
168 family = ((val >> 8) & 0x0f) + ((val >> 20) & 0xff);
169 model = ((val >> 4) & 0x0f) | ((val >> (16-4)) & 0xf0);
170 stepping = val & 0x0f;
172 valx = (family << 12) | (model << 4) | (stepping);
215 /* FIXME: mabe we should die() here. */
216 print_err("FIXME! CPU Version unknown or not supported! \n");
223 static u8 mctGetProcessorPackageType(void) {
224 /* FIXME: I guess this belongs wherever mctGetLogicalCPUID ends up ? */
225 u32 BrandId = cpuid_ebx(0x80000001);
226 return (u8)((BrandId >> 28) & 0x0F);
229 static void raminit_amdmct(struct sys_info *sysinfo)
231 struct MCTStatStruc *pMCTstat = &(sysinfo->MCTstat);
232 struct DCTStatStruc *pDCTstatA = sysinfo->DCTstatA;
234 print_debug("raminit_amdmct begin:\n");
236 mctAutoInitMCT_D(pMCTstat, pDCTstatA);
238 print_debug("raminit_amdmct end:\n");