1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <arch/ioapic.h>
4 #include <device/pci.h>
8 #include <cpu/amd/amdk8_sysconf.h>
10 extern unsigned char bus_isa;
11 extern unsigned char bus_8131_0;
12 extern unsigned char bus_8131_1;
13 extern unsigned char bus_8131_2;
14 extern unsigned char bus_8111_0;
15 extern unsigned char bus_8111_1;
16 extern unsigned char bus_8151_0;
17 extern unsigned char bus_8151_1;
18 extern unsigned apicid_8111;
19 extern unsigned apicid_8131_1;
20 extern unsigned apicid_8131_2;
22 extern unsigned sbdn3;
23 extern unsigned sbdn5;
28 static void *smp_write_config_table(void *v)
30 static const char sig[4] = "PCMP";
31 static const char oem[8] = "COREBOOT";
32 static const char productid[12] = "S2885 ";
33 struct mp_config_table *mc;
35 unsigned char bus_num;
39 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
40 memset(mc, 0, sizeof(*mc));
42 memcpy(mc->mpc_signature, sig, sizeof(sig));
43 mc->mpc_length = sizeof(*mc); /* initially just the header */
45 mc->mpc_checksum = 0; /* not yet computed */
46 memcpy(mc->mpc_oem, oem, sizeof(oem));
47 memcpy(mc->mpc_productid, productid, sizeof(productid));
50 mc->mpc_entry_count = 0; /* No entries yet... */
51 mc->mpc_lapic = LAPIC_ADDR;
56 smp_write_processors(mc);
61 /* define bus and isa numbers */
62 for(bus_num = 0; bus_num < bus_isa; bus_num++) {
63 smp_write_bus(mc, bus_num, "PCI ");
65 smp_write_bus(mc, bus_isa, "ISA ");
67 /*I/O APICs: APIC ID Version State Address*/
68 smp_write_ioapic(mc, apicid_8111, 0x11, IO_APIC_ADDR); //8111
72 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,1));
74 res = find_resource(dev, PCI_BASE_ADDRESS_0);
76 smp_write_ioapic(mc, apicid_8131_1, 0x11, res->base);
79 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1));
81 res = find_resource(dev, PCI_BASE_ADDRESS_0);
83 smp_write_ioapic(mc, apicid_8131_2, 0x11, res->base);
88 mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0);
90 /*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
92 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sysconf.sbdn+1)<<2)|3, apicid_8111, 0x13);
93 //Onboard AMD AC97 Audio
94 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ((sysconf.sbdn+1)<<2)|1, apicid_8111, 0x11);
96 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0<<2)|3, apicid_8111, 0x13);
98 // AGP Display Adapter
99 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8151_1, 0x0, apicid_8111, 0x10);
102 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0b<<2)|0, apicid_8111, 0x11);
104 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0c<<2)|0, apicid_8111, 0x13);
105 //Onboard Broadcom NIC
106 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (9<<2)|0, apicid_8131_1, 0x0);
110 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, (0x0a<<2)|i, apicid_8111, 0x10 + (0+i)%4); //16
116 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (8<<2)|i, apicid_8131_1, (3+i)%4); //27
122 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (7<<2)|i, apicid_8131_1, (2+i)%4); //26
126 //Slot 1 PCI-X 133/100/66
128 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (3<<2)|i, apicid_8131_2, (0+i)%4); //28
132 //Slot 2 PCI-X 133/100/66
134 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6<<2)|i, apicid_8131_2, (1+i)%4); //29
137 /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
138 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
139 smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
140 /* There is no extension information... */
142 /* Compute the checksums */
143 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
144 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
145 printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
146 mc, smp_next_mpe_entry(mc));
147 return smp_next_mpe_entry(mc);
150 unsigned long write_smp_table(unsigned long addr)
153 v = smp_write_floating_table(addr);
154 return (unsigned long)smp_write_config_table(v);