2 ## Config file for the Total Impact briQ
6 ## Early board initialization, called from ppc_main()
12 ## Stage 2 timer support
26 ## Include the secondary Configuration files
28 chip northbridge/ibm/cpc710
29 device pci_domain 0 on # 32bit pci bridge
31 chip southbridge/winbond/w83c553
32 # FIXME The function numbers are ok but the device id is wrong here!
33 device pci 0.0 on end # pci to isa bridge
34 device pci 0.1 on end # pci ide controller
46 ## Build the objects we have code for in this directory.
49 addaction coreboot.a "$(CONFIG_CROSS_COMPILE)ranlib coreboot.a"