2 * This file is part of the coreboot project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
5 * Copyright (C) 2010 Siemens AG, Inc.
6 * (Written by Josef Kellermann <joseph.kellermann@heitec.de> for Siemens AG, Inc.)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 /* Supported sleep states: */
23 Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
24 Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
25 Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
26 Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
27 Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
28 Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
30 Name(\_SB.CSPS ,0) /* Current Sleep State (S0, ... , S5) */
31 Name(CSMS, 0) /* Current System State */
33 /* Wake status package */
34 Name(WKST,Package(){Zero, Zero})
37 * \_PTS - Prepare to Sleep method
40 * Arg0=The value of the sleeping state S1=1, S2=2, etc
45 * The _PTS control method is executed at the beginning of the sleep process
46 * for S1-S5. The sleeping value is passed to the _PTS control method. This
47 * control method may be executed a relatively long time before entering the
48 * sleep state and the OS may abort the operation without notification to
49 * the ACPI driver. This method cannot modify the configuration or power
50 * state of any device in the system.
53 /* DBGO("\\_PTS\n") */
54 /* DBGO("From S0 to S") */
58 /* Don't allow PCIRST# to reset USB */
63 /* Clear sleep SMI status flag and enable sleep SMI trap. */
67 /* On older chips, clear PciExpWakeDisEn */
68 /*if (LLessEqual(\_SB.SBRI, 0x13)) {
73 /* Clear wake status structure. */
74 Store(0, Index(WKST,0))
75 Store(0, Index(WKST,1))
77 } /* End Method(\_PTS) */
80 * The following method results in a "not a valid reserved NameSeg"
81 * warning so I have commented it out for the duration. It isn't
82 * used, so it could be removed.
85 * \_GTS OEM Going To Sleep method
88 * Arg0=The value of the sleeping state S1=1, S2=2
95 * DBGO("From S0 to S")
102 * \_BFS OEM Back From Sleep method
105 * Arg0=The value of the sleeping state S1=1, S2=2
111 /* DBGO("\\_BFS\n") */
114 /* DBGO(" to S0\n") */
118 * \_WAK System Wake method
121 * Arg0=The value of the sleeping state S1=1, S2=2
124 * Return package of 2 DWords
126 * 0x00000000 wake succeeded
127 * 0x00000001 Wake was signaled but failed due to lack of power
128 * 0x00000002 Wake was signaled but failed due to thermal condition
129 * Dword 2 - Power Supply state
130 * if non-zero the effective S-state the power supply entered
133 /* DBGO("\\_WAK\n") */
136 /* DBGO(" to S0\n") */
141 /* Restore PCIRST# so it resets USB */
146 /* Arbitrarily clear PciExpWakeStatus */
149 /* if(DeRefOf(Index(WKST,0))) {
150 * Store(0, Index(WKST,1))
152 * Store(Arg0, Index(WKST,1))
155 \_SB.PCI0.SIOW (Arg0)
157 } /* End Method(\_WAK) */
159 Scope(\_GPE) { /* Start Scope GPE */
160 /* General event 3 */
162 /* DBGO("\\_GPE\\_L00\n") */
163 Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
166 /* Legacy PM event */
168 /* DBGO("\\_GPE\\_L08\n") */
171 /* Temp warning (TWarn) event */
173 /* DBGO("\\_GPE\\_L09\n") */
174 Notify (\_TZ.TZ00, 0x80)
179 * DBGO("\\_GPE\\_L0A\n")
183 /* USB controller PME# */
185 /* DBGO("\\_GPE\\_L0B\n") */
186 Notify(\_SB.PCI0.UOH1, 0x02) /* NOTIFY_DEVICE_WAKE */
187 Notify(\_SB.PCI0.UOH2, 0x02) /* NOTIFY_DEVICE_WAKE */
188 Notify(\_SB.PCI0.UOH3, 0x02) /* NOTIFY_DEVICE_WAKE */
189 Notify(\_SB.PCI0.UOH4, 0x02) /* NOTIFY_DEVICE_WAKE */
190 Notify(\_SB.PCI0.UOH5, 0x02) /* NOTIFY_DEVICE_WAKE */
191 Notify(\_SB.PCI0.UEH1, 0x02) /* NOTIFY_DEVICE_WAKE */
192 Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
195 /* AC97 controller PME# */
197 * DBGO("\\_GPE\\_L0C\n")
201 /* OtherTherm PME# */
203 * DBGO("\\_GPE\\_L0D\n")
207 /* GPM9 SCI event - Moved to USB.asl */
209 * DBGO("\\_GPE\\_L0E\n")
213 /* PCIe HotPlug event */
215 * DBGO("\\_GPE\\_L0F\n")
219 /* ExtEvent0 SCI event */
221 /* DBGO("\\_GPE\\_L10\n") */
225 /* ExtEvent1 SCI event */
227 /* DBGO("\\_GPE\\_L11\n") */
230 /* PCIe PME# event */
232 * DBGO("\\_GPE\\_L12\n")
236 /* GPM0 SCI event - Moved to USB.asl */
238 * DBGO("\\_GPE\\_L13\n")
242 /* GPM1 SCI event - Moved to USB.asl */
244 * DBGO("\\_GPE\\_L14\n")
248 /* GPM2 SCI event - Moved to USB.asl */
250 * DBGO("\\_GPE\\_L15\n")
254 /* GPM3 SCI event - Moved to USB.asl */
256 * DBGO("\\_GPE\\_L16\n")
260 /* GPM8 SCI event - Moved to USB.asl */
262 * DBGO("\\_GPE\\_L17\n")
266 /* GPIO0 or GEvent8 event */
268 /* DBGO("\\_GPE\\_L18\n") */
269 Notify(\_SB.PCI0.PBR2, 0x02) /* NOTIFY_DEVICE_WAKE */
270 Notify(\_SB.PCI0.PBR4, 0x02) /* NOTIFY_DEVICE_WAKE */
271 Notify(\_SB.PCI0.PBR5, 0x02) /* NOTIFY_DEVICE_WAKE */
272 Notify(\_SB.PCI0.PBR6, 0x02) /* NOTIFY_DEVICE_WAKE */
273 Notify(\_SB.PCI0.PBR7, 0x02) /* NOTIFY_DEVICE_WAKE */
274 Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
277 /* GPM4 SCI event - Moved to USB.asl */
279 * DBGO("\\_GPE\\_L19\n")
283 /* GPM5 SCI event - Moved to USB.asl */
285 * DBGO("\\_GPE\\_L1A\n")
289 /* Azalia SCI event */
291 /* DBGO("\\_GPE\\_L1B\n") */
292 Notify(\_SB.PCI0.AZHD, 0x02) /* NOTIFY_DEVICE_WAKE */
293 Notify(\_SB.PWRB, 0x02) /* NOTIFY_DEVICE_WAKE */
296 /* GPM6 SCI event - Reassigned to _L06 */
298 * DBGO("\\_GPE\\_L1C\n")
302 /* GPM7 SCI event - Reassigned to _L07 */
304 * DBGO("\\_GPE\\_L1D\n")
308 /* GPIO2 or GPIO66 SCI event */
310 * DBGO("\\_GPE\\_L1E\n")
315 /* SATA Hot Plug Support -> acpi/sata.asl */
316 } /* End Scope GPE */