2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 AMD
5 * (Written by Yinghai Lu <yinghailu@amd.com> for AMD)
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
26 #define RAMINIT_SYSINFO 1
27 #define CACHE_AS_RAM_ADDRESS_DEBUG 0
28 #define SET_NB_CFG_54 1 /* Used by RAM init. */
29 #define QRANK_DIMM_SUPPORT 1
30 #define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
33 #include <device/pci_def.h>
34 #include <device/pci_ids.h>
36 #include <device/pnp_def.h>
37 #include <arch/romcc_io.h>
38 #include <cpu/x86/lapic.h>
39 #include "option_table.h"
40 #include "pc80/mc146818rtc_early.c"
41 #include "pc80/serial.c"
43 #include "console/console.c"
44 #include <cpu/amd/model_fxx_rev.h>
45 #include "northbridge/amd/amdk8/raminit.h"
46 #include "cpu/amd/model_fxx/apic_timer.c"
47 #include "lib/delay.c"
48 /* #include "cpu/x86/lapic/boot_cpu.c" */
49 #include "northbridge/amd/amdk8/reset_test.c"
50 #include "northbridge/amd/amdk8/debug.c"
51 #include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
52 #include "northbridge/amd/amdk8/amdk8_f.h"
53 #include "cpu/x86/mtrr.h"
54 #include "cpu/amd/mtrr.h"
55 #include "cpu/x86/tsc.h"
56 #include "northbridge/amd/amdk8/amdk8_f_pci.c"
57 #include "northbridge/amd/amdk8/raminit_f_dqs.c"
58 #include "cpu/amd/dualcore/dualcore.c"
60 void hardwaremain(int ret_addr)
62 struct sys_info *sysinfo = (CONFIG_DCACHE_RAM_BASE + CONFIG_DCACHE_RAM_SIZE -
63 CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); /* in CACHE */
64 struct sys_info *sysinfox = ((CONFIG_RAMTOP) -
65 CONFIG_DCACHE_RAM_GLOBAL_VAR_SIZE); /* in RAM */
66 struct node_core_id id;
68 id = get_node_core_id_x();
70 /* FIXME: For USBDEBUG_DIRECT you need to make sure dbg_info gets
73 print_debug("CODE IN CACHE ON NODE:");
74 print_debug_hex8(id.nodeid);
77 train_ram(id.nodeid, sysinfo, sysinfox);
79 /* Go back, but cannot use stack any more, because we only
80 * keep ret_addr and can not restore esp, and ebp.
89 #include <arch/registers.h>
91 void x86_exception(struct eregs *info)