2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
6 ## This program is free software; you can redistribute it and/or modify
7 ## it under the terms of the GNU General Public License as published by
8 ## the Free Software Foundation; either version 2 of the License, or
9 ## (at your option) any later version.
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
21 ## CONFIG_XIP_ROM_SIZE must be a power of 2.
22 default CONFIG_XIP_ROM_SIZE = 64 * 1024
23 include /config/nofailovercalculation.lb
27 if CONFIG_HAVE_PIRQ_TABLE object irq_tables.o end
30 depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
31 action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
33 makerule ./failover.inc
34 depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
35 action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
38 # depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
39 depends "$(CONFIG_MAINBOARD)/auto.c ../romcc"
40 action "../romcc -E -mcpu=p2 -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
43 # depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
44 depends "$(CONFIG_MAINBOARD)/auto.c ../romcc"
45 action "../romcc -mcpu=p2 -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
47 mainboardinit cpu/x86/16bit/entry16.inc
48 mainboardinit cpu/x86/32bit/entry32.inc
49 ldscript /cpu/x86/16bit/entry16.lds
50 ldscript /cpu/x86/32bit/entry32.lds
51 if CONFIG_USE_FALLBACK_IMAGE
52 mainboardinit cpu/x86/16bit/reset16.inc
53 ldscript /cpu/x86/16bit/reset16.lds
55 mainboardinit cpu/x86/32bit/reset32.inc
56 ldscript /cpu/x86/32bit/reset32.lds
58 mainboardinit arch/i386/lib/cpu_reset.inc
59 mainboardinit arch/i386/lib/id.inc
60 ldscript /arch/i386/lib/id.lds
61 if CONFIG_USE_FALLBACK_IMAGE
62 ldscript /arch/i386/lib/failover.lds
63 mainboardinit ./failover.inc
65 mainboardinit cpu/x86/fpu/enable_fpu.inc
66 mainboardinit cpu/x86/mmx/enable_mmx.inc
67 mainboardinit ./auto.inc
68 mainboardinit cpu/x86/mmx/disable_mmx.inc
72 chip northbridge/intel/i82810 # Northbridge
73 device apic_cluster 0 on # APIC cluster
74 chip cpu/intel/socket_PGA370 # CPU
75 device apic 0 on end # APIC
78 device pci_domain 0 on
79 device pci 0.0 on end # Host bridge
80 device pci 1.0 off # Onboard video
81 # chip drivers/pci/onboard
82 # device pci 1.0 on end
83 # register "rom_address" = "0xfff80000"
86 chip southbridge/intel/i82801xx # Southbridge
87 register "ide0_enable" = "1"
88 register "ide1_enable" = "1"
90 device pci 1e.0 on end # PCI bridge
91 device pci 1f.0 on # ISA/LPC bridge
92 chip superio/winbond/w83627hf # Super I/O
93 device pnp 2e.0 on # Floppy
98 device pnp 2e.1 on # Parallel port
103 device pnp 2e.2 on # Com1
107 device pnp 2e.3 on # Com2 (only header on board)
111 device pnp 2e.5 on # PS/2 keyboard/mouse
114 irq 0x70 = 1 # Keyboard interrupt
115 irq 0x72 = 12 # Mouse interrupt
117 device pnp 2e.6 on end # Consumer IR (TODO)
118 device pnp 2e.7 on # Game port / MIDI / GPIO 1
123 device pnp 2e.8 on end # GPIO 2
124 device pnp 2e.9 on end # GPIO 3
125 device pnp 2e.a on end # ACPI
126 device pnp 2e.b on # Hardware monitor
132 device pci 1f.1 on end # IDE
133 device pci 1f.2 on end # USB
134 device pci 1f.3 on end # SMBus
135 device pci 1f.5 on end # AC'97 audio
136 device pci 1f.6 on end # AC'97 modem