1 uses CONFIG_SANDPOINT_ALTIMUS
4 uses CONFIG_SANDPOINT_TALUS
5 uses CONFIG_SANDPOINT_UNITY
6 uses CONFIG_SANDPOINT_VALIS
7 uses CONFIG_SANDPOINT_GYRUS
8 uses CONFIG_ISA_IO_BASE
9 uses CONFIG_ISA_MEM_BASE
10 uses CONFIG_PCIC0_CFGADDR
11 uses CONFIG_PCIC0_CFGDATA
12 uses CONFIG_PNP_CFGADDR
13 uses CONFIG_PNP_CFGDATA
16 uses CONFIG_CROSS_COMPILE
17 uses CONFIG_HAVE_OPTION_TABLE
18 uses CONFIG_SANDPOINT_ALTIMUS
20 uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
22 uses CONFIG_CHIP_CONFIGURE
24 uses CONFIG_CONSOLE_SERIAL8250
25 uses CONFIG_TTYS0_BASE
27 uses CONFIG_FS_PAYLOAD
29 uses CONFIG_FS_ISO9660
31 uses CONFIG_AUTOBOOT_CMDLINE
32 uses CONFIG_PAYLOAD_SIZE
34 uses CONFIG_ROM_IMAGE_SIZE
36 uses CONFIG_EXCEPTION_VECTORS
41 uses CONFIG_STACK_SIZE
45 uses CONFIG_MAINBOARD_VENDOR
46 uses CONFIG_MAINBOARD_PART_NUMBER
47 uses COREBOOT_EXTRA_VERSION
48 uses CONFIG_CROSS_COMPILE
56 default CONFIG_ISA_IO_BASE=0xfe000000
57 default CONFIG_ISA_MEM_BASE=0xfd000000
58 default CONFIG_PCIC0_CFGADDR=0xfec00000
59 default CONFIG_PCIC0_CFGDATA=0xfee00000
60 default CONFIG_PNP_CFGADDR=0x15c
61 default CONFIG_PNP_CFGDATA=0x15d
62 default CONFIG_IO_BASE=CONFIG_ISA_IO_BASE
65 ## The default compiler
67 default CC="$(CONFIG_CROSS_COMPILE)gcc"
68 default CONFIG_HOSTCC="gcc"
69 ## use a cross compiler
70 #default CONFIG_CROSS_COMPILE="powerpc-eabi-"
71 #default CONFIG_CROSS_COMPILE="ppc_74xx-"
72 default CONFIG_ARCH_X86=0
74 ## Use stage 1 initialization code
75 default CONFIG_USE_INIT=1
77 ## Use static configuration
78 default CONFIG_CHIP_CONFIGURE=1
80 ## We don't use compressed image
81 default CONFIG_COMPRESS=0
83 ## Turn off POST codes
84 default CONFIG_NO_POST=1
86 ## Enable serial console
87 default CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
88 default CONFIG_CONSOLE_SERIAL8250=1
89 default CONFIG_TTYS0_BASE=0x3f8
91 ## Load payload using filo
93 default CONFIG_FS_PAYLOAD=1
94 default CONFIG_FS_EXT2=1
95 default CONFIG_FS_ISO9660=1
96 default CONFIG_FS_FAT=1
97 default CONFIG_AUTOBOOT_CMDLINE="hdc1:/vmlinuz"
99 # coreboot must fit into 128KB
100 default CONFIG_ROM_IMAGE_SIZE=131072
101 default CONFIG_ROM_SIZE={CONFIG_ROM_IMAGE_SIZE+CONFIG_PAYLOAD_SIZE}
102 default CONFIG_PAYLOAD_SIZE=262144
104 # Set stack and heap sizes (stage 2)
105 default CONFIG_STACK_SIZE=0x10000
106 default CONFIG_HEAP_SIZE=0x10000
108 # Sandpoint Demo Board
110 default CONFIG_ROMBASE=0xfff00000
112 ## Sandpoint reset vector
113 default CONFIG_RESET=CONFIG_ROMBASE+0x100
115 ## Exception vectors (other than reset vector)
116 default CONFIG_EXCEPTION_VECTORS=CONFIG_RESET+0x100
118 ## Start of coreboot in the boot rom
119 ## = CONFIG_RESET + exeception vector table size
120 default CONFIG_ROMSTART=CONFIG_RESET+0x3100
122 ## Coreboot C code runs at this location in RAM
123 default CONFIG_RAMBASE=0x00100000
124 default CONFIG_RAMSTART=0x00100000
126 default CONFIG_SANDPOINT_ALTIMUS=1
133 default CONFIG_CBFS=0