src/mainboard/iwill/dk8_htx/Config.lb

   1 ## CONFIG_XIP_ROM_SIZE must be a power of 2.
   2 default CONFIG_XIP_ROM_SIZE = 64 * 1024
   3 include /config/failovercalculation.lb
   4
   5 arch i386 end
   6
   7 ##
   8 ## Build the objects we have code for in this directory.
   9 ##
  10
  11 driver mainboard.o
  12
  13 #dir /drivers/si/3114
  14
  15 #needed by irq_tables and mptable and acpi_tables
  16 object get_bus_conf.o
  17
  18 if CONFIG_HAVE_MP_TABLE
  19         object mptable.o
  20 end
  21
  22 if CONFIG_HAVE_PIRQ_TABLE
  23         object irq_tables.o
  24 end
  25
  26 #if CONFIG_HAVE_ACPI_TABLES
  27 #       object acpi_tables.o
  28 #       object fadt.o
  29 #       if CONFIG_SB_HT_CHAIN_ON_BUS0
  30 #               object dsdt_bus0.o
  31 #       else
  32 #               object dsdt.o
  33 #       end
  34 #       object ssdt.o
  35 #       if CONFIG_ACPI_SSDTX_NUM
  36 #                if CONFIG_SB_HT_CHAIN_ON_BUS0
  37 #                 object ssdt2_bus0.o
  38 #                else
  39 #                 object ssdt2.o
  40 #                end
  41 #       end
  42 #end
  43
  44 if CONFIG_HAVE_ACPI_TABLES
  45         object acpi_tables.o
  46         object fadt.o
  47         makerule dsdt.c
  48                 depends "$(CONFIG_MAINBOARD)/dx/dsdt_lb.dsl"
  49                 action  "iasl -p $(CURDIR)/dsdt_lb -tc $(CONFIG_MAINBOARD)/dx/dsdt_lb.dsl"
  50                 action  "mv dsdt_lb.hex dsdt.c"
  51         end
  52         object ./dsdt.o
  53
  54         #./ssdt.o is moved to northbridge/amd/amdk8/Config.lb
  55
  56         if CONFIG_ACPI_SSDTX_NUM
  57             makerule ssdt2.c
  58                         depends "$(CONFIG_MAINBOARD)/dx/pci2.asl"
  59                         action  "iasl -p $(CURDIR)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl"
  60                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex"
  61                         action  "mv pci2.hex ssdt2.c"
  62             end
  63             object ./ssdt2.o
  64             makerule ssdt3.c
  65                         depends "$(CONFIG_MAINBOARD)/dx/pci3.asl"
  66                         action  "iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/dx/pci3.asl"
  67                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex"
  68                         action  "mv pci3.hex ssdt3.c"
  69             end
  70             object ./ssdt3.o
  71             makerule ssdt4.c
  72                         depends "$(CONFIG_MAINBOARD)/dx/pci4.asl"
  73                         action  "iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl"
  74                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex"
  75                         action  "mv pci4.hex ssdt4.c"
  76             end
  77             object ./ssdt4.o
  78             makerule ssdt5.c
  79                         depends "$(CONFIG_MAINBOARD)/dx/pci5.asl"
  80                         action  "iasl -p $(CURDIR)/pci5 -tc $(CONFIG_MAINBOARD)/dx/pci5.asl"
  81                         action  "perl -pi -e 's/AmlCode/AmlCode_ssdt5/g' pci5.hex"
  82                         action  "mv pci5.hex ssdt5.c"
  83             end
  84             object ./ssdt5.o
  85         end
  86 end
  87
  88         if CONFIG_USE_INIT
  89                 # compile cache_as_ram.c to auto.o
  90                 makerule ./cache_as_ram_auto.o
  91                         depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
  92                         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
  93                 end
  94
  95         else
  96                 #compile cache_as_ram.c to auto.inc
  97                 makerule ./cache_as_ram_auto.inc
  98                         depends "$(CONFIG_MAINBOARD)/cache_as_ram_auto.c option_table.h"
  99                         action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(TOP)/src -I. -c -S $(CONFIG_MAINBOARD)/cache_as_ram_auto.c -o $@"
 100                         action "perl -e 's/\.rodata/.rom.data/g' -pi $@"
 101                         action "perl -e 's/\.text/.section .rom.text/g' -pi $@"
 102                 end
 103
 104         end
 105
 106 if CONFIG_USE_FAILOVER_IMAGE
 107 else
 108     if CONFIG_AP_CODE_IN_CAR
 109         makerule ./apc_auto.o
 110                 depends "$(CONFIG_MAINBOARD)/apc_auto.c option_table.h"
 111                 action "$(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) -I$(TOP)/src -I. -c $(CONFIG_MAINBOARD)/apc_auto.c -o $@"
 112         end
 113         ldscript /arch/i386/init/ldscript_apc.lb
 114     end
 115 end
 116
 117 ##
 118 ## Build our 16 bit and 32 bit coreboot entry code
 119 ##
 120
 121 if CONFIG_HAVE_FAILOVER_BOOT
 122     if CONFIG_USE_FAILOVER_IMAGE
 123         mainboardinit cpu/x86/16bit/entry16.inc
 124         ldscript /cpu/x86/16bit/entry16.lds
 125     end
 126 else
 127     if CONFIG_USE_FALLBACK_IMAGE
 128         mainboardinit cpu/x86/16bit/entry16.inc
 129         ldscript /cpu/x86/16bit/entry16.lds
 130     end
 131 end
 132
 133 mainboardinit cpu/x86/32bit/entry32.inc
 134         if CONFIG_USE_INIT
 135                 ldscript /cpu/x86/32bit/entry32.lds
 136         end
 137
 138         if CONFIG_USE_INIT
 139                 ldscript /cpu/amd/car/cache_as_ram.lds
 140         end
 141
 142 ##
 143 ## Build our reset vector (This is where coreboot is entered)
 144 ##
 145 if CONFIG_HAVE_FAILOVER_BOOT
 146     if CONFIG_USE_FAILOVER_IMAGE
 147         mainboardinit cpu/x86/16bit/reset16.inc
 148         ldscript /cpu/x86/16bit/reset16.lds
 149     else
 150         mainboardinit cpu/x86/32bit/reset32.inc
 151         ldscript /cpu/x86/32bit/reset32.lds
 152     end
 153 else
 154     if CONFIG_USE_FALLBACK_IMAGE
 155         mainboardinit cpu/x86/16bit/reset16.inc
 156         ldscript /cpu/x86/16bit/reset16.lds
 157     else
 158         mainboardinit cpu/x86/32bit/reset32.inc
 159         ldscript /cpu/x86/32bit/reset32.lds
 160     end
 161 end
 162
 163 ##
 164 ## Include an id string (For safe flashing)
 165 ##
 166 mainboardinit arch/i386/lib/id.inc
 167 ldscript /arch/i386/lib/id.lds
 168
 169         ##
 170         ## Setup Cache-As-Ram
 171         ##
 172         mainboardinit cpu/amd/car/cache_as_ram.inc
 173
 174 ###
 175 ### This is the early phase of coreboot startup
 176 ### Things are delicate and we test to see if we should
 177 ### failover to another image.
 178 ###
 179 if CONFIG_HAVE_FAILOVER_BOOT
 180     if CONFIG_USE_FAILOVER_IMAGE
 181                 ldscript /arch/i386/lib/failover_failover.lds
 182     end
 183 else
 184     if CONFIG_USE_FALLBACK_IMAGE
 185                 ldscript /arch/i386/lib/failover.lds
 186     end
 187 end
 188
 189 ###
 190 ### O.k. We aren't just an intermediary anymore!
 191 ###
 192
 193 ##
 194 ## Setup RAM
 195 ##
 196         if CONFIG_USE_INIT
 197                 initobject cache_as_ram_auto.o
 198         else
 199                 mainboardinit ./cache_as_ram_auto.inc
 200         end
 201
 202 ##
 203 ## Include the secondary Configuration files
 204 ##
 205 config chip.h
 206
 207 dir /southbridge/amd/amd8132
 208
 209 chip northbridge/amd/amdk8/root_complex
 210         device apic_cluster 0 on
 211                 chip cpu/amd/socket_940
 212                         device apic 0 on end
 213                 end
 214         end
 215         device pci_domain 0 on
 216                 chip northbridge/amd/amdk8
 217                         device pci 18.0 on end
 218                         device pci 18.0 on end
 219                         device pci 18.0 on #  northbridge
 220                                 chip southbridge/amd/amd8131
 221                                         # the on/off keyword is mandatory
 222                                         device pci 0.0 on end
 223                                         device pci 0.1 on end
 224                                         device pci 1.0 on end
 225                                         device pci 1.1 on end
 226                                 end
 227                                 chip southbridge/amd/amd8111
 228                                         # this "device pci 0.0" is the parent the next one
 229                                         # PCI bridge
 230                                         device pci 0.0 on
 231                                                 device pci 0.0 on end
 232                                                 device pci 0.1 on end
 233                                                 device pci 0.2 off end
 234                                                 device pci 1.0 off end
 235                                                 #chip drivers/pci/onboard
 236                                                 #        device pci 6.0 on end
 237                                                 #       register "rom_address" = "0xfff80000"
 238                                                 #end
 239                                         end
 240                                         device pci 1.0 on
 241                                                 chip superio/winbond/w83627hf
 242                                                         device pnp 2e.0 off #  Floppy
 243                                                                 io 0x60 = 0x3f0
 244                                                                 irq 0x70 = 6
 245                                                                 drq 0x74 = 2
 246                                                         end
 247                                                         device pnp 2e.1 off #  Parallel Port
 248                                                                 io 0x60 = 0x378
 249                                                                 irq 0x70 = 7
 250                                                         end
 251                                                         device pnp 2e.2 on #  Com1
 252                                                                 io 0x60 = 0x3f8
 253                                                                 irq 0x70 = 4
 254                                                         end
 255                                                         device pnp 2e.3 off #  Com2
 256                                                                 io 0x60 = 0x2f8
 257                                                                 irq 0x70 = 3
 258                                                         end
 259                                                         device pnp 2e.5 on #  Keyboard
 260                                                                 io 0x60 = 0x60
 261                                                                 io 0x62 = 0x64
 262                                                                 irq 0x70 = 1
 263                                                                 irq 0x72 = 12
 264                                                         end
 265                                                         device pnp 2e.6 off #  CIR
 266                                                                 io 0x60 = 0x100
 267                                                         end
 268                                                         device pnp 2e.7 off #  GAME_MIDI_GIPO1
 269                                                                 io 0x60 = 0x220
 270                                                                 io 0x62 = 0x300
 271                                                                 irq 0x70 = 9
 272                                                         end
 273                                                         device pnp 2e.8 on #  GPIO2
 274                                                                 io 0x07 = 0x08ff
 275                                                                 io 0x30 = 0x01ff
 276                                                                 io 0x2b = 0xd0ff
 277                                                                 io 0xf0 = 0xef16
 278                                                         end
 279                                                         device pnp 2e.9 off end #  GPIO3
 280                                                         device pnp 2e.a off end #  ACPI
 281                                                         device pnp 2e.b on #  HW Monitor
 282                                                                 io 0x60 = 0x290
 283                                                                 irq 0x70 = 5
 284                                                         end
 285                                                 end
 286                                         end
 287                                         device pci 1.1 on end
 288                                         device pci 1.2 on end
 289                                         device pci 1.3 on
 290                                                 chip drivers/generic/generic #dimm 0-0-0
 291                                                         device i2c 50 on end
 292                                                 end
 293                                                 chip drivers/generic/generic #dimm 0-0-1
 294                                                         device i2c 51 on end
 295                                                 end
 296                                                 chip drivers/generic/generic #dimm 0-1-0
 297                                                         device i2c 52 on end
 298                                                 end
 299                                                 chip drivers/generic/generic #dimm 0-1-1
 300                                                         device i2c 53 on end
 301                                                 end
 302                                                 chip drivers/generic/generic #dimm 1-0-0
 303                                                         device i2c 54 on end
 304                                                 end
 305                                                 chip drivers/generic/generic #dimm 1-0-1
 306                                                         device i2c 55 on end
 307                                                 end
 308                                                 chip drivers/generic/generic #dimm 1-1-0
 309                                                         device i2c 56 on end
 310                                                 end
 311                                                 chip drivers/generic/generic #dimm 1-1-1
 312                                                         device i2c 57 on end
 313                                                 end
 314                                         end # acpi
 315                                         device pci 1.5 off end
 316                                         device pci 1.6 off end
 317                                         register "ide0_enable" = "1"
 318                                         register "ide1_enable" = "1"
 319                                 end
 320                         end #  device pci 18.0
 321
 322                         device pci 18.1 on end
 323                         device pci 18.2 on end
 324                         device pci 18.3 on end
 325                 end
 326
 327         end #pci_domain
 328 #        chip drivers/generic/debug
 329 #               device pnp 0.0 off end # chip name
 330 #                device pnp 0.1 on end # pci_regs_all
 331 #                device pnp 0.2 off end # mem
 332 #                device pnp 0.3 off end # cpuid
 333 #                device pnp 0.4 off end # smbus_regs_all
 334 #                device pnp 0.5 off end # dual core msr
 335 #                device pnp 0.6 off end # cache size
 336 #                device pnp 0.7 off end # tsc
 337 #       end
 338
 339 end
 340
 341