Drop per-board ram_check() calls for now.
[coreboot.git] / src / mainboard / intel / xe7501devkit / romstage.c
1 #include <stdint.h>
2 #include <device/pci_def.h>
3 #include <arch/io.h>
4 #include <device/pnp_def.h>
5 #include <arch/romcc_io.h>
6 #include <cpu/x86/lapic.h>
7 #include <arch/cpu.h>
8 #include <stdlib.h>
9 #include <pc80/mc146818rtc.h>
10 #include <console/console.h>
11 #include "southbridge/intel/i82801cx/i82801cx_early_smbus.c"
12 #include "northbridge/intel/e7501/raminit.h"
13 #include "cpu/x86/lapic/boot_cpu.c"
14 #include "northbridge/intel/e7501/debug.c"
15 #include "superio/smsc/lpc47b272/lpc47b272_early_serial.c"
16 #include "cpu/x86/mtrr/earlymtrr.c"
17 #include "cpu/x86/bist.h"
18 #include <spd.h>
19
20 #define SERIAL_DEV PNP_DEV(0x2e, LPC47B272_SP1)
21
22 static void hard_reset(void)
23 {
24         outb(0x0e, 0x0cf9);
25 }
26
27 static inline int spd_read_byte(unsigned device, unsigned address)
28 {
29         return smbus_read_byte(device, address);
30 }
31
32 #include "northbridge/intel/e7501/raminit.c"
33 #include "northbridge/intel/e7501/reset_test.c"
34 #include "lib/generic_sdram.c"
35
36 // This function MUST appear last (ROMCC limitation)
37 static void main(unsigned long bist)
38 {
39         static const struct mem_controller memctrl[] = {
40                 {
41                         .d0 = PCI_DEV(0, 0, 0),
42                         .d0f1 = PCI_DEV(0, 0, 1),
43                         .channel0 = { DIMM0, DIMM1, DIMM2, 0 },
44                         .channel1 = { DIMM4, DIMM5, DIMM6, 0 },
45                 },
46         };
47
48         if (bist == 0) {
49                 // Skip this if there was a built in self test failure
50                 early_mtrr_init();
51                 enable_lapic();
52         }
53
54         // Get the serial port running and print a welcome banner
55         lpc47b272_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
56         uart_init();
57         console_init();
58
59         // Halt if there was a built in self test failure
60         report_bist_failure(bist);
61
62         // print_pci_devices();
63
64         // If this is a warm boot, some initialization can be skipped
65
66         if (!bios_reset_detected())
67         {
68                 enable_smbus();
69                 // dump_spd_registers(&memctrl[0]);
70                 // dump_smbus_registers();
71                 sdram_initialize(ARRAY_SIZE(memctrl), memctrl);
72         }
73
74         // NOTE: ROMCC dies with an internal compiler error
75         //               if the following line is removed.
76         print_debug("SDRAM is up.\n");
77 }