src/mainboard/iei/pcisa-lx-800-r10/Config.lb

   1 ##
   2 ## This file is part of the coreboot project.
   3 ##
   4 ## Copyright (C) 2007 Nikolay Petukhov <nikolay.petukhov@gmail.com>
   5 ##
   6 ## This program is free software; you can redistribute it and/or modify
   7 ## it under the terms of the GNU General Public License as published by
   8 ## the Free Software Foundation; either version 2 of the License, or
   9 ## (at your option) any later version.
  10 ##
  11 ## This program is distributed in the hope that it will be useful,
  12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 ## GNU General Public License for more details.
  15 ##
  16 ## You should have received a copy of the GNU General Public License
  17 ## along with this program; if not, write to the Free Software
  18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  19 ##
  20
  21 if USE_FALLBACK_IMAGE
  22         default ROM_SECTION_SIZE   = FALLBACK_SIZE
  23         default ROM_SECTION_OFFSET = (ROM_SIZE - FALLBACK_SIZE)
  24 else
  25         default ROM_SECTION_SIZE   = (ROM_SIZE - FALLBACK_SIZE)
  26         default ROM_SECTION_OFFSET = 0
  27 end
  28 default CONFIG_ROM_PAYLOAD_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
  29 default PAYLOAD_SIZE = (ROM_SECTION_SIZE - ROM_IMAGE_SIZE)
  30 default _ROMBASE = (CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE)
  31 default XIP_ROM_SIZE = 64 * 1024
  32 default XIP_ROM_BASE = (_ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE)
  33 arch i386 end
  34 driver mainboard.o
  35 if HAVE_PIRQ_TABLE
  36         object irq_tables.o
  37 end
  38 if USE_DCACHE_RAM
  39         # Compile cache_as_ram.c to auto.inc.
  40         makerule ./cache_as_ram_auto.inc
  41                         # depends "$(MAINBOARD)/cache_as_ram_auto.c option_table.h"
  42                         depends "$(MAINBOARD)/cache_as_ram_auto.c"
  43                         action "$(CC) $(DISTRO_CFLAGS) -I$(TOP)/src -I. $(CPPFLAGS) $(MAINBOARD)/cache_as_ram_auto.c -Os -nostdinc -nostdlib -fno-builtin -Wall -c -S -o $@"
  44                         action "perl -e 's/.rodata/.rom.data/g' -pi $@"
  45                         action "perl -e 's/.text/.section .rom.text/g' -pi $@"
  46         end
  47 end
  48 mainboardinit cpu/x86/16bit/entry16.inc
  49 mainboardinit cpu/x86/32bit/entry32.inc
  50 ldscript /cpu/x86/16bit/entry16.lds
  51 ldscript /cpu/x86/32bit/entry32.lds
  52 if USE_FALLBACK_IMAGE
  53         mainboardinit cpu/x86/16bit/reset16.inc
  54         ldscript /cpu/x86/16bit/reset16.lds
  55 else
  56         mainboardinit cpu/x86/32bit/reset32.inc
  57         ldscript /cpu/x86/32bit/reset32.lds
  58 end
  59 mainboardinit arch/i386/lib/id.inc
  60 ldscript /arch/i386/lib/id.lds
  61 if USE_FALLBACK_IMAGE
  62         ldscript /arch/i386/lib/failover.lds
  63 #       mainboardinit ./failover.inc
  64 end
  65 mainboardinit cpu/x86/fpu/enable_fpu.inc
  66 if USE_DCACHE_RAM
  67         mainboardinit cpu/amd/model_lx/cache_as_ram.inc
  68         mainboardinit ./cache_as_ram_auto.inc
  69 end
  70 dir /pc80
  71 config chip.h
  72
  73 chip northbridge/amd/lx
  74         device pci_domain 0 on
  75                 device pci 1.0 on end                           # Northbridge
  76                 device pci 1.1 on end                           # Graphics
  77                 chip southbridge/amd/cs5536
  78                         # IRQ 12 and 1 unmasked,  Keyboard and Mouse IRQs. OK
  79                         # SIRQ Mode = Active(Quiet) mode. Save power....
  80                         # Invert mask = IRQ 12 and 1 are active high. Keyboard and Mouse, UARTs, etc IRQs. OK
  81                         register "lpc_serirq_enable" = "0x0000105a"
  82                         register "lpc_serirq_polarity" = "0x0000EFA5"
  83                         register "lpc_serirq_mode" = "1"
  84                         register "enable_gpio_int_route" = "0x0D0C0700"
  85                         register "enable_ide_nand_flash" = "0"  # 0:ide mode, 1:flash
  86                         register "enable_USBP4_device" = "1"    # 0: host, 1:device
  87                         register "enable_USBP4_overcurrent" = "0" #0:off, xxxx:overcurrent setting CS5536 Data Book (pages 380-381)
  88                         register "com1_enable" = "0"
  89                         register "com1_address" = "0x3F8"
  90                         register "com1_irq" = "4"
  91                         register "com2_enable" = "0"
  92                         register "com2_address" = "0x2F8"
  93                         register "com2_irq" = "3"
  94                         register "unwanted_vpci[0]" = "0"       # End of list has a zero
  95                         device pci 9.0 on end                   # Slot1
  96                         device pci a.0 on end                   # Slot2
  97                         device pci b.0 on end                   # Slot3
  98                         device pci c.0 on end                   # Slot4
  99                         device pci e.0 on end                   # Ethernet 0
 100                         device pci 10.0 on end                  # Ethernet 1
 101                         device pci 11.0 on end                  # SATA
 102                         device pci f.0 on                       # ISA Bridge
 103                                 chip superio/winbond/w83627hf
 104                                         device pnp 2e.0 off     # Floppy
 105                                                 io 0x60 = 0x3f0
 106                                                 irq 0x70 = 6
 107                                                 drq 0x74 = 2
 108                                         end
 109                                         device pnp 2e.1 off     # Parallel port
 110                                                 io 0x60 = 0x378
 111                                                 irq 0x70 = 7
 112                                         end
 113                                         device pnp 2e.2 on      # Com1
 114                                                 io 0x60 = 0x3f8
 115                                                 irq 0x70 = 4
 116                                         end
 117                                         device pnp 2e.3 on      # Com2
 118                                                 io 0x60 = 0x2f8
 119                                                 irq 0x70 = 3
 120                                         end
 121                                         device pnp 2e.5 on      # Keyboard
 122                                                 io 0x60 = 0x60
 123                                                 io 0x62 = 0x64
 124                                                 irq 0x70 = 1
 125                                                 irq 0x72 = 12
 126                                         end
 127                                         device pnp 2e.6 off end # CIR
 128                                         device pnp 2e.7 off end # GAME_MIDI_GIPO1
 129                                         device pnp 2e.8 off end # GPIO2
 130                                         device pnp 2e.9 off end # GPIO3
 131                                         device pnp 2e.a off end # ACPI
 132                                         device pnp 2e.b off end # HW Monitor
 133                                 end
 134                         end
 135                         device pci f.2 on end                   # IDE Controller
 136                         device pci f.3 on end                   # Audio
 137                         device pci f.4 on end                   # OHCI
 138                         device pci f.5 on end                   # EHCI
 139                 end
 140         end
 141         # APIC cluster is late CPU init.
 142         device apic_cluster 0 on
 143                 chip cpu/amd/model_lx
 144                         device apic 0 on end
 145                 end
 146         end
 147 end
 148