1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <arch/ioapic.h>
4 #include <device/pci.h>
8 static void *smp_write_config_table(void *v)
10 static const char sig[4] = "PCMP";
11 static const char oem[8] = "COREBOOT";
12 static const char productid[12] = "E325 ";
13 struct mp_config_table *mc;
15 unsigned char bus_num;
16 unsigned char bus_isa;
17 unsigned char bus_8111_0;
18 unsigned char bus_8111_1;
19 unsigned char bus_8131_1;
20 unsigned char bus_8131_2;
22 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
23 memset(mc, 0, sizeof(*mc));
25 memcpy(mc->mpc_signature, sig, sizeof(sig));
26 mc->mpc_length = sizeof(*mc); /* initially just the header */
28 mc->mpc_checksum = 0; /* not yet computed */
29 memcpy(mc->mpc_oem, oem, sizeof(oem));
30 memcpy(mc->mpc_productid, productid, sizeof(productid));
33 mc->mpc_entry_count = 0; /* No entries yet... */
34 mc->mpc_lapic = LAPIC_ADDR;
39 smp_write_processors(mc);
45 dev = dev_find_slot(1, PCI_DEVFN(0x03,0));
47 bus_8111_0 = pci_read_config8(dev, PCI_PRIMARY_BUS);
48 bus_8111_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
49 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
52 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:03.0, using defaults\n");
59 dev = dev_find_slot(1, PCI_DEVFN(0x01,0));
61 bus_8131_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
64 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:01.0, using defaults\n");
69 dev = dev_find_slot(1, PCI_DEVFN(0x02,0));
71 bus_8131_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
73 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
78 /* define bus and isa numbers */
79 for (bus_num = 0; bus_num < bus_isa; bus_num++) {
80 smp_write_bus(mc, bus_num, "PCI ");
82 smp_write_bus(mc, bus_isa, "ISA ");
84 /* Legacy IOAPIC #2 */
85 smp_write_ioapic(mc, 2, 0x11, IO_APIC_ADDR);
90 dev = dev_find_slot(1, PCI_DEVFN(0x01,1));
92 res = find_resource(dev, PCI_BASE_ADDRESS_0);
94 smp_write_ioapic(mc, 0x03, 0x11, res->base);
98 dev = dev_find_slot(1, PCI_DEVFN(0x02,1));
100 res = find_resource(dev, PCI_BASE_ADDRESS_0);
102 smp_write_ioapic(mc, 0x04, 0x11, res->base);
107 mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
109 /* PCI Ints: Type Polarity Trigger Bus ID PCIDEVNUM|IRQ APIC ID PIN# */
110 /* Integrated SMBus 2.0 */
111 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_0, (0x04<<2)|3, 0x2, 0x13);
112 /* Integrated AMD AC97 Audio */
113 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_0, (0x04<<2)|1, 0x2, 0x11);
115 /* Integrated AMD USB */
116 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x00<<2)|3, 0x2, 0x13);
118 /* On board ATI Rage XL */
119 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8111_1, (0x05<<2)|0, 0x2, 0x10);
121 /* On board Broadcom nics */
122 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|0, 0x3, 0x00);
123 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x01<<2)|1, 0x3, 0x01);
125 /* On board LSI SCSI */
126 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_1, (0x02<<2)|0, 0x3, 0x02);
128 /* PCI Slot 1 PCIX */
129 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x03<<2)|0, 0x2, 0x10);
130 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x03<<2)|1, 0x2, 0x11);
131 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x03<<2)|2, 0x2, 0x12);
132 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x03<<2)|3, 0x2, 0x13);
134 /* PCI Slot 2 PCIX */
135 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x04<<2)|0, 0x2, 0x11);
136 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x04<<2)|1, 0x2, 0x12);
137 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x04<<2)|2, 0x2, 0x13);
138 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_8131_2, (0x04<<2)|3, 0x2, 0x10);
140 /* Standard local interrupt assignments:
141 * Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
142 smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0x00, MP_APIC_ALL, 0x00);
143 smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_DEFAULT|MP_IRQ_POLARITY_DEFAULT, bus_isa, 0x00, MP_APIC_ALL, 0x01);
145 /* There is no extension information... */
147 /* Compute the checksums */
148 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
149 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
150 printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
151 mc, smp_next_mpe_entry(mc));
152 return smp_next_mpe_entry(mc);
155 unsigned long write_smp_table(unsigned long addr)
158 v = smp_write_floating_table(addr);
159 return (unsigned long)smp_write_config_table(v);