1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <arch/ioapic.h>
4 #include <device/pci.h>
8 #include <cpu/amd/amdk8_sysconf.h>
10 extern unsigned char bus_isa;
11 extern unsigned char bus_8131_0;
12 extern unsigned char bus_8131_1;
13 extern unsigned char bus_8131_2;
14 extern unsigned char bus_8111_0;
15 extern unsigned char bus_8111_1;
16 extern unsigned apicid_8111;
17 extern unsigned apicid_8131_1;
18 extern unsigned apicid_8131_2;
20 extern unsigned sbdn3;
24 static void *smp_write_config_table(void *v)
26 static const char sig[4] = "PCMP";
27 static const char oem[8] = "COREBOOT";
28 static const char productid[12] = "DL145G1 ";
29 struct mp_config_table *mc;
31 unsigned char bus_num;
33 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
34 memset(mc, 0, sizeof(*mc));
36 memcpy(mc->mpc_signature, sig, sizeof(sig));
37 mc->mpc_length = sizeof(*mc); /* initially just the header */
39 mc->mpc_checksum = 0; /* not yet computed */
40 memcpy(mc->mpc_oem, oem, sizeof(oem));
41 memcpy(mc->mpc_productid, productid, sizeof(productid));
44 mc->mpc_entry_count = 0; /* No entries yet... */
45 mc->mpc_lapic = LAPIC_ADDR;
50 smp_write_processors(mc);
56 /* define bus and isa numbers */
57 for(bus_num = 0; bus_num < bus_isa; bus_num++) {
58 smp_write_bus(mc, bus_num, "PCI ");
60 smp_write_bus(mc, bus_isa, "ISA ");
63 /*I/O APICs: APIC ID Version State Address*/
64 smp_write_ioapic(mc, apicid_8111, 0x20, IO_APIC_ADDR);
68 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,1));
70 res = find_resource(dev, PCI_BASE_ADDRESS_0);
72 smp_write_ioapic(mc, apicid_8131_1, 0x20, res->base);
75 dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1));
77 res = find_resource(dev, PCI_BASE_ADDRESS_0);
79 smp_write_ioapic(mc, apicid_8131_2, 0x20, res->base);
85 mptable_add_isa_interrupts(mc, bus_isa, apicid_8111, 0);
88 // The commented-out lines are auto-detected on my servers.
90 /*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */
91 // Integrated SMBus 2.0
92 //smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ( 0x4 <<2)|3, apicid_8111 , 0x15);
93 // Integrated AMD AC97 Audio
94 //smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ( 0x4 <<2)|1, apicid_8111 , 0x11);
95 //smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_0, ( 0x4 <<2)|2, apicid_8111 , 0x12);
97 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, ( 0x4 <<2)|0, apicid_8111 , 0x10);
98 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, ( 0x0 <<2)|3, apicid_8111 , 0x13);
99 // On board ATI Rage XL
100 //smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8111_1, ( 0x5 <<2)|0, apicid_8111 , 0x14);
101 // On board Broadcom nics
102 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, ( 0x3 <<2)|0, apicid_8131_2, 0x03);
103 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, ( 0x3 <<2)|1, apicid_8131_2, 0x00);
105 //smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, ( 0x2 <<2)|0, apicid_8131_2, 0x02);
108 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, ( 0x1 <<2)|0, apicid_8131_1, 0x01);
109 //smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, ( 0x1 <<2)|1, apicid_8131_1, 0x02);
110 //smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, ( 0x1 <<2)|2, apicid_8131_1, 0x03);
111 //smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, ( 0x1 <<2)|3, apicid_8131_1, 0x04);
113 /*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/
114 smp_write_intsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x0);
115 smp_write_intsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH, bus_isa, 0x0, MP_APIC_ALL, 0x1);
116 /* There is no extension information... */
118 /* Compute the checksums */
119 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
120 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
121 printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
122 mc, smp_next_mpe_entry(mc));
123 return smp_next_mpe_entry(mc);
126 unsigned long write_smp_table(unsigned long addr)
129 v = smp_write_floating_table(addr);
130 return (unsigned long)smp_write_config_table(v);