2 ## This file is part of the coreboot project.
4 ## Copyright (C) 2007-2009 coresystems GmbH
6 ## This program is free software; you can redistribute it and/or
7 ## modify it under the terms of the GNU General Public License as
8 ## published by the Free Software Foundation; version 2 of
11 ## This program is distributed in the hope that it will be useful,
12 ## but WITHOUT ANY WARRANTY; without even the implied warranty of
13 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 ## GNU General Public License for more details.
16 ## You should have received a copy of the GNU General Public License
17 ## along with this program; if not, write to the Free Software
18 ## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
22 chip northbridge/intel/i945
24 device lapic_cluster 0 on
25 chip cpu/intel/socket_mFCPGA478
30 device pci_domain 0 on
31 device pci 00.0 on end # host bridge
33 #device pci 01.0 off end # i945 PCIe root port
34 #device pci 02.0 on end # vga controller
35 #device pci 02.1 on end # display controller
37 chip southbridge/intel/i82801gx
38 register "pirqa_routing" = "0x0a"
39 register "pirqb_routing" = "0x0a"
40 register "pirqc_routing" = "0x0a"
41 register "pirqd_routing" = "0x0a"
42 register "pirqe_routing" = "0x80"
43 register "pirqf_routing" = "0x80"
44 register "pirqg_routing" = "0x0a"
45 register "pirqh_routing" = "0x0a"
48 # 0 No effect (default)
49 # 1 SMI# (if corresponding ALT_GPI_SMI_EN bit is also set)
50 # 2 SCI (if corresponding GPIO_EN bit is also set)
51 register "gpi8_routing" = "1" # EXTSMI low active
52 register "gpi7_routing" = "2" # ECSCI low active
55 register "gpe0_en" = "0x00800106"
56 register "alt_gp_smi_en" = "0x0100"
58 register "ide_legacy_combined" = "0x1"
59 register "ide_enable_primary" = "0x1"
60 register "ide_enable_secondary" = "0x0"
61 register "sata_ahci" = "0x0"
63 device pci 1b.0 on end # High Definition Audio
64 device pci 1c.0 on end # PCIe port 1
65 device pci 1c.1 on end # PCIe port 2
66 device pci 1c.2 on end # PCIe port 3
67 device pci 1c.3 on end # PCIe port 4
68 #device pci 1c.4 off end # PCIe port 5
69 #device pci 1c.5 off end # PCIe port 6
70 device pci 1d.0 on end # USB UHCI
71 device pci 1d.1 on end # USB UHCI
72 device pci 1d.2 on end # USB UHCI
73 device pci 1d.3 on end # USB UHCI
74 device pci 1d.7 on end # USB2 EHCI
76 chip southbridge/ti/pcixx12
80 #device pci 1e.2 off end # AC'97 Audio
81 #device pci 1e.3 off end # AC'97 Modem
82 device pci 1f.0 on # LPC bridge
83 chip superio/smsc/fdc37n972
84 device pnp 2e.0 off # Floppy
86 device pnp 2e.1 off # ACPI PM
89 device pnp 2e.3 on # Parallel port
93 device pnp 2e.4 on # COM1
99 #device pnp 2e.6 on # RTC
103 device pnp 2e.7 off # Keyboard
105 device pnp 2e.8 off # EC
108 #device pnp 2e.9 on # Mailbox
111 chip superio/smsc/sio10n268
112 device pnp 4e.0 off # Floppy
114 device pnp 4e.1 off # Parport
116 #device pnp 4e.2 on # COM3
120 #device pnp 4e.3 on # COM4
124 device pnp 4e.5 on # Keyboard
128 device pnp 4e.7 off # GPIO1, GAME, MIDI
130 device pnp 4e.8 off # GPIO2
132 device pnp 4e.9 off # GPIO3/4
134 device pnp 4e.a off # ACPI
136 device pnp 4e.b off # HWM
143 device pci 1f.1 on end # IDE
144 device pci 1f.2 on end # SATA
145 device pci 1f.3 on end # SMBus