Remove whitespace.
[coreboot.git] / src / mainboard / getac / p470 / acpi / i945_pci_irqs.asl
1 /*
2  * This file is part of the coreboot project.
3  *
4  * Copyright (C) 2007-2009 coresystems GmbH
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; version 2 of
9  * the License.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
19  * MA 02110-1301 USA
20  */
21
22 /* This is board specific information: IRQ routing for the
23  * i945
24  */
25
26
27 // PCI Interrupt Routing
28 Method(_PRT)
29 {
30         If (PICM) {
31                 Return (Package() {
32                         // PCIe Graphics                0:1.0
33                         Package() { 0x0001ffff, 0, 0, 16 },
34                         // Onboard graphics (IGD)       0:2.0
35                         Package() { 0x0002ffff, 0, 0, 16 },
36                         // Network
37                         Package() { 0x0007ffff, 0, 0, 16 },
38                         // High Definition Audio        0:1b.0
39                         Package() { 0x001bffff, 0, 0, 22 },
40                         // PCIe Root Ports              0:1c.x
41                         Package() { 0x001cffff, 0, 0, 17 },
42                         Package() { 0x001cffff, 1, 0, 16 },
43                         Package() { 0x001cffff, 2, 0, 18 },
44                         Package() { 0x001cffff, 3, 0, 19 },
45                         // USB and EHCI                 0:1d.x
46                         Package() { 0x001dffff, 0, 0, 23 },
47                         Package() { 0x001dffff, 1, 0, 19 },
48                         Package() { 0x001dffff, 2, 0, 18 },
49                         Package() { 0x001dffff, 3, 0, 16 },
50                         // AC97                         0:1e.2, 0:1e.3
51                         Package() { 0x001effff, 0, 0, 22 },
52                         Package() { 0x001effff, 1, 0, 20 },
53                         // LPC device                   0:1f.0
54                         Package() { 0x001fffff, 0, 0, 18 },
55                         Package() { 0x001fffff, 1, 0, 19 },
56                         Package() { 0x001fffff, 3, 0, 16 }
57                 })
58         } Else {
59                 Return (Package() {
60                         // PCIe Graphics                0:1.0
61                         Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
62                         // Onboard graphics (IGD)       0:2.0
63                         Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
64                         // Network                      0:7.0
65                         Package() { 0x0007ffff, 0, \_SB.PCI0.LPCB.LNKA, 0 },
66                         // High Definition Audio        0:1b.0
67                         Package() { 0x001bffff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
68                         // PCIe Root Ports              0:1c.x
69                         Package() { 0x001cffff, 0, \_SB.PCI0.LPCB.LNKB, 0 },
70                         Package() { 0x001cffff, 1, \_SB.PCI0.LPCB.LNKA, 0 },
71                         Package() { 0x001cffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
72                         Package() { 0x001cffff, 3, \_SB.PCI0.LPCB.LNKD, 0 },
73                         // USB and EHCI                 0:1d.x
74                         Package() { 0x001dffff, 0, \_SB.PCI0.LPCB.LNKH, 0 },
75                         Package() { 0x001dffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },
76                         Package() { 0x001dffff, 2, \_SB.PCI0.LPCB.LNKC, 0 },
77                         Package() { 0x001dffff, 3, \_SB.PCI0.LPCB.LNKA, 0 },
78                         // AC97                         0:1e.2, 0:1e.3
79                         Package() { 0x001effff, 0, \_SB.PCI0.LPCB.LNKG, 0 },
80                         Package() { 0x001effff, 1, \_SB.PCI0.LPCB.LNKE, 0 },
81                         // LPC device                   0:1f.0
82                         Package() { 0x001fffff, 0, \_SB.PCI0.LPCB.LNKC, 0 },
83                         Package() { 0x001fffff, 1, \_SB.PCI0.LPCB.LNKD, 0 },
84                         Package() { 0x001fffff, 3, \_SB.PCI0.LPCB.LNKA, 0 }
85                 })
86         }
87 }
88