3 uses USE_FALLBACK_IMAGE
4 uses HAVE_FALLBACK_BOOT
8 uses CONFIG_ROM_PAYLOAD
13 uses MAINBOARD_PART_NUMBER
14 uses COREBOOT_EXTRA_VERSION
23 uses ROM_SECTION_OFFSET
24 uses CONFIG_ROM_PAYLOAD_START
25 uses CONFIG_COMPRESSED_PAYLOAD_LZMA
26 uses CONFIG_PRECOMPRESSED_PAYLOAD
38 uses DEFAULT_CONSOLE_LOGLEVEL
39 uses MAXIMUM_CONSOLE_LOGLEVEL
40 default DEFAULT_CONSOLE_LOGLEVEL=9
41 default MAXIMUM_CONSOLE_LOGLEVEL=9
42 ## ROM_SIZE is the size of boot ROM that this board will use.
43 default ROM_SIZE = 1024*1024
50 ## Build code for the fallback boot
52 default HAVE_FALLBACK_BOOT=1
57 default HAVE_MP_TABLE=0
60 ## Build code to reset the motherboard from coreboot
62 default HAVE_HARD_RESET=1
65 ## use io based udelay function
67 default CONFIG_UDELAY_IO=1
70 ## Build code to export a programmable irq routing table
72 default HAVE_PIRQ_TABLE=1
73 default IRQ_SLOT_COUNT=5
77 ## Build code to export a CMOS option table
79 default HAVE_OPTION_TABLE=1
82 ### coreboot layout values
85 ## ROM_IMAGE_SIZE is the amount of space to allow coreboot to occupy.
86 default ROM_IMAGE_SIZE = 65536
87 default FALLBACK_SIZE = 131072
90 ## Use a small 8K stack
92 default STACK_SIZE=0x2000
95 ## Use a small 16K heap
97 default HEAP_SIZE=0x4000
100 ## Only use the option table in a normal image
102 #default USE_OPTION_TABLE = !USE_FALLBACK_IMAGE
103 default USE_OPTION_TABLE = 0
105 default _RAMBASE = 0x00004000
107 default CONFIG_ROM_PAYLOAD = 1
110 ## The default compiler
112 default CC="$(CROSS_COMPILE)gcc -m32"