1 #include <console/console.h>
2 #include <arch/smp/mpspec.h>
3 #include <arch/ioapic.h>
4 #include <device/pci.h>
8 static void *smp_write_config_table(void *v)
10 static const char sig[4] = "PCMP";
11 static const char oem[8] = "COREBOOT";
12 static const char productid[12] = "S2850 ";
13 struct mp_config_table *mc;
14 unsigned char bus_num;
15 unsigned char bus_isa;
16 unsigned char bus_pxhd_1;
17 unsigned char bus_pxhd_2;
18 unsigned char bus_pxhd_3;
19 unsigned char bus_pxhd_4;
20 unsigned char bus_ich5r_1;
22 mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
23 memset(mc, 0, sizeof(*mc));
25 memcpy(mc->mpc_signature, sig, sizeof(sig));
26 mc->mpc_length = sizeof(*mc); /* initially just the header */
28 mc->mpc_checksum = 0; /* not yet computed */
29 memcpy(mc->mpc_oem, oem, sizeof(oem));
30 memcpy(mc->mpc_productid, productid, sizeof(productid));
33 mc->mpc_entry_count = 0; /* No entries yet... */
34 mc->mpc_lapic = LAPIC_ADDR;
39 smp_write_processors(mc);
45 dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
47 bus_ich5r_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
48 bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
52 printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
58 dev = dev_find_slot(1, PCI_DEVFN(0x0,0));
60 bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
64 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.0, using defaults\n");
69 dev = dev_find_slot(1, PCI_DEVFN(0x00,2));
71 bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
75 printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.2, using defaults\n");
81 dev = dev_find_slot(0, PCI_DEVFN(0x4,0));
83 bus_pxhd_3 = pci_read_config8(dev, PCI_SECONDARY_BUS);
87 printk(BIOS_DEBUG, "ERROR - could not find PCI 0:04.0, using defaults\n");
92 dev = dev_find_slot(0, PCI_DEVFN(0x06,0));
94 bus_pxhd_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
98 printk(BIOS_DEBUG, "ERROR - could not find PCI 0:06.0, using defaults\n");
105 /* define bus and isa numbers */
106 for(bus_num = 0; bus_num < bus_isa; bus_num++) {
107 smp_write_bus(mc, bus_num, "PCI ");
109 smp_write_bus(mc, bus_isa, "ISA ");
111 /* IOAPIC handling */
113 smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
115 struct resource *res;
118 dev = dev_find_slot(1, PCI_DEVFN(0x00,1));
120 res = find_resource(dev, PCI_BASE_ADDRESS_0);
122 smp_write_ioapic(mc, 0x03, 0x20, res->base);
126 printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n");
129 dev = dev_find_slot(1, PCI_DEVFN(0x00,3));
131 res = find_resource(dev, PCI_BASE_ADDRESS_0);
133 smp_write_ioapic(mc, 0x04, 0x20, res->base);
137 printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
141 mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
143 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
144 0x00, 0x74, 0x02, 0x10);
145 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
146 0x00, 0x76, 0x02, 0x12);
147 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
148 0x00, 0x77, 0x02, 0x17);
149 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
150 0x00, 0x75, 0x02, 0x13);
151 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
152 0x00, 0x74, 0x02, 0x10);
153 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
154 0x00, 0x7c, 0x02, 0x12);
155 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
156 0x00, 0x7d, 0x02, 0x11);
157 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
158 bus_pxhd_1, 0x08, 0x03, 0x00);
159 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
160 bus_pxhd_1, 0x0c, 0x03, 0x06);
161 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
162 bus_pxhd_1, 0x0d, 0x03, 0x07);
163 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
164 bus_pxhd_2, 0x08, 0x04, 0x00);
165 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
166 bus_ich5r_1, 0x04, 0x02, 0x10);
167 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
168 bus_pxhd_4, 0x00, 0x02, 0x10);
170 smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
171 (bus_isa - 1), 0x04, 0x02, 0x10);
173 /* Standard local interrupt assignments */
175 smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
176 bus_isa, 0x00, MP_APIC_ALL, 0x00);
178 smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
179 bus_isa, 0x00, MP_APIC_ALL, 0x01);
181 /* There is no extension information... */
183 /* Compute the checksums */
184 mc->mpe_checksum = smp_compute_checksum(smp_next_mpc_entry(mc), mc->mpe_length);
186 mc->mpc_checksum = smp_compute_checksum(mc, mc->mpc_length);
187 printk(BIOS_DEBUG, "Wrote the mp table end at: %p - %p\n",
188 mc, smp_next_mpe_entry(mc));
189 return smp_next_mpe_entry(mc);
192 unsigned long write_smp_table(unsigned long addr)
195 v = smp_write_floating_table(addr);
196 return (unsigned long)smp_write_config_table(v);