src/mainboard/arima/hdama/Config.lb

   1 ##
   2 ## Compute the location and size of where this firmware image
   3 ## (linuxBIOS plus bootloader) will live in the boot rom chip.
   4 ##
   5 if USE_FALLBACK_IMAGE
   6         default ROM_SECTION_SIZE   = FALLBACK_SIZE
   7         default ROM_SECTION_OFFSET = ( ROM_SIZE - FALLBACK_SIZE )
   8 else
   9         default ROM_SECTION_SIZE   = ( ROM_SIZE - FALLBACK_SIZE )
  10         default ROM_SECTION_OFFSET = 0
  11 end
  12
  13 ##
  14 ## Compute the start location and size size of
  15 ## The linuxBIOS bootloader.
  16 ##
  17 default PAYLOAD_SIZE            = ( ROM_SECTION_SIZE - ROM_IMAGE_SIZE )
  18 default CONFIG_ROM_STREAM_START = (0xffffffff - ROM_SIZE + ROM_SECTION_OFFSET + 1)
  19
  20 ##
  21 ## Compute where this copy of linuxBIOS will start in the boot rom
  22 ##
  23 default _ROMBASE      = ( CONFIG_ROM_STREAM_START + PAYLOAD_SIZE )
  24
  25 ##
  26 ## Compute a range of ROM that can cached to speed up linuxBIOS,
  27 ## execution speed.
  28 ##
  29 ## XIP_ROM_SIZE must be a power of 2.
  30 ## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
  31 ##
  32 default XIP_ROM_SIZE=65536
  33 default XIP_ROM_BASE = ( _ROMBASE + ROM_IMAGE_SIZE - XIP_ROM_SIZE )
  34
  35 arch i386 end
  36
  37 ##
  38 ## Build the objects we have code for in this directory.
  39 ##
  40
  41 driver mainboard.o
  42 if HAVE_MP_TABLE object mptable.o end
  43 if HAVE_PIRQ_TABLE object irq_tables.o end
  44 #object reset.o
  45
  46 ##
  47 ## Romcc output
  48 ##
  49 makerule ./failover.E
  50         depends "$(MAINBOARD)/failover.c"
  51         action "$(CPP) -I$(TOP)/src $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/failover.c > ./failover.E"
  52 end
  53
  54 makerule ./failover.inc
  55         depends "./failover.E ./romcc"
  56         action "./romcc -O -o failover.inc --label-prefix=failover ./failover.E"
  57 end
  58
  59 makerule ./auto.E
  60         depends "$(MAINBOARD)/auto.c option_table.h "
  61         action  "$(CPP) -I$(TOP)/src -I. $(ROMCCPPFLAGS) $(CPPFLAGS) $(MAINBOARD)/auto.c > ./auto.E"
  62 end
  63 makerule ./auto.inc
  64         depends "./auto.E ./romcc"
  65         action  "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc"
  66 end
  67
  68 ##
  69 ## Build our 16 bit and 32 bit linuxBIOS entry code
  70 ##
  71 mainboardinit cpu/x86/16bit/entry16.inc
  72 mainboardinit cpu/x86/32bit/entry32.inc
  73 ldscript /cpu/x86/16bit/entry16.lds
  74 ldscript /cpu/x86/32bit/entry32.lds
  75
  76 ##
  77 ## Build our reset vector (This is where linuxBIOS is entered)
  78 ##
  79 if USE_FALLBACK_IMAGE
  80         mainboardinit cpu/x86/16bit/reset16.inc
  81         ldscript /cpu/x86/16bit/reset16.lds
  82 else
  83         mainboardinit cpu/x86/32bit/reset32.inc
  84         ldscript /cpu/x86/32bit/reset32.lds
  85 end
  86
  87 ### Should this be in the northbridge code?
  88 mainboardinit arch/i386/lib/cpu_reset.inc
  89
  90 ##
  91 ## Include an id string (For safe flashing)
  92 ##
  93 mainboardinit arch/i386/lib/id.inc
  94 ldscript /arch/i386/lib/id.lds
  95
  96 ###
  97 ### This is the early phase of linuxBIOS startup
  98 ### Things are delicate and we test to see if we should
  99 ### failover to another image.
 100 ###
 101 if USE_FALLBACK_IMAGE
 102         ldscript /arch/i386/lib/failover.lds
 103         mainboardinit ./failover.inc
 104 end
 105
 106 ###
 107 ### O.k. We aren't just an intermediary anymore!
 108 ###
 109
 110 ##
 111 ## Setup RAM
 112 ##
 113 mainboardinit cpu/x86/fpu/enable_fpu.inc
 114 mainboardinit cpu/x86/mmx/enable_mmx.inc
 115 mainboardinit cpu/x86/sse/enable_sse.inc
 116 mainboardinit ./auto.inc
 117 mainboardinit cpu/x86/sse/disable_sse.inc
 118 mainboardinit cpu/x86/mmx/disable_mmx.inc
 119
 120 ##
 121 ## Include the secondary Configuration files
 122 ##
 123 dir /pc80
 124 config chip.h
 125
 126 # config for arima/hdama
 127 chip northbridge/amd/amdk8
 128         device pci_domain 0 on
 129                 device pci 18.0 on #  northbridge
 130                         #  devices on link 0, link 0 == LDT 0
 131                         chip southbridge/amd/amd8131
 132                                 # the on/off keyword is mandatory
 133                                 device pci 0.0 on end
 134                                 device pci 0.1 on end
 135                                 device pci 1.0 on end
 136                                 device pci 1.1 on end
 137                         end
 138                         chip southbridge/amd/amd8111
 139                                 # this "device pci 0.0" is the parent the next one
 140                                 # PCI bridge
 141                                 device pci 0.0 on
 142                                         device pci 0.0 on end
 143                                         device pci 0.1 on end
 144                                         device pci 0.2 off end
 145                                         device pci 1.0 off end
 146                                 end
 147                                 device pci 1.0 on
 148                                         chip superio/NSC/pc87360
 149                                                 device  pnp 2e.0 off  # Floppy
 150                                                          io 0x60 = 0x3f0
 151                                                         irq 0x70 = 6
 152                                                         drq 0x74 = 2
 153                                                 end
 154                                                 device pnp 2e.1 off  # Parallel Port
 155                                                          io 0x60 = 0x378
 156                                                         irq 0x70 = 7
 157                                                 end
 158                                                 device pnp 2e.2 off # Com 2
 159                                                          io 0x60 = 0x2f8
 160                                                         irq 0x70 = 3
 161                                                 end
 162                                                 device pnp 2e.3 on  # Com 1
 163                                                          io 0x60 = 0x3f8
 164                                                         irq 0x70 = 4
 165                                                 end
 166                                                 device pnp 2e.4 off end # SWC
 167                                                 device pnp 2e.5 off end # Mouse
 168                                                 device pnp 2e.6 on  # Keyboard
 169                                                          io 0x60 = 0x60
 170                                                          io 0x62 = 0x64
 171                                                         irq 0x70 = 1
 172                                                 end
 173                                                 device pnp 2e.7 off end # GPIO
 174                                                 device pnp 2e.8 off end # ACB
 175                                                 device pnp 2e.9 off end # FSCM
 176                                                 device pnp 2e.a off end # WDT
 177                                         end
 178                                 end
 179                                 device pci 1.1 on end
 180                                 device pci 1.2 on end
 181                                 device pci 1.3 on
 182                                         chip drivers/generic/generic
 183                                                 #phillips pca9545 smbus mux
 184                                                 device i2c 70 on
 185                                                         # analog_devices adm1026
 186                                                         chip drivers/generic/generic
 187                                                                 device i2c 2c on end
 188                                                         end
 189                                                 end
 190                                                 device i2c 70 on end
 191                                                 device i2c 70 on end
 192                                                 device i2c 70 on end
 193                                         end
 194                                         chip drivers/generic/generic #dimm 0-0-0
 195                                                 device i2c 50 on end
 196                                         end
 197                                         chip drivers/generic/generic #dimm 0-0-1
 198                                                 device i2c 51 on end
 199                                         end
 200                                         chip drivers/generic/generic #dimm 0-1-0
 201                                                 device i2c 52 on end
 202                                         end
 203                                         chip drivers/generic/generic #dimm 0-1-1
 204                                                 device i2c 53 on end
 205                                         end
 206                                         chip drivers/generic/generic #dimm 1-0-0
 207                                                 device i2c 54 on end
 208                                         end
 209                                         chip drivers/generic/generic #dimm 1-0-1
 210                                                 device i2c 55 on end
 211                                         end
 212                                         chip drivers/generic/generic #dimm 1-1-0
 213                                                 device i2c 56 on end
 214                                         end
 215                                         chip drivers/generic/generic #dimm 1-1-1
 216                                                 device i2c 57 on end
 217                                         end
 218                                 end
 219                                 device pci 1.5 off end
 220                                 device pci 1.6 on end
 221                                 register "ide0_enable" = "1"
 222                                 register "ide1_enable" = "1"
 223                         end
 224                 end #  device pci 18.0
 225
 226                 device pci 18.0 on end # LDT1
 227                 device pci 18.0 on end # LDT2
 228                 device pci 18.1 on end
 229                 device pci 18.2 on end
 230                 device pci 18.3 on end
 231
 232                 chip northbridge/amd/amdk8
 233                         device pci 19.0 on end
 234                         device pci 19.0 on end
 235                         device pci 19.0 on end
 236                         device pci 19.1 on end
 237                         device pci 19.2 on end
 238                         device pci 19.3 on end
 239                 end
 240         end
 241         device apic_cluster 0 on
 242                 chip cpu/amd/socket_940
 243                         device apic 0 on end
 244                 end
 245                 chip cpu/amd/socket_940
 246                         device apic 1 on end
 247                 end
 248         end
 249 end
 250