2 * This file is part of the coreboot project.
4 * Copyright (C) 2007 Advanced Micro Devices, Inc.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 #include <console/console.h>
22 #include <arch/acpi.h>
23 #include <arch/ioapic.h>
24 #include <device/pci.h>
25 #include <device/pci_ids.h>
26 #include <cpu/x86/msr.h>
27 #include <cpu/amd/mtrr.h>
28 #include <cpu/amd/amdfam10_sysconf.h>
30 #include "mb_sysconf.h"
32 #define DUMP_ACPI_TABLES 0
34 #if DUMP_ACPI_TABLES == 1
35 static void dump_mem(u32 start, u32 end)
39 print_debug("dump_mem:");
40 for(i=start;i<end;i++) {
42 printk(BIOS_DEBUG, "\n%08x:", i);
44 printk(BIOS_DEBUG, " %02x", (unsigned char)*((unsigned char *)i));
50 extern const unsigned char AmlCode[];
51 extern const unsigned char AmlCode_ssdt[];
53 #if CONFIG_ACPI_SSDTX_NUM >= 1
54 extern const unsigned char AmlCode_ssdt2[];
55 extern const unsigned char AmlCode_ssdt3[];
56 extern const unsigned char AmlCode_ssdt4[];
57 extern const unsigned char AmlCode_ssdt5[];
60 unsigned long acpi_fill_mcfg(unsigned long current)
66 unsigned long acpi_fill_madt(unsigned long current)
70 struct mb_sysconf_t *m;
74 /* create all subtables for processors */
75 current = acpi_create_madt_lapics(current);
77 /* Write 8111 IOAPIC */
78 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8111,
81 /* Write all 8131 IOAPICs */
85 dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN((sysconf.hcdn[0]&0xff), 1));
87 res = find_resource(dev, PCI_BASE_ADDRESS_0);
89 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132_1,
90 res->base, gsi_base );
95 dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN((sysconf.hcdn[0] & 0xff)+1, 1));
97 res = find_resource(dev, PCI_BASE_ADDRESS_0);
99 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132_2,
100 res->base, gsi_base );
108 for(i=1; i< sysconf.hc_possible_num; i++) {
110 if(!(sysconf.pci1234[i] & 0x1) ) continue;
111 // 8131 need to use +4
112 switch (sysconf.hcid[i]) {
120 switch (sysconf.hcid[i]) {
123 dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1));
125 res = find_resource(dev, PCI_BASE_ADDRESS_0);
127 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132a[j][0],
128 res->base, gsi_base );
132 dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1));
134 res = find_resource(dev, PCI_BASE_ADDRESS_0);
136 current += acpi_create_madt_ioapic((acpi_madt_ioapic_t *)current, m->apicid_8132a[j][1],
137 res->base, gsi_base );
148 current += acpi_create_madt_irqoverride( (acpi_madt_irqoverride_t *) current, 0, 0, 2, 5 );
149 /* 0: mean bus 0--->ISA */
152 /* 5 mean: 0101 --> Edige-triggered, Active high*/
155 /* create all subtables for processors */
156 current = acpi_create_madt_lapic_nmis(current, 5, 1);
157 /* 1: LINT1 connect to NMI */
162 unsigned long write_acpi_tables(unsigned long start)
164 unsigned long current;
175 acpi_header_t *ssdtx;
180 get_bus_conf(); //it will get sblk, pci1234, hcdn, and sbdn
182 /* Align ACPI tables to 16 bytes */
183 start = ( start + 0x0f) & -0x10;
186 printk(BIOS_INFO, "ACPI: Writing ACPI tables at %lx...\n", start);
188 /* We need at least an RSDP and an RSDT Table */
189 rsdp = (acpi_rsdp_t *) current;
190 current += sizeof(acpi_rsdp_t);
191 rsdt = (acpi_rsdt_t *) current;
192 current += sizeof(acpi_rsdt_t);
194 /* clear all table memory */
195 memset((void *)start, 0, current - start);
197 acpi_write_rsdp(rsdp, rsdt, NULL);
198 acpi_write_rsdt(rsdt);
201 * We explicitly add these tables later on:
203 current = ( current + 0x07) & -0x08;
204 printk(BIOS_DEBUG, "ACPI: * HPET at %lx\n", current);
205 hpet = (acpi_hpet_t *) current;
206 current += sizeof(acpi_hpet_t);
207 acpi_create_hpet(hpet);
208 acpi_add_table(rsdp, hpet);
210 /* If we want to use HPET Timers Linux wants an MADT */
211 current = ( current + 0x07) & -0x08;
212 printk(BIOS_DEBUG, "ACPI: * MADT at %lx\n", current);
213 madt = (acpi_madt_t *) current;
214 acpi_create_madt(madt);
215 current+=madt->header.length;
216 acpi_add_table(rsdp, madt);
219 current = ( current + 0x07) & -0x08;
220 printk(BIOS_DEBUG, "ACPI: * SRAT at %lx\n", current);
221 srat = (acpi_srat_t *) current;
222 acpi_create_srat(srat);
223 current+=srat->header.length;
224 acpi_add_table(rsdp, srat);
227 current = ( current + 0x07) & -0x08;
228 printk(BIOS_DEBUG, "ACPI: * SLIT at %lx\n", current);
229 slit = (acpi_slit_t *) current;
230 acpi_create_slit(slit);
231 current+=slit->header.length;
232 acpi_add_table(rsdp, slit);
235 current = ( current + 0x0f) & -0x10;
236 printk(BIOS_DEBUG, "ACPI: * SSDT at %lx\n", current);
237 ssdt = (acpi_header_t *)current;
238 memcpy(ssdt, &AmlCode_ssdt, sizeof(acpi_header_t));
239 current += ssdt->length;
240 memcpy(ssdt, &AmlCode_ssdt, ssdt->length);
241 //Here you need to set value in pci1234, sblk and sbdn in get_bus_conf.c
242 update_ssdt((void*)ssdt);
243 /* recalculate checksum */
245 ssdt->checksum = acpi_checksum((unsigned char *)ssdt, ssdt->length);
246 acpi_add_table(rsdp, ssdt);
248 printk(BIOS_DEBUG, "ACPI: * SSDT for PState at %lx\n", current);
249 current = acpi_add_ssdt_pstates(rsdp, current);
251 #if CONFIG_ACPI_SSDTX_NUM >= 1
253 /* same htio, but different possition? We may have to copy,
254 change HCIN, and recalculate the checknum and add_table */
256 for(i=1;i<sysconf.hc_possible_num;i++) { // 0: is hc sblink
257 if((sysconf.pci1234[i] & 1) != 1 ) continue;
260 c = (u8) ('4' + i - 1);
263 c = (u8) ('A' + i - 1 - 6);
265 current = ( current + 0x07) & -0x08;
266 printk(BIOS_DEBUG, "ACPI: * SSDT for PCI%c at %lx\n", c, current); //pci0 and pci1 are in dsdt
267 ssdtx = (acpi_header_t *)current;
268 switch(sysconf.hcid[i]) {
282 memcpy(ssdtx, p, sizeof(acpi_header_t));
283 current += ssdtx->length;
284 memcpy(ssdtx, p, ssdtx->length);
285 update_ssdtx((void *)ssdtx, i);
287 ssdtx->checksum = acpi_checksum((u8 *)ssdtx, ssdtx->length);
288 acpi_add_table(rsdp, ssdtx);
293 current = ( current + 0x07) & -0x08;
294 printk(BIOS_DEBUG, "ACPI: * DSDT at %lx\n", current);
295 dsdt = (acpi_header_t *)current;
296 memcpy(dsdt, &AmlCode, sizeof(acpi_header_t));
297 current += dsdt->length;
298 memcpy(dsdt, &AmlCode, dsdt->length);
299 printk(BIOS_DEBUG, "ACPI: * DSDT @ %p Length %x\n", dsdt, dsdt->length);
301 /* FACS */ // it needs 64 bit alignment
302 current = ( current + 0x07) & -0x08;
303 printk(BIOS_DEBUG, "ACPI: * FACS at %lx\n", current);
304 facs = (acpi_facs_t *) current;
305 current += sizeof(acpi_facs_t);
306 acpi_create_facs(facs);
309 current = ( current + 0x07) & -0x08;
310 printk(BIOS_DEBUG, "ACPI: * FADT at %lx\n", current);
311 fadt = (acpi_fadt_t *) current;
312 current += sizeof(acpi_fadt_t);
314 acpi_create_fadt(fadt, facs, dsdt);
315 acpi_add_table(rsdp, fadt);
317 #if DUMP_ACPI_TABLES == 1
318 printk(BIOS_DEBUG, "rsdp\n");
319 dump_mem(rsdp, ((void *)rsdp) + sizeof(acpi_rsdp_t));
321 printk(BIOS_DEBUG, "rsdt\n");
322 dump_mem(rsdt, ((void *)rsdt) + sizeof(acpi_rsdt_t));
324 printk(BIOS_DEBUG, "madt\n");
325 dump_mem(madt, ((void *)madt) + madt->header.length);
327 printk(BIOS_DEBUG, "srat\n");
328 dump_mem(srat, ((void *)srat) + srat->header.length);
330 printk(BIOS_DEBUG, "slit\n");
331 dump_mem(slit, ((void *)slit) + slit->header.length);
333 printk(BIOS_DEBUG, "ssdt\n");
334 dump_mem(ssdt, ((void *)ssdt) + ssdt->length);
336 printk(BIOS_DEBUG, "fadt\n");
337 dump_mem(fadt, ((void *)fadt) + fadt->header.length);
340 printk(BIOS_INFO, "ACPI: done.\n");