This patch unifies the use of config options in v2 to all start with CONFIG_
[coreboot.git] / src / cpu / ppc / ppc4xx / pci_domain.c
1 /*
2  * Initialisation of the PCI bridge .
3  */
4
5 #include <arch/io.h>
6 #include <device/pci.h>
7 #include <device/pci_ids.h>
8 #include <console/console.h>
9
10 static unsigned int pci_domain_scan_bus(device_t dev, unsigned int max)
11 {
12         max = pci_scan_bus(&dev->link[0], PCI_DEVFN(0, 0), 0xff, max);
13         return max;
14 }
15
16 static void pci_domain_read_resources(device_t dev)
17 {
18         struct resource *resource;
19
20         /* Initialize the system wide io space constraints */
21         resource = new_resource(dev, IOINDEX_SUBTRACTIVE(0,0));
22         resource->limit = 0xffffUL;
23         resource->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
24
25         /* Initialize the system wide memory resources constraints */
26         resource = new_resource(dev, IOINDEX_SUBTRACTIVE(1,0));
27         resource->limit = 0xffffffffULL;
28         resource->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED;
29 }
30
31 static void ram_resource(device_t dev, unsigned long index,
32         unsigned long basek, unsigned long sizek)
33 {
34         struct resource *resource;
35
36         if (!sizek) {
37                 return;
38         }
39         resource = new_resource(dev, index);
40         resource->base  = ((resource_t)basek) << 10;
41         resource->size  = ((resource_t)sizek) << 10;
42         resource->flags =  IORESOURCE_MEM | IORESOURCE_CACHEABLE | \
43                 IORESOURCE_FIXED | IORESOURCE_STORED | IORESOURCE_ASSIGNED;
44 }
45
46 static void pci_domain_set_resources(device_t dev)
47 {
48         int idx = 3; /* who knows? */
49
50         ram_resource(dev, idx, 0, CONFIG_EMBEDDED_RAM_SIZE>>10);
51         assign_resources(&dev->link[0]);
52 }
53
54 struct device_operations pci_domain_ops  = {
55         .read_resources   = pci_domain_read_resources,
56         .set_resources    = pci_domain_set_resources,
57         .enable_resources = enable_childrens_resources,
58         .init             = 0,
59         .scan_bus         = pci_domain_scan_bus,
60         .ops_pci_bus      = &pci_ppc_conf1
61 };
62
63 static void enable_dev(struct device *dev)
64 {
65         /* Set the operations if it is a special bus type */
66         if (dev->path.type == DEVICE_PATH_PCI_DOMAIN) {
67                 dev->ops = &pci_domain_ops;
68         }
69 }
70
71 struct chip_operations cpu_ppc_ppc4xx_ops = {
72         CHIP_NAME("PPC 4XX CPU")
73         .enable_dev = enable_dev,
74 };