2 ## This file is part of the coreboot repair project.
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5 ## modification, are permitted provided that the following conditions
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28 mainmenu "Coreboot Configuration"
33 string "Local version string"
35 Append an extra string to the end of the coreboot version.
37 This can be useful if, for instance, you want to append the
38 respective board's hostname or some other identifying string to
39 the coreboot version number, so that you can easily distinguish
40 boot logs of different boards from each other.
44 source src/mainboard/Kconfig
45 source src/arch/i386/Kconfig
46 source src/arch/ppc/Kconfig
47 source src/northbridge/Kconfig
48 source src/devices/Kconfig
49 source src/southbridge/Kconfig
50 source src/superio/Kconfig
51 source src/cpu/Kconfig
53 config PCI_BUS_SEGN_BITS
57 config MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID
61 config MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID
69 config AGP_APERTURE_SIZE
81 config LB_CKS_RANGE_START
85 config LB_CKS_RANGE_END
117 config USE_PRINTK_IN_CAR
121 config USE_OPTION_TABLE
129 config MMCONF_SUPPORT_DEFAULT
133 config MMCONF_SUPPORT
141 config COMPRESSED_PAYLOAD_LZMA
145 config COMPRESSED_PAYLOAD_NRV2B
153 source src/console/Kconfig
155 config HAVE_ACPI_RESUME
159 config ACPI_SSDTX_NUM
163 config HAVE_FALLBACK_BOOT
167 config USE_FALLBACK_IMAGE
171 config HAVE_FAILOVER_BOOT
175 config USE_FAILOVER_IMAGE
179 config HAVE_HARD_RESET
183 config HAVE_INIT_TIMER
187 config HAVE_MAINBOARD_RESOURCES
195 config HAVE_OPTION_TABLE
199 This variable specifies whether a given board has a cmos.layout
200 file containing NVRAM/CMOS bit definitions.
201 It defaults to 'y' but can be changed to 'n' in mainboard/*/Kconfig.
207 config HAVE_SMI_HANDLER
211 config PCI_IO_CFG_EXT
223 config USE_WATCHDOG_ON_BOOT
231 Build board-specific VGA code.
237 Enable Unified Memory Architecture for graphics.
244 config HAVE_ACPI_TABLES
247 This variable specifies whether a given board has ACPI table support.
248 It is usually set in mainboard/*/Kconfig.
249 Whether or not the ACPI tables are actually generated by coreboot
250 is configurable by the user via GENERATE_ACPI_TABLES.
255 This variable specifies whether a given board has MP table support.
256 It is usually set in mainboard/*/Kconfig.
257 Whether or not the MP table is actually generated by coreboot
258 is configurable by the user via GENERATE_MP_TABLE.
260 config HAVE_PIRQ_TABLE
263 This variable specifies whether a given board has PIRQ table support.
264 It is usually set in mainboard/*/Kconfig.
265 Whether or not the PIRQ table is actually generated by coreboot
266 is configurable by the user via GENERATE_PIRQ_TABLE.
268 config HAVE_HIGH_TABLES
273 config HAVE_LOW_TABLES
277 config WRITE_HIGH_TABLES
278 bool "Write 'high' tables to avoid being overwritten in F segment"
279 depends on HAVE_HIGH_TABLES
283 bool "Generate Multiboot tables (for GRUB2)"
286 config GENERATE_ACPI_TABLES
287 depends on HAVE_ACPI_TABLES
288 bool "Generate ACPI tables"
291 Generate ACPI tables for this board.
295 config GENERATE_MP_TABLE
296 depends on HAVE_MP_TABLE
297 bool "Generate an MP table"
300 Generate an MP table (conforming to the Intel MultiProcessor
301 specification 1.4) for this board.
305 config GENERATE_PIRQ_TABLE
306 depends on HAVE_PIRQ_TABLE
307 bool "Generate a PIRQ table"
310 Generate a PIRQ table for this board.
319 prompt "Add a payload"
325 Select this option if you want to create an "empty" coreboot
326 ROM image for a certain mainboard, i.e. a coreboot ROM image
327 which does not yet contain a payload.
329 For such an image to be useful, you have to use 'cbfstool'
330 to add a payload to the ROM image later.
333 bool "An ELF executable payload"
335 Select this option if you have a payload image (an ELF file)
336 which coreboot should run as soon as the basic hardware
337 initialization is completed.
339 You will be able to specify the location and file name of the
344 config FALLBACK_PAYLOAD_FILE
345 string "Payload path and filename"
346 depends on PAYLOAD_ELF
347 default "payload.elf"
349 The path and filename of the ELF executable file to use as payload.
351 # TODO: Defined if no payload? Breaks build?
352 config COMPRESSED_PAYLOAD_LZMA
353 bool "Use LZMA compression for payloads"
355 depends on PAYLOAD_ELF
357 In order to reduce the size payloads take up in the ROM chip
358 coreboot can compress them using the LZMA algorithm.
365 bool "Add a VGA BIOS image"
367 Select this option if you have a VGA BIOS image that you would
368 like to add to your ROM.
370 You will be able to specify the location and file name of the
373 config FALLBACK_VGA_BIOS_FILE
374 string "VGA BIOS path and filename"
376 default "vgabios.bin"
378 The path and filename of the file to use as VGA BIOS.
380 config FALLBACK_VGA_BIOS_ID
385 The comma-separated PCI vendor and device ID that would associate
386 your VGA BIOS to your video card.
390 In the above example 1106 is the PCI vendor ID (in hex, but without
391 the "0x" prefix) and 3230 specifies the PCI device ID of the
392 video card (also in hex, without "0x" prefix).
398 # TODO: Better help text and detailed instructions.
400 bool "GDB debugging support"
403 If enabled, you will be able to set breakpoints for gdb debugging.
404 See src/arch/i386/lib/c_start.S for details.