2 * This file is part of the libpayload project.
4 * Copyright (C) 2008 Advanced Micro Devices, Inc.
5 * Copyright (C) 2008 coresystems GmbH
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34 #include <arch/types.h>
37 #define REG_VENDOR_ID 0x00
38 #define REG_COMMAND 0x04
39 #define REG_CLASS_DEV 0x0A
40 #define REG_HEADER_TYPE 0x0E
41 #define REG_PRIMARY_BUS 0x18
42 #define REG_SUBSYS_VENDOR_ID 0x2C
43 #define REG_SUBSYS_ID 0x2E
45 #define REG_COMMAND_IO (1 << 0)
46 #define REG_COMMAND_MEM (1 << 1)
47 #define REG_COMMAND_BM (1 << 2)
49 #define HEADER_TYPE_NORMAL 0
50 #define HEADER_TYPE_BRIDGE 1
51 #define HEADER_TYPE_CARDBUS 2
53 #define PCI_ADDR(_bus, _dev, _fn, _reg) \
54 (0x80000000 | (_bus << 16) | (_dev << 11) | (_fn << 8) | (_reg & ~3))
56 #define PCI_DEV(_bus, _dev, _fn) \
57 (0x80000000 | (_bus << 16) | (_dev << 11) | (_fn << 8))
59 #define PCI_BUS(_d) ((_d >> 16) & 0xff)
60 #define PCI_SLOT(_d) ((_d >> 11) & 0x1f)
61 #define PCI_FUNC(_d) ((_d >> 8) & 0x7)
63 u8 pci_read_config8(u32 device, u16 reg);
64 u16 pci_read_config16(u32 device, u16 reg);
65 u32 pci_read_config32(u32 device, u16 reg);
67 void pci_write_config8(u32 device, u16 reg, u8 val);
68 void pci_write_config16(u32 device, u16 reg, u16 val);
69 void pci_write_config32(u32 device, u16 reg, u32 val);
71 int pci_find_device(u16 vid, u16 did, pcidev_t *dev);
72 u32 pci_read_resource(pcidev_t dev, int bar);
74 void pci_set_bus_master(pcidev_t dev);