1 coreboot-4.0-2039-gd16b170 Wed Feb 8 17:29:28 CET 2012 starting...
\r
5 cimx/rd890 early.c nb_Poweron_Init() Start
\r
6 cimx/rd890 early.c nb_Poweron_Init() End. return status=0
\r
10 BSP Family_Model: 00100fa0
\r
11 *sysinfo range: [000cc000,000cf360]
\r
13 cpu_init_detectedx = 00000000
\r
14 microcode: equivalent rev id = 0x10a0, current patch id = 0x00000000
\r
15 microcode: patch id to apply = 0x010000bf
\r
16 microcode: updated to patch id = 0x010000bf success
\r
24 SB900 - Early.c - get_sbdn - Start.
\r
25 SB900 - Early.c - get_sbdn - End.
\r
26 cpuSetAMDPCI 00 done
\r
27 Prep FID/VID Node:00
\r
28 P-state info in MSRC001_0064 is invalid !!!
\r
29 P-state info in MSRc0010064 is invalid !!!
\r
38 init node: 00 cores: 05
\r
39 Start other core - nodeid: 00 cores: 05
\r
41 started ap apicid: PPPPPOOOOOSSSSSTTTTT::::: 00000xxxxx3333300000
\r\r\r\r\r
46 cccccooooorrrrreeeeexxxxx::::: --------------- {{{{{ AAAAAPPPPPIIIIICCCCCIIIIIDDDDD ===== 0000054213 NNNNNOOOOODDDDDEEEEEIIIIIDDDDD ===== 0000000000 CCCCCOOOOORRRRREEEEEIIIIIDDDDD ===== 0000015423}}}}} ---------------
\r\r\r\r\r
51 * AmmmmmiiiiPicccc crrrr0roooo1occcccooooodddddeeeee::::: eeeeeqqqqquuuuuiiiiivvvvvaaaaallllleeeeennnnnttttt rrrrreeeeevvvvv iiiiiddddd ===== 00000xxxxx1111100000aaaaa00000,,,,, cccccuuuuurrrrrrrrrreeeeennnnnttttt pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx0000000000000000000000000000000000000000
\r\r\r\r\r
56 startmmemmmiiiiidccccc
\rrrrrr
57 ooooocccccooooodddddeeeee::::: pppppaaaaatttttccccchhhhh iiiiiddddd tttttooooo aaaaapppppppppplllllyyyyy ===== 00000xxxxx000001111100000000000000000000bbbbbfffff
\r\r\r\r\r
62 mmmmm*iiiii cccccArrrrrPooooo ccccc0ooooo2dddddeeeee::::: uuuuupppppdddddaaaaattttteeeeeddddd tttttooooo pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx000001111100000000000000000000bbbbbfffff sssssuuuuucccccccccceeeeessssssssss
\r\r\r\r\r
72 scccctpppcpauuupurSSSuSteeeSeetttetdAAAtA
\rMMMAM
73 DDDMDMMMDMSSSMSRRRSR R * AP 0 dddd3dooooonnnnneeeee
\r\r\r\r\r
78 siiitiinannnniriiiitttttt_e____fdffffi
\riiiid
79 ddddvvvvviiiiiddddd_____aaaaappppp(((((ssssstttttaaaaagggggeeeee11111))))) aaaaapppppiiiiiccccciiiiiddddd::::: 0000045132
\r\r\r\r\r
84 FF*FFFII IIIDDADDDVVPVVVII IIIDD0DDD 4 ooooonnnnn AAAAAPPPPP::::: 0000013245
\r\r\r\r\r
94 Begin FIDVID MSR 0xc0010071 0x31c20031 0x40013440
\r
96 FIDVID on BSP, APIC_id: 00
\r
98 Wait for AP stage 1: ap_apicid = 1
\r
100 common_fid(packed) = 0
\r
101 Wait for AP stage 1: ap_apicid = 2
\r
103 common_fid(packed) = 0
\r
104 Wait for AP stage 1: ap_apicid = 3
\r
106 common_fid(packed) = 0
\r
107 Wait for AP stage 1: ap_apicid = 4
\r
109 common_fid(packed) = 0
\r
110 Wait for AP stage 1: ap_apicid = 5
\r
112 common_fid(packed) = 0
\r
115 End FIDVIDMSR 0xc0010071 0x31c20031 0x40013440
\r
121 coreboot-4.0-2039-gd16b170 Wed Feb 8 17:29:28 CET 2012 starting...
\r
125 cimx/rd890 early.c nb_Poweron_Init() Start
\r
126 cimx/rd890 early.c nb_Poweron_Init() End. return status=0
\r
128 AmdHtInit status: 0
\r
130 BSP Family_Model: 00100fa0
\r
131 *sysinfo range: [000cc000,000cf360]
\r
133 cpu_init_detectedx = 00000000
\r
134 microcode: equivalent rev id = 0x10a0, current patch id = 0x00000000
\r
135 microcode: patch id to apply = 0x010000bf
\r
136 microcode: updated to patch id = 0x010000bf success
\r
141 Enter amd_ht_init()
\r
144 SB900 - Early.c - get_sbdn - Start.
\r
145 SB900 - Early.c - get_sbdn - End.
\r
146 cpuSetAMDPCI 00 done
\r
147 Prep FID/VID Node:00
\r
148 P-state info in MSRC001_0064 is invalid !!!
\r
149 P-state info in MSRc0010064 is invalid !!!
\r
157 start_other_cores()
\r
158 init node: 00 cores: 05
\r
159 Start other core - nodeid: 00 cores: 05
\r
161 started ap apicid: PPPPPOOOOOSSSSSTTTTT::::: 00000xxxxx3333300000
\r\r\r\r\r
166 cccccooooorrrrreeeeexxxxx::::: --------------- {{{{{ AAAAAPPPPPIIIIICCCCCIIIIIDDDDD ===== 0000053142 NNNNNOOOOODDDDDEEEEEIIIIIDDDDD ===== 0000000000 CCCCCOOOOORRRRREEEEEIIIIIDDDDD ===== 0000024153}}}}} ---------------
\r\r\r\r\r
171 * AmmmmmiiiiiPcc cccrrrrr0ooo1oocccccooooodddddeeeee::::: eeeeeqqqqquuuuuiiiiivvvvvaaaaallllleeeeennnnnttttt rrrrreeeeevvvvv iiiiiddddd ===== 00000xxxxx1111100000aaaaa00000,,,,, cccccuuuuurrrrrrrrrreeeeennnnnttttt pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx0000000000000000000000000000000000000000
\r\r\r\r\r
176 startemmmmmidiiiicccc
\rcr
177 rrrrooooocccccooooodddddeeeee::::: pppppaaaaatttttccccchhhhh iiiiiddddd tttttooooo aaaaapppppppppplllllyyyyy ===== 00000xxxxx000001111100000000000000000000bbbbbfffff
\r\r\r\r\r
182 mmmmm* iiiiicccAccrPrrrroooo oc0ccccoooo2odddddeeeee::::: uuuuupppppdddddaaaaattttteeeeeddddd tttttooooo pppppaaaaatttttccccchhhhh iiiiiddddd ===== 00000xxxxx000001111100000000000000000000bbbbbfffff sssssuuuuucccccccccceeeeessssssssss
\r\r\r\r\r
192 scccccptppppuuuuauSrSSSSeeeeetttetttAAAAAdMM
\rMMM
193 DDDDDMMMMMSSSSSRRRRR * AP 0 d3ddddooooonnnnneeeee
\r\r\r\r\r
198 stiiiiinannnniiiiritttttt____e_ffdfffiiiii
\rdd
199 dddvvvvviiiiiddddd_____ssssstttttaaaaagggggeeeee22222 aaaaapppppiiiiiccccciiiiiddddd::::: 0000023154
\r\r\r\r\r
209 Begin FIDVID MSR 0xc0010071 0x31c20031 0x40013440
\r
212 End FIDVIDMSR 0xc0010071 0x31c20031 0x40013440
\r
217 raminit_amdmct begin:
\r
218 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
219 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
220 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
221 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
222 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
223 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
224 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
225 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
226 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
227 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
228 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
229 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
230 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
231 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
232 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
233 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
234 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
235 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
236 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
237 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
238 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
239 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
240 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
241 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
242 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
243 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
244 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
245 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
246 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
247 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
248 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
249 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
250 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
251 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
252 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
253 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
254 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
255 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
256 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
257 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
258 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
259 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
260 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
261 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
262 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
263 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
264 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
265 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
266 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
267 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
268 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
269 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
270 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
271 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
272 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
273 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
274 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
275 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
276 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
277 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
278 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
279 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
280 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
281 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
282 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
283 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
284 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
285 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
286 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
287 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
288 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
289 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
290 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
291 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
292 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
293 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
294 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
295 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
296 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
297 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
298 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
299 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
300 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
301 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
302 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
303 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
304 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
305 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
306 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
307 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
308 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
309 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
310 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
311 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
312 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
313 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
314 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
315 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
316 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
317 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
318 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
319 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
320 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
321 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
322 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
323 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
324 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
325 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
326 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
327 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
328 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
329 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
330 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
331 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
332 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
333 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
334 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
335 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
336 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
337 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
338 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
339 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
340 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
341 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
342 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
343 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
344 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
345 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
346 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
347 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
348 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
349 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
350 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
351 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
352 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
353 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
354 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
355 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
356 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
357 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
358 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
359 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
360 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
361 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
362 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
363 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
364 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
365 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
366 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
367 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
368 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
369 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
370 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
371 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
372 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
373 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
374 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
375 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
376 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
377 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
378 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
379 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
380 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
381 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
382 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
383 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
384 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
385 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
386 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
387 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
388 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
389 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
390 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
391 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
392 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
393 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
394 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
395 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
396 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
397 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
398 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
399 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
400 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
401 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
402 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
403 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
404 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
405 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
406 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
407 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
408 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
409 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
410 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
411 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
412 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
413 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
414 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
415 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
416 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
417 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
418 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
419 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
420 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
421 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
422 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
423 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
424 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
425 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
426 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
427 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
428 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
429 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
430 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
431 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
432 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
433 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
434 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
435 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
436 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
437 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
438 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
439 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
440 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
441 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
442 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
443 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
444 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
445 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
446 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
447 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
448 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
449 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
450 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
451 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
452 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
453 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
454 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
455 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
456 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
457 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
458 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
459 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
460 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
461 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
462 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
463 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
464 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
465 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
466 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
467 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
468 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
469 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
470 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
471 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
472 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
473 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
474 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
475 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
476 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
477 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
478 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
479 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
480 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
481 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
482 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
483 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
484 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
485 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
486 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
487 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
488 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
489 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
490 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
491 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
492 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
493 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
494 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
495 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
496 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
497 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
498 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
499 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
500 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
501 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
502 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
503 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
504 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
505 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
506 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
507 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
508 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
509 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
510 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
511 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
512 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
513 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
514 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
515 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
516 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
517 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
518 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
519 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
520 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
521 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
522 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
523 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
524 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
525 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
526 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
527 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
528 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
529 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
530 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
531 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
532 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
533 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
534 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
535 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
536 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
537 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
538 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
539 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
540 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
541 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
542 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
543 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
544 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
545 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
546 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
547 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
548 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
549 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
550 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
551 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
552 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
553 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
554 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
555 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
556 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
557 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
558 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
559 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
560 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
561 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
562 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
563 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
564 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
565 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
566 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
567 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
568 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
569 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
570 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
571 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
572 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
573 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
574 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
575 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
576 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
577 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
578 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
579 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
580 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
581 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
582 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
583 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
584 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
585 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
586 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
587 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
588 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
589 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
590 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
591 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
592 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
593 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
594 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
595 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
596 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
597 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
598 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
599 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
600 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
601 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
602 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
603 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
604 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
605 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
606 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
607 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
608 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
609 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
610 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
611 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
612 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
613 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
614 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
615 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
616 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
617 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
618 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
619 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
620 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
621 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
622 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
623 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
624 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
625 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
626 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
627 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
628 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
629 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
630 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
631 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
632 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
633 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
634 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
635 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
636 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
637 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
638 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
639 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
640 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
641 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
642 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
643 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
644 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
645 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
646 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
647 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
648 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
649 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
650 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
651 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
652 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
653 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
654 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
655 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
656 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
657 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
658 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
659 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
660 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
661 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
662 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
663 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
664 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
665 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
666 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
667 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
668 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
669 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
670 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
671 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
672 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
673 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
674 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
675 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
676 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
677 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
678 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
679 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
680 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
681 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
682 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
683 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
684 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
685 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
686 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
687 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
688 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
689 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
690 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
691 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
692 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
693 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
694 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
695 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
696 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
697 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
698 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
699 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
700 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
701 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
702 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
703 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
704 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
705 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
706 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
707 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
708 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
709 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
710 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
711 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
712 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
713 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
714 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
715 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
716 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
717 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
718 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
719 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
720 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
721 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
722 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
723 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
724 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
725 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
726 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
727 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
728 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
729 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
730 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
731 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
732 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
733 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
734 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
735 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
736 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
737 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
738 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
739 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
740 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
741 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
742 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
743 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
744 DIMMPresence: DIMMValid=c
\r
745 DIMMPresence: DIMMPresent=c
\r
746 DIMMPresence: RegDIMMPresent=0
\r
747 DIMMPresence: DimmECCPresent=0
\r
748 DIMMPresence: DimmPARPresent=0
\r
749 DIMMPresence: Dimmx4Present=0
\r
750 DIMMPresence: Dimmx8Present=c
\r
751 DIMMPresence: Dimmx16Present=0
\r
752 DIMMPresence: DimmPlPresent=0
\r
753 DIMMPresence: DimmDRPresent=c
\r
754 DIMMPresence: DimmQRPresent=0
\r
755 DIMMPresence: DATAload[0]=2
\r
756 DIMMPresence: MAload[0]=10
\r
757 DIMMPresence: MAdimms[0]=1
\r
758 DIMMPresence: DATAload[1]=2
\r
759 DIMMPresence: MAload[1]=10
\r
760 DIMMPresence: MAdimms[1]=1
\r
761 DIMMPresence: Status 1000
\r
762 DIMMPresence: ErrStatus 0
\r
763 DIMMPresence: ErrCode 0
\r
766 DCTInit_D: mct_DIMMPresence Done
\r
767 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
768 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
769 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
770 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
771 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
772 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
773 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
774 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
775 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
776 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
777 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
778 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
779 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
780 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
781 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
782 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
783 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
784 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
785 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
786 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
787 SPDCalcWidth: Status 1000
\r
788 SPDCalcWidth: ErrStatus 0
\r
789 SPDCalcWidth: ErrCode 0
\r
791 DCTInit_D: mct_SPDCalcWidth Done
\r
792 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
793 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
794 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
795 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
796 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
797 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
798 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
799 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
800 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
801 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
802 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
803 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
804 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
805 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
806 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
807 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
808 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
809 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
810 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
811 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
812 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
813 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
814 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
815 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
816 SPDGetTCL_D: DIMMCASL 4
\r
817 SPDGetTCL_D: DIMMAutoSpeed 4
\r
818 SPDGetTCL_D: Status 1000
\r
819 SPDGetTCL_D: ErrStatus 0
\r
820 SPDGetTCL_D: ErrCode 0
\r
823 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
824 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
825 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
826 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
827 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
828 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
829 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
830 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
831 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
832 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
833 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
834 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
835 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
836 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
837 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
838 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
839 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
840 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
841 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
842 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
843 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
844 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
845 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
846 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
847 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
848 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
849 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
850 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
851 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
852 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
853 AutoCycTiming: Status 1000
\r
854 AutoCycTiming: ErrStatus 0
\r
855 AutoCycTiming: ErrCode 0
\r
856 AutoCycTiming: Done
\r
858 DCTInit_D: AutoCycTiming_D Done
\r
859 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
860 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
861 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
862 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
863 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
864 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
865 SPDSetBanks: CSPresent c
\r
866 SPDSetBanks: Status 1000
\r
867 SPDSetBanks: ErrStatus 0
\r
868 SPDSetBanks: ErrCode 0
\r
871 AfterStitch pDCTstat->NodeSysBase = 0
\r
872 mct_AfterStitchMemory: pDCTstat->NodeSysLimit = ffffff
\r
873 StitchMemory: Status 1000
\r
874 StitchMemory: ErrStatus 0
\r
875 StitchMemory: ErrCode 0
\r
878 InterleaveBanks_D: Status 1000
\r
879 InterleaveBanks_D: ErrStatus 0
\r
880 InterleaveBanks_D: ErrCode 0
\r
881 InterleaveBanks_D: Done
\r
883 AutoConfig_D: DramControl: 2a06
\r
884 AutoConfig_D: DramTimingLo: 90092
\r
885 AutoConfig_D: DramConfigMisc: 0
\r
886 AutoConfig_D: DramConfigMisc2: 0
\r
887 AutoConfig_D: DramConfigLo: 10000
\r
888 AutoConfig_D: DramConfigHi: f40000b
\r
889 AutoConfig: Status 1000
\r
890 AutoConfig: ErrStatus 0
\r
891 AutoConfig: ErrCode 0
\r
894 DCTInit_D: AutoConfig_D Done
\r
895 DCTInit_D: PlatformSpec_D Done
\r
896 DCTInit_D: StartupDCT_D
\r
897 DCTInit_D: mct_DIMMPresence Done
\r
898 SPDCalcWidth: Status 1000
\r
899 SPDCalcWidth: ErrStatus 0
\r
900 SPDCalcWidth: ErrCode 0
\r
902 DCTInit_D: mct_SPDCalcWidth Done
\r
903 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
904 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
905 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
906 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
907 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
908 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
909 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
910 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
911 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
912 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
913 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
914 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
915 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
916 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
917 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
918 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
919 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
920 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
921 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
922 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
923 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
924 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
925 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
926 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
927 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
928 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
929 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
930 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
931 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
932 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
933 AutoCycTiming: Status 1000
\r
934 AutoCycTiming: ErrStatus 0
\r
935 AutoCycTiming: ErrCode 0
\r
936 AutoCycTiming: Done
\r
938 DCTInit_D: AutoCycTiming_D Done
\r
939 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
940 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
941 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
942 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
943 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
944 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
945 SPDSetBanks: CSPresent c
\r
946 SPDSetBanks: Status 1000
\r
947 SPDSetBanks: ErrStatus 0
\r
948 SPDSetBanks: ErrCode 0
\r
951 AfterStitch pDCTstat->NodeSysBase = 0
\r
952 mct_AfterStitchMemory: pDCTstat->NodeSysLimit = 1fffffe
\r
953 StitchMemory: Status 1000
\r
954 StitchMemory: ErrStatus 0
\r
955 StitchMemory: ErrCode 0
\r
958 InterleaveBanks_D: Status 1000
\r
959 InterleaveBanks_D: ErrStatus 0
\r
960 InterleaveBanks_D: ErrCode 0
\r
961 InterleaveBanks_D: Done
\r
963 AutoConfig_D: DramControl: 2a06
\r
964 AutoConfig_D: DramTimingLo: 90092
\r
965 AutoConfig_D: DramConfigMisc: 0
\r
966 AutoConfig_D: DramConfigMisc2: 0
\r
967 AutoConfig_D: DramConfigLo: 10000
\r
968 AutoConfig_D: DramConfigHi: f40000b
\r
969 AutoConfig: Status 1000
\r
970 AutoConfig: ErrStatus 0
\r
971 AutoConfig: ErrCode 0
\r
974 DCTInit_D: AutoConfig_D Done
\r
975 DCTInit_D: PlatformSpec_D Done
\r
976 DCTInit_D: StartupDCT_D
\r
977 mctAutoInitMCT_D: SyncDCTsReady_D
\r
978 mctAutoInitMCT_D: HTMemMapInit_D
\r
979 Node: 00 base: 00 limit: 1ffffff BottomIO: e00000
\r
980 Node: 00 base: 03 limit: 21fffff
\r
981 Node: 01 base: 00 limit: 00
\r
982 Node: 02 base: 00 limit: 00
\r
983 Node: 03 base: 00 limit: 00
\r
984 Node: 04 base: 00 limit: 00
\r
985 Node: 05 base: 00 limit: 00
\r
986 Node: 06 base: 00 limit: 00
\r
987 Node: 07 base: 00 limit: 00
\r
988 mctAutoInitMCT_D: CPUMemTyping_D
\r
989 CPUMemTyping: Cache32bTOP:e00000
\r
990 CPUMemTyping: Bottom32bIO:e00000
\r
991 CPUMemTyping: Bottom40bIO:2200000
\r
992 mctAutoInitMCT_D: DQSTiming_D
\r
993 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
994 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
995 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
996 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
997 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
998 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
999 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1000 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1001 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1002 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1003 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1004 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1005 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1006 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1007 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1008 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1009 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1010 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1011 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1012 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1013 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1014 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1015 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1016 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1017 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1018 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1019 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1020 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1021 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1022 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1023 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1024 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1025 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1026 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1027 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1028 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1029 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1030 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1031 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1032 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1033 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1034 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1035 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1036 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1037 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1038 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1039 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1040 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1041 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1042 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1043 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1044 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1045 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1046 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1047 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1048 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1049 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1050 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1051 SB900 - Smbus.c - do_smbus_read_byte - Start.
\r
1052 SB900 - Smbus.c - do_smbus_read_byte - End.
\r
1053 TrainRcvrEn: Status 1100
\r
1054 TrainRcvrEn: ErrStatus 0
\r
1055 TrainRcvrEn: ErrCode 0
\r
1058 TrainDQSRdWrPos: Status 1100
\r
1059 TrainDQSRdWrPos: TrainErrors 0
\r
1060 TrainDQSRdWrPos: ErrStatus 0
\r
1061 TrainDQSRdWrPos: ErrCode 0
\r
1062 TrainDQSRdWrPos: Done
\r
1064 TrainDQSRdWrPos: Status 1100
\r
1065 TrainDQSRdWrPos: TrainErrors 0
\r
1066 TrainDQSRdWrPos: ErrStatus 0
\r
1067 TrainDQSRdWrPos: ErrCode 0
\r
1068 TrainDQSRdWrPos: Done
\r
1070 TrainDQSRdWrPos: Status 1100
\r
1071 TrainDQSRdWrPos: TrainErrors 0
\r
1072 TrainDQSRdWrPos: ErrStatus 0
\r
1073 TrainDQSRdWrPos: ErrCode 0
\r
1074 TrainDQSRdWrPos: Done
\r
1076 TrainDQSRdWrPos: Status 1100
\r
1077 TrainDQSRdWrPos: TrainErrors 0
\r
1078 TrainDQSRdWrPos: ErrStatus 0
\r
1079 TrainDQSRdWrPos: ErrCode 0
\r
1080 TrainDQSRdWrPos: Done
\r
1082 mctAutoInitMCT_D: UMAMemTyping_D
\r
1083 mctAutoInitMCT_D: :OtherTiming
\r
1084 InterleaveNodes_D: Status 1100
\r
1085 InterleaveNodes_D: ErrStatus 0
\r
1086 InterleaveNodes_D: ErrCode 0
\r
1087 InterleaveNodes_D: Done
\r
1089 InterleaveChannels_D: Node 0
\r
1090 InterleaveChannels_D: Status 1100
\r
1091 InterleaveChannels_D: ErrStatus 0
\r
1092 InterleaveChannels_D: ErrCode 0
\r
1093 InterleaveChannels_D: Node 1
\r
1094 InterleaveChannels_D: Status 1000
\r
1095 InterleaveChannels_D: ErrStatus 0
\r
1096 InterleaveChannels_D: ErrCode 0
\r
1097 InterleaveChannels_D: Node 2
\r
1098 InterleaveChannels_D: Status 1000
\r
1099 InterleaveChannels_D: ErrStatus 0
\r
1100 InterleaveChannels_D: ErrCode 0
\r
1101 InterleaveChannels_D: Node 3
\r
1102 InterleaveChannels_D: Status 1000
\r
1103 InterleaveChannels_D: ErrStatus 0
\r
1104 InterleaveChannels_D: ErrCode 0
\r
1105 InterleaveChannels_D: Node 4
\r
1106 InterleaveChannels_D: Status 1000
\r
1107 InterleaveChannels_D: ErrStatus 0
\r
1108 InterleaveChannels_D: ErrCode 0
\r
1109 InterleaveChannels_D: Node 5
\r
1110 InterleaveChannels_D: Status 1000
\r
1111 InterleaveChannels_D: ErrStatus 0
\r
1112 InterleaveChannels_D: ErrCode 0
\r
1113 InterleaveChannels_D: Node 6
\r
1114 InterleaveChannels_D: Status 1000
\r
1115 InterleaveChannels_D: ErrStatus 0
\r
1116 InterleaveChannels_D: ErrCode 0
\r
1117 InterleaveChannels_D: Node 7
\r
1118 InterleaveChannels_D: Status 1000
\r
1119 InterleaveChannels_D: ErrStatus 0
\r
1120 InterleaveChannels_D: ErrCode 0
\r
1121 InterleaveChannels_D: Done
\r
1123 mctAutoInitMCT_D: ECCInit_D
\r
1125 raminit_amdmct end:
\r
1130 Copying data from cache to RAM -- switching to use RAM as stack... Done
\r
1132 Disabling cache as ram now
\r
1133 Clearing initial memory region: Done
\r
1135 Searching for fallback/coreboot_ram
\r
1136 Check cmos_layout.bin
\r
1137 Check fallback/romstage
\r
1138 Check fallback/coreboot_ram
\r
1139 Stage: loading fallback/coreboot_ram @ 0x200000 (1310720 bytes), entry @ 0x200000
\r
1140 Stage: done loading.
\r
1144 coreboot-4.0-2039-gd16b170 Wed Feb 8 17:29:28 CET 2012 booting...
\r
1146 Enumerating buses...
\r
1147 Show all devs...Before device enumeration.
\r
1148 Root Device: enabled 1
\r
1149 APIC_CLUSTER: 0: enabled 1
\r
1150 APIC: 00: enabled 1
\r
1151 PCI_DOMAIN: 0000: enabled 1
\r
1152 PCI: 00:18.0: enabled 1
\r
1153 PCI: 00:00.0: enabled 1
\r
1154 PCI: 00:00.1: enabled 0
\r
1155 PCI: 00:02.0: enabled 1
\r
1156 PCI: 00:03.0: enabled 0
\r
1157 PCI: 00:04.0: enabled 0
\r
1158 PCI: 00:05.0: enabled 0
\r
1159 PCI: 00:06.0: enabled 0
\r
1160 PCI: 00:07.0: enabled 0
\r
1161 PCI: 00:08.0: enabled 0
\r
1162 PCI: 00:09.0: enabled 0
\r
1163 PCI: 00:0a.0: enabled 0
\r
1164 PCI: 00:0b.0: enabled 0
\r
1165 PCI: 00:0c.0: enabled 0
\r
1166 PCI: 00:0d.0: enabled 1
\r
1167 PCI: 00:11.0: enabled 1
\r
1168 PCI: 00:12.0: enabled 1
\r
1169 PCI: 00:12.2: enabled 1
\r
1170 PCI: 00:13.0: enabled 1
\r
1171 PCI: 00:13.2: enabled 1
\r
1172 PCI: 00:14.0: enabled 1
\r
1173 I2C: 00:50: enabled 1
\r
1174 I2C: 00:51: enabled 1
\r
1175 I2C: 00:52: enabled 1
\r
1176 I2C: 00:53: enabled 1
\r
1177 PCI: 00:14.1: enabled 1
\r
1178 PCI: 00:14.2: enabled 1
\r
1179 PCI: 00:14.3: enabled 1
\r
1180 PNP: 002e.0: enabled 0
\r
1181 PNP: 002e.1: enabled 0
\r
1182 PNP: 002e.2: enabled 1
\r
1183 PNP: 002e.3: enabled 1
\r
1184 PNP: 002e.5: enabled 1
\r
1185 PNP: 002e.6: enabled 0
\r
1186 PNP: 002e.7: enabled 0
\r
1187 PNP: 002e.8: enabled 0
\r
1188 PNP: 002e.9: enabled 0
\r
1189 PNP: 002e.a: enabled 0
\r
1190 PNP: 002e.b: enabled 1
\r
1191 PCI: 00:14.4: enabled 0
\r
1192 PCI: 00:14.5: enabled 1
\r
1193 PCI: 00:14.6: enabled 0
\r
1194 PCI: 00:15.0: enabled 1
\r
1195 PCI: 00:15.1: enabled 1
\r
1196 PCI: 00:15.2: enabled 1
\r
1197 PCI: 00:15.3: enabled 1
\r
1198 PCI: 00:16.0: enabled 1
\r
1199 PCI: 00:16.2: enabled 1
\r
1200 PCI: 00:18.1: enabled 1
\r
1201 PCI: 00:18.2: enabled 1
\r
1202 PCI: 00:18.3: enabled 1
\r
1203 PCI: 00:18.4: enabled 1
\r
1204 Compare with tree...
\r
1205 Root Device: enabled 1
\r
1206 APIC_CLUSTER: 0: enabled 1
\r
1207 APIC: 00: enabled 1
\r
1208 PCI_DOMAIN: 0000: enabled 1
\r
1209 PCI: 00:18.0: enabled 1
\r
1210 PCI: 00:00.0: enabled 1
\r
1211 PCI: 00:00.1: enabled 0
\r
1212 PCI: 00:02.0: enabled 1
\r
1213 PCI: 00:03.0: enabled 0
\r
1214 PCI: 00:04.0: enabled 0
\r
1215 PCI: 00:05.0: enabled 0
\r
1216 PCI: 00:06.0: enabled 0
\r
1217 PCI: 00:07.0: enabled 0
\r
1218 PCI: 00:08.0: enabled 0
\r
1219 PCI: 00:09.0: enabled 0
\r
1220 PCI: 00:0a.0: enabled 0
\r
1221 PCI: 00:0b.0: enabled 0
\r
1222 PCI: 00:0c.0: enabled 0
\r
1223 PCI: 00:0d.0: enabled 1
\r
1224 PCI: 00:11.0: enabled 1
\r
1225 PCI: 00:12.0: enabled 1
\r
1226 PCI: 00:12.2: enabled 1
\r
1227 PCI: 00:13.0: enabled 1
\r
1228 PCI: 00:13.2: enabled 1
\r
1229 PCI: 00:14.0: enabled 1
\r
1230 I2C: 00:50: enabled 1
\r
1231 I2C: 00:51: enabled 1
\r
1232 I2C: 00:52: enabled 1
\r
1233 I2C: 00:53: enabled 1
\r
1234 PCI: 00:14.1: enabled 1
\r
1235 PCI: 00:14.2: enabled 1
\r
1236 PCI: 00:14.3: enabled 1
\r
1237 PNP: 002e.0: enabled 0
\r
1238 PNP: 002e.1: enabled 0
\r
1239 PNP: 002e.2: enabled 1
\r
1240 PNP: 002e.3: enabled 1
\r
1241 PNP: 002e.5: enabled 1
\r
1242 PNP: 002e.6: enabled 0
\r
1243 PNP: 002e.7: enabled 0
\r
1244 PNP: 002e.8: enabled 0
\r
1245 PNP: 002e.9: enabled 0
\r
1246 PNP: 002e.a: enabled 0
\r
1247 PNP: 002e.b: enabled 1
\r
1248 PCI: 00:14.4: enabled 0
\r
1249 PCI: 00:14.5: enabled 1
\r
1250 PCI: 00:14.6: enabled 0
\r
1251 PCI: 00:15.0: enabled 1
\r
1252 PCI: 00:15.1: enabled 1
\r
1253 PCI: 00:15.2: enabled 1
\r
1254 PCI: 00:15.3: enabled 1
\r
1255 PCI: 00:16.0: enabled 1
\r
1256 PCI: 00:16.2: enabled 1
\r
1257 PCI: 00:18.1: enabled 1
\r
1258 PCI: 00:18.2: enabled 1
\r
1259 PCI: 00:18.3: enabled 1
\r
1260 PCI: 00:18.4: enabled 1
\r
1261 Mainboard ASUS M5A99X-EVO Enable. dev=0x00239e2c
\r
1262 scan_static_bus for Root Device
\r
1263 APIC_CLUSTER: 0 enabled
\r
1264 PCI_DOMAIN: 0000 enabled
\r
1265 APIC_CLUSTER: 0 scanning...
\r
1266 PCI: 00:18.3 siblings=5
\r
1267 CPU: APIC: 00 enabled
\r
1268 CPU: APIC: 01 enabled
\r
1269 CPU: APIC: 02 enabled
\r
1270 CPU: APIC: 03 enabled
\r
1271 CPU: APIC: 04 enabled
\r
1272 CPU: APIC: 05 enabled
\r
1273 PCI_DOMAIN: 0000 scanning...
\r
1274 PCI: pci_scan_bus for bus 00
\r
1276 PCI: 00:18.0 [1022/1200] bus ops
\r
1277 PCI: 00:18.0 [1022/1200] enabled
\r
1278 PCI: 00:18.1 [1022/1201] enabled
\r
1279 PCI: 00:18.2 [1022/1202] enabled
\r
1280 PCI: 00:18.3 [1022/1203] ops
\r
1281 PCI: 00:18.3 [1022/1203] enabled
\r
1282 PCI: 00:18.4 [1022/1204] enabled
\r
1284 PCI: Using configuration type 1
\r
1285 PCI: 00:00.0 [1002/5a14] ops
\r
1286 PCI: 00:00.0 [1002/5a14] enabled
\r
1287 Capability: type 0x08 @ 0xf0
\r
1289 Capability: type 0x08 @ 0xf0
\r
1290 Capability: type 0x08 @ 0xc4
\r
1292 PCI: pci_scan_bus for bus 00
\r
1293 PCI: pci_scan_bus limits devfn 0 - devfn ffffffff
\r
1294 PCI: pci_scan_bus upper limit too big. Using 0xff.
\r
1296 PCI: 00:00.0 [1002/5a14] enabled
\r
1297 PCI: 00:11.0 [1002/4393] enabled
\r
1298 PCI: 00:12.0 [1002/4397] enabled
\r
1299 PCI: 00:12.2 [1002/4396] enabled
\r
1300 PCI: 00:13.0 [1002/4397] enabled
\r
1301 PCI: 00:13.2 [1002/4396] enabled
\r
1302 PCI: 00:14.0 [1002/4385] enabled
\r
1303 PCI: 00:14.1 [1002/439c] enabled
\r
1304 PCI: 00:14.2 [1002/4383] enabled
\r
1305 PCI: 00:14.3 [1002/439d] enabled
\r
1306 PCI: 00:14.4 [1002/4384] enabled
\r
1307 PCI: 00:14.5 [1002/4399] enabled
\r
1308 PCI: 00:16.0 [1002/4397] enabled
\r
1309 PCI: 00:16.2 [1002/4396] enabled
\r
1310 PCI: 00:18.0 [1022/1200] bus ops
\r
1311 PCI: 00:18.0 [1022/1200] enabled
\r
1312 PCI: 00:18.1 [1022/1201] enabled
\r
1313 PCI: 00:18.2 [1022/1202] enabled
\r
1314 PCI: 00:18.3 [1022/1203] ops
\r
1315 PCI: 00:18.3 [1022/1203] enabled
\r
1316 PCI: 00:18.4 [1022/1204] enabled
\r
1318 do_pci_scan_bridge for PCI: 00:14.4
\r
1319 PCI: pci_scan_bus for bus 01
\r
1322 PCI: pci_scan_bus returning with max=001
\r
1324 do_pci_scan_bridge returns max 1
\r
1325 PCI: pci_scan_bus returning with max=001
\r
1327 PCI: pci_scan_bus returning with max=001
\r
1329 PCI_DOMAIN: 0000 passpw: enabled
\r
1330 scan_static_bus for Root Device done
\r
1333 Allocating resources...
\r
1334 Reading resources...
\r
1335 Root Device read_resources bus 0 link: 0
\r
1336 APIC_CLUSTER: 0 read_resources bus 0 link: 0
\r
1337 APIC: 00 missing read_resources
\r
1338 APIC: 01 missing read_resources
\r
1339 APIC: 02 missing read_resources
\r
1340 APIC: 03 missing read_resources
\r
1341 APIC: 04 missing read_resources
\r
1342 APIC: 05 missing read_resources
\r
1343 APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
\r
1344 PCI_DOMAIN: 0000 read_resources bus 0 link: 0
\r
1345 PCI: 00:18.0 read_resources bus 0 link: 0
\r
1346 PCI: 00:14.4 read_resources bus 1 link: 0
\r
1347 PCI: 00:14.4 read_resources bus 1 link: 0 done
\r
1348 PCI: 00:18.0 read_resources bus 0 link: 0 done
\r
1349 PCI: 00:18.0 read_resources bus 0 link: 1
\r
1350 PCI: 00:00.0 missing read_resources
\r
1351 PCI: 00:02.0 missing read_resources
\r
1352 PCI: 00:0d.0 missing read_resources
\r
1353 PCI: 00:11.0 missing read_resources
\r
1354 PCI: 00:12.0 missing read_resources
\r
1355 PCI: 00:12.2 missing read_resources
\r
1356 PCI: 00:13.0 missing read_resources
\r
1357 PCI: 00:13.2 missing read_resources
\r
1358 PCI: 00:14.0 missing read_resources
\r
1359 PCI: 00:14.1 missing read_resources
\r
1360 PCI: 00:14.2 missing read_resources
\r
1361 PCI: 00:14.3 missing read_resources
\r
1362 PCI: 00:14.5 missing read_resources
\r
1363 PCI: 00:15.0 missing read_resources
\r
1364 PCI: 00:15.1 missing read_resources
\r
1365 PCI: 00:15.2 missing read_resources
\r
1366 PCI: 00:15.3 missing read_resources
\r
1367 PCI: 00:16.0 missing read_resources
\r
1368 PCI: 00:16.2 missing read_resources
\r
1369 PCI: 00:18.0 read_resources bus 0 link: 1 done
\r
1370 PCI: 00:18.0 read_resources bus 0 link: 2
\r
1371 PCI: 00:18.0 read_resources bus 0 link: 2 done
\r
1372 PCI: 00:18.0 read_resources bus 0 link: 3
\r
1373 PCI: 00:18.0 read_resources bus 0 link: 3 done
\r
1374 PCI: 00:18.0 read_resources bus 0 link: 4
\r
1375 PCI: 00:18.0 read_resources bus 0 link: 4 done
\r
1376 PCI: 00:18.0 read_resources bus 0 link: 5
\r
1377 PCI: 00:18.0 read_resources bus 0 link: 5 done
\r
1378 PCI: 00:18.0 read_resources bus 0 link: 6
\r
1379 PCI: 00:18.0 read_resources bus 0 link: 6 done
\r
1380 PCI: 00:18.0 read_resources bus 0 link: 7
\r
1381 PCI: 00:18.0 read_resources bus 0 link: 7 done
\r
1382 PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
\r
1383 Root Device read_resources bus 0 link: 0 done
\r
1384 Done reading resources.
\r
1385 Show resources in subtree (Root Device)...After reading.
\r
1386 Root Device child on link 0 APIC_CLUSTER: 0
\r
1387 APIC_CLUSTER: 0 child on link 0 APIC: 00
\r
1394 PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0
\r
1395 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
\r
1396 PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
\r
1397 PCI_DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
\r
1398 PCI: 00:18.0 child on link 0 PCI: 00:00.0
\r
1399 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 10d8
\r
1400 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 10b8
\r
1401 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 10b0
\r
1402 PCI: 00:18.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80100 index 110d0
\r
1403 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 81200 index 110a8
\r
1404 PCI: 00:18.0 resource base 0 size 0 align 20 gran 20 limit ffffffffff flags 80200 index 110a0
\r
1406 PCI: 00:00.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 1200 index fc
\r
1408 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
\r
1409 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
\r
1410 PCI: 00:11.0 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
\r
1411 PCI: 00:11.0 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
\r
1412 PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
\r
1413 PCI: 00:11.0 resource base 0 size 400 align 10 gran 10 limit ffffffff flags 200 index 24
\r
1415 PCI: 00:12.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
\r
1417 PCI: 00:12.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
\r
1419 PCI: 00:13.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
\r
1421 PCI: 00:13.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
\r
1424 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 10
\r
1425 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 14
\r
1426 PCI: 00:14.1 resource base 0 size 8 align 3 gran 3 limit ffff flags 100 index 18
\r
1427 PCI: 00:14.1 resource base 0 size 4 align 2 gran 2 limit ffff flags 100 index 1c
\r
1428 PCI: 00:14.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
\r
1430 PCI: 00:14.2 resource base 0 size 4000 align 14 gran 14 limit ffffffffffffffff flags 201 index 10
\r
1433 PCI: 00:14.4 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
\r
1434 PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
\r
1435 PCI: 00:14.4 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
\r
1437 PCI: 00:14.5 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
\r
1439 PCI: 00:16.0 resource base 0 size 1000 align 12 gran 12 limit ffffffff flags 200 index 10
\r
1441 PCI: 00:16.2 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 10
\r
1446 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
\r
1467 PCI: 00:14.0 child on link 0 I2C: 00:50
\r
1474 PCI: 00:14.3 child on link 0 PNP: 002e.0
\r
1476 PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1477 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1478 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74
\r
1480 PNP: 002e.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1481 PNP: 002e.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1483 PNP: 002e.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1484 PNP: 002e.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1486 PNP: 002e.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1487 PNP: 002e.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1489 PNP: 002e.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1490 PNP: 002e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
1491 PNP: 002e.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1492 PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72
\r
1494 PNP: 002e.6 resource base 100 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
1496 PNP: 002e.7 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1497 PNP: 002e.7 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
1498 PNP: 002e.7 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1503 PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1504 PNP: 002e.b resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1517 PCI: 00:18.3 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 94
\r
1519 PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
\r
1520 PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
\r
1521 PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
\r
1522 PCI: 00:14.4 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
\r
1523 PCI: 00:11.0 20 * [0x0 - 0xf] io
\r
1524 PCI: 00:14.1 20 * [0x10 - 0x1f] io
\r
1525 PCI: 00:11.0 10 * [0x20 - 0x27] io
\r
1526 PCI: 00:11.0 18 * [0x28 - 0x2f] io
\r
1527 PCI: 00:14.1 10 * [0x30 - 0x37] io
\r
1528 PCI: 00:14.1 18 * [0x38 - 0x3f] io
\r
1529 PCI: 00:11.0 14 * [0x40 - 0x43] io
\r
1530 PCI: 00:11.0 1c * [0x44 - 0x47] io
\r
1531 PCI: 00:14.1 14 * [0x48 - 0x4b] io
\r
1532 PCI: 00:14.1 1c * [0x4c - 0x4f] io
\r
1533 PCI: 00:18.0 compute_resources_io: base: 50 size: 1000 align: 12 gran: 12 limit: ffff done
\r
1534 PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
\r
1535 PCI: 00:18.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
\r
1536 PCI: 00:18.0 10d8 * [0x0 - 0xfff] io
\r
1537 PCI_DOMAIN: 0000 compute_resources_io: base: 1000 size: 1000 align: 12 gran: 0 limit: ffff done
\r
1538 PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
\r
1539 PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
\r
1540 PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
\r
1541 PCI: 00:14.4 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
\r
1542 PCI: 00:00.0 fc * [0x0 - 0xff] prefmem
\r
1543 PCI: 00:18.0 compute_resources_prefmem: base: 100 size: 100000 align: 20 gran: 20 limit: ffffffff done
\r
1544 PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
\r
1545 PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
\r
1546 PCI: 00:14.4 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
\r
1547 PCI: 00:18.3 94 * [0x0 - 0x3ffffff] mem
\r
1548 PCI: 00:14.2 10 * [0x4000000 - 0x4003fff] mem
\r
1549 PCI: 00:12.0 10 * [0x4004000 - 0x4004fff] mem
\r
1550 PCI: 00:13.0 10 * [0x4005000 - 0x4005fff] mem
\r
1551 PCI: 00:14.5 10 * [0x4006000 - 0x4006fff] mem
\r
1552 PCI: 00:16.0 10 * [0x4007000 - 0x4007fff] mem
\r
1553 PCI: 00:11.0 24 * [0x4008000 - 0x40083ff] mem
\r
1554 PCI: 00:12.2 10 * [0x4008400 - 0x40084ff] mem
\r
1555 PCI: 00:13.2 10 * [0x4008500 - 0x40085ff] mem
\r
1556 PCI: 00:16.2 10 * [0x4008600 - 0x40086ff] mem
\r
1557 PCI: 00:18.0 compute_resources_mem: base: 4008700 size: 4100000 align: 26 gran: 20 limit: ffffffff done
\r
1558 PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
\r
1559 PCI: 00:18.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff done
\r
1560 PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff
\r
1561 PCI: 00:18.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffffff done
\r
1562 PCI: 00:18.0 10b0 * [0x0 - 0x40fffff] mem
\r
1563 PCI: 00:18.3 94 * [0x8000000 - 0xbffffff] mem
\r
1564 PCI: 00:18.0 10b8 * [0xc000000 - 0xc0fffff] prefmem
\r
1565 PCI_DOMAIN: 0000 compute_resources_mem: base: c100000 size: c100000 align: 26 gran: 0 limit: ffffffff done
\r
1566 avoid_fixed_resources: PCI_DOMAIN: 0000
\r
1567 avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
\r
1568 avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
\r
1569 constrain_resources: PCI_DOMAIN: 0000
\r
1570 constrain_resources: PCI: 00:18.0
\r
1571 constrain_resources: PCI: 00:00.0
\r
1572 constrain_resources: PCI: 00:11.0
\r
1573 constrain_resources: PCI: 00:12.0
\r
1574 constrain_resources: PCI: 00:12.2
\r
1575 constrain_resources: PCI: 00:13.0
\r
1576 constrain_resources: PCI: 00:13.2
\r
1577 constrain_resources: PCI: 00:14.0
\r
1578 constrain_resources: PCI: 00:14.1
\r
1579 constrain_resources: PCI: 00:14.2
\r
1580 constrain_resources: PCI: 00:14.3
\r
1581 constrain_resources: PCI: 00:14.4
\r
1582 constrain_resources: PCI: 00:14.5
\r
1583 constrain_resources: PCI: 00:16.0
\r
1584 constrain_resources: PCI: 00:16.2
\r
1585 constrain_resources: PCI: 00:18.0
\r
1586 constrain_resources: PCI: 00:18.1
\r
1587 constrain_resources: PCI: 00:18.2
\r
1588 constrain_resources: PCI: 00:18.3
\r
1589 constrain_resources: PCI: 00:18.4
\r
1590 constrain_resources: PCI: 00:00.0
\r
1591 constrain_resources: PCI: 00:02.0
\r
1592 constrain_resources: PCI: 00:0d.0
\r
1593 constrain_resources: PCI: 00:11.0
\r
1594 constrain_resources: PCI: 00:12.0
\r
1595 constrain_resources: PCI: 00:12.2
\r
1596 constrain_resources: PCI: 00:13.0
\r
1597 constrain_resources: PCI: 00:13.2
\r
1598 constrain_resources: PCI: 00:14.0
\r
1599 constrain_resources: I2C: 00:50
\r
1600 constrain_resources: I2C: 00:51
\r
1601 constrain_resources: I2C: 00:52
\r
1602 constrain_resources: I2C: 00:53
\r
1603 constrain_resources: PCI: 00:14.1
\r
1604 constrain_resources: PCI: 00:14.2
\r
1605 constrain_resources: PCI: 00:14.3
\r
1606 constrain_resources: PNP: 002e.2
\r
1607 skipping PNP: 002e.2@60 fixed resource, size=0!
\r
1608 skipping PNP: 002e.2@70 fixed resource, size=0!
\r
1609 constrain_resources: PNP: 002e.3
\r
1610 skipping PNP: 002e.3@60 fixed resource, size=0!
\r
1611 skipping PNP: 002e.3@70 fixed resource, size=0!
\r
1612 constrain_resources: PNP: 002e.5
\r
1613 skipping PNP: 002e.5@60 fixed resource, size=0!
\r
1614 skipping PNP: 002e.5@62 fixed resource, size=0!
\r
1615 skipping PNP: 002e.5@70 fixed resource, size=0!
\r
1616 skipping PNP: 002e.5@72 fixed resource, size=0!
\r
1617 constrain_resources: PNP: 002e.b
\r
1618 skipping PNP: 002e.b@60 fixed resource, size=0!
\r
1619 skipping PNP: 002e.b@70 fixed resource, size=0!
\r
1620 constrain_resources: PCI: 00:14.5
\r
1621 constrain_resources: PCI: 00:15.0
\r
1622 constrain_resources: PCI: 00:15.1
\r
1623 constrain_resources: PCI: 00:15.2
\r
1624 constrain_resources: PCI: 00:15.3
\r
1625 constrain_resources: PCI: 00:16.0
\r
1626 constrain_resources: PCI: 00:16.2
\r
1627 constrain_resources: PCI: 00:18.1
\r
1628 constrain_resources: PCI: 00:18.2
\r
1629 constrain_resources: PCI: 00:18.3
\r
1630 constrain_resources: PCI: 00:18.4
\r
1631 avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff
\r
1632 lim->base 00000000 lim->limit 0000ffff
\r
1633 avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff
\r
1634 lim->base 00000000 lim->limit dfffffff
\r
1635 Setting resources...
\r
1636 PCI_DOMAIN: 0000 allocate_resources_io: base:0 size:1000 align:12 gran:0 limit:ffff
\r
1637 Assigned: PCI: 00:18.0 10d8 * [0x0 - 0xfff] io
\r
1638 PCI_DOMAIN: 0000 allocate_resources_io: next_base: 1000 size: 1000 align: 12 gran: 0 done
\r
1639 PCI: 00:18.0 allocate_resources_io: base:0 size:1000 align:12 gran:12 limit:ffff
\r
1640 Assigned: PCI: 00:11.0 20 * [0x0 - 0xf] io
\r
1641 Assigned: PCI: 00:14.1 20 * [0x10 - 0x1f] io
\r
1642 Assigned: PCI: 00:11.0 10 * [0x20 - 0x27] io
\r
1643 Assigned: PCI: 00:11.0 18 * [0x28 - 0x2f] io
\r
1644 Assigned: PCI: 00:14.1 10 * [0x30 - 0x37] io
\r
1645 Assigned: PCI: 00:14.1 18 * [0x38 - 0x3f] io
\r
1646 Assigned: PCI: 00:11.0 14 * [0x40 - 0x43] io
\r
1647 Assigned: PCI: 00:11.0 1c * [0x44 - 0x47] io
\r
1648 Assigned: PCI: 00:14.1 14 * [0x48 - 0x4b] io
\r
1649 Assigned: PCI: 00:14.1 1c * [0x4c - 0x4f] io
\r
1650 PCI: 00:18.0 allocate_resources_io: next_base: 50 size: 1000 align: 12 gran: 12 done
\r
1651 PCI: 00:14.4 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
\r
1652 PCI: 00:14.4 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
\r
1653 PCI: 00:18.0 allocate_resources_io: base:ffff size:0 align:12 gran:12 limit:ffff
\r
1654 PCI: 00:18.0 allocate_resources_io: next_base: ffff size: 0 align: 12 gran: 12 done
\r
1655 PCI_DOMAIN: 0000 allocate_resources_mem: base:d0000000 size:c100000 align:26 gran:0 limit:dfffffff
\r
1656 Assigned: PCI: 00:18.0 10b0 * [0xd0000000 - 0xd40fffff] mem
\r
1657 Assigned: PCI: 00:18.3 94 * [0xd8000000 - 0xdbffffff] mem
\r
1658 Assigned: PCI: 00:18.0 10b8 * [0xdc000000 - 0xdc0fffff] prefmem
\r
1659 PCI_DOMAIN: 0000 allocate_resources_mem: next_base: dc100000 size: c100000 align: 26 gran: 0 done
\r
1660 PCI: 00:18.0 allocate_resources_prefmem: base:dc000000 size:100000 align:20 gran:20 limit:dfffffff
\r
1661 Assigned: PCI: 00:00.0 fc * [0xdc000000 - 0xdc0000ff] prefmem
\r
1662 PCI: 00:18.0 allocate_resources_prefmem: next_base: dc000100 size: 100000 align: 20 gran: 20 done
\r
1663 PCI: 00:14.4 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
\r
1664 PCI: 00:14.4 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
\r
1665 PCI: 00:18.0 allocate_resources_mem: base:d0000000 size:4100000 align:26 gran:20 limit:dfffffff
\r
1666 Assigned: PCI: 00:18.3 94 * [0xd0000000 - 0xd3ffffff] mem
\r
1667 Assigned: PCI: 00:14.2 10 * [0xd4000000 - 0xd4003fff] mem
\r
1668 Assigned: PCI: 00:12.0 10 * [0xd4004000 - 0xd4004fff] mem
\r
1669 Assigned: PCI: 00:13.0 10 * [0xd4005000 - 0xd4005fff] mem
\r
1670 Assigned: PCI: 00:14.5 10 * [0xd4006000 - 0xd4006fff] mem
\r
1671 Assigned: PCI: 00:16.0 10 * [0xd4007000 - 0xd4007fff] mem
\r
1672 Assigned: PCI: 00:11.0 24 * [0xd4008000 - 0xd40083ff] mem
\r
1673 Assigned: PCI: 00:12.2 10 * [0xd4008400 - 0xd40084ff] mem
\r
1674 Assigned: PCI: 00:13.2 10 * [0xd4008500 - 0xd40085ff] mem
\r
1675 Assigned: PCI: 00:16.2 10 * [0xd4008600 - 0xd40086ff] mem
\r
1676 PCI: 00:18.0 allocate_resources_mem: next_base: d4008700 size: 4100000 align: 26 gran: 20 done
\r
1677 PCI: 00:14.4 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
\r
1678 PCI: 00:14.4 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
\r
1679 PCI: 00:18.0 allocate_resources_prefmem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
\r
1680 PCI: 00:18.0 allocate_resources_prefmem: next_base: dfffffff size: 0 align: 20 gran: 20 done
\r
1681 PCI: 00:18.0 allocate_resources_mem: base:dfffffff size:0 align:20 gran:20 limit:dfffffff
\r
1682 PCI: 00:18.0 allocate_resources_mem: next_base: dfffffff size: 0 align: 20 gran: 20 done
\r
1683 Root Device assign_resources, bus 0 link: 0
\r
1684 split: 64K table at =cfff0000
\r
1685 0: mmio_basek=00340000, basek=00400000, limitk=00880000
\r
1686 PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
\r
1687 PCI: 00:18.0 10d8 <- [0x0000000000 - 0x0000000fff] size 0x00001000 gran 0x0c io <node 0 link 0>
\r
1688 PCI: 00:18.0 10b8 <- [0x00dc000000 - 0x00dc0fffff] size 0x00100000 gran 0x14 prefmem <node 0 link 0>
\r
1689 PCI: 00:18.0 10b0 <- [0x00d0000000 - 0x00d40fffff] size 0x04100000 gran 0x14 mem <node 0 link 0>
\r
1690 PCI: 00:18.0 110d0 <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c io <node 0 link 1>
\r
1691 PCI: 00:18.0 110a8 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 prefmem <node 0 link 1>
\r
1692 PCI: 00:18.0 110a0 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 mem <node 0 link 1>
\r
1693 PCI: 00:18.0 assign_resources, bus 0 link: 0
\r
1694 PCI: 00:00.0 fc <- [0x00dc000000 - 0x00dc0000ff] size 0x00000100 gran 0x08 prefmem
\r
1695 PCI: 00:11.0 10 <- [0x0000000020 - 0x0000000027] size 0x00000008 gran 0x03 io
\r
1696 PCI: 00:11.0 14 <- [0x0000000040 - 0x0000000043] size 0x00000004 gran 0x02 io
\r
1697 PCI: 00:11.0 18 <- [0x0000000028 - 0x000000002f] size 0x00000008 gran 0x03 io
\r
1698 PCI: 00:11.0 1c <- [0x0000000044 - 0x0000000047] size 0x00000004 gran 0x02 io
\r
1699 PCI: 00:11.0 20 <- [0x0000000000 - 0x000000000f] size 0x00000010 gran 0x04 io
\r
1700 PCI: 00:11.0 24 <- [0x00d4008000 - 0x00d40083ff] size 0x00000400 gran 0x0a mem
\r
1701 PCI: 00:12.0 10 <- [0x00d4004000 - 0x00d4004fff] size 0x00001000 gran 0x0c mem
\r
1702 PCI: 00:12.2 10 <- [0x00d4008400 - 0x00d40084ff] size 0x00000100 gran 0x08 mem
\r
1703 PCI: 00:13.0 10 <- [0x00d4005000 - 0x00d4005fff] size 0x00001000 gran 0x0c mem
\r
1704 PCI: 00:13.2 10 <- [0x00d4008500 - 0x00d40085ff] size 0x00000100 gran 0x08 mem
\r
1705 PCI: 00:14.1 10 <- [0x0000000030 - 0x0000000037] size 0x00000008 gran 0x03 io
\r
1706 PCI: 00:14.1 14 <- [0x0000000048 - 0x000000004b] size 0x00000004 gran 0x02 io
\r
1707 PCI: 00:14.1 18 <- [0x0000000038 - 0x000000003f] size 0x00000008 gran 0x03 io
\r
1708 PCI: 00:14.1 1c <- [0x000000004c - 0x000000004f] size 0x00000004 gran 0x02 io
\r
1709 PCI: 00:14.1 20 <- [0x0000000010 - 0x000000001f] size 0x00000010 gran 0x04 io
\r
1710 PCI: 00:14.2 10 <- [0x00d4000000 - 0x00d4003fff] size 0x00004000 gran 0x0e mem64
\r
1711 PCI: 00:14.4 1c <- [0x000000ffff - 0x000000fffe] size 0x00000000 gran 0x0c bus 01 io
\r
1712 PCI: 00:14.4 24 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 prefmem
\r
1713 PCI: 00:14.4 20 <- [0x00dfffffff - 0x00dffffffe] size 0x00000000 gran 0x14 bus 01 mem
\r
1714 PCI: 00:14.5 10 <- [0x00d4006000 - 0x00d4006fff] size 0x00001000 gran 0x0c mem
\r
1715 PCI: 00:16.0 10 <- [0x00d4007000 - 0x00d4007fff] size 0x00001000 gran 0x0c mem
\r
1716 PCI: 00:16.2 10 <- [0x00d4008600 - 0x00d40086ff] size 0x00000100 gran 0x08 mem
\r
1717 PCI: 00:18.3 94 <- [0x00d0000000 - 0x00d3ffffff] size 0x04000000 gran 0x1a mem <gart>
\r
1718 PCI: 00:18.3 94 <- [0x00d0000000 - 0x00d3ffffff] size 0x04000000 gran 0x1a mem <gart>
\r
1719 PCI: 00:18.0 assign_resources, bus 0 link: 0
\r
1720 PCI: 00:18.0 assign_resources, bus 0 link: 1
\r
1721 PCI: 00:18.0 assign_resources, bus 0 link: 1
\r
1722 PCI: 00:18.3 94 <- [0x00d8000000 - 0x00dbffffff] size 0x04000000 gran 0x1a mem <gart>
\r
1723 PCI: 00:18.3 94 <- [0x00d8000000 - 0x00dbffffff] size 0x04000000 gran 0x1a mem <gart>
\r
1724 PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
\r
1725 Root Device assign_resources, bus 0 link: 0
\r
1726 Done setting resources.
\r
1727 Show resources in subtree (Root Device)...After assigning values.
\r
1728 Root Device child on link 0 APIC_CLUSTER: 0
\r
1729 APIC_CLUSTER: 0 child on link 0 APIC: 00
\r
1736 PCI_DOMAIN: 0000 child on link 0 PCI: 00:18.0
\r
1737 PCI_DOMAIN: 0000 resource base 0 size 1000 align 12 gran 0 limit ffff flags 40040100 index 10000000
\r
1738 PCI_DOMAIN: 0000 resource base d0000000 size c100000 align 26 gran 0 limit dfffffff flags 40040200 index 10000100
\r
1739 PCI_DOMAIN: 0000 resource base e0000000 size 10000000 align 0 gran 0 limit 0 flags f0000200 index c0010058
\r
1740 PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index 10
\r
1741 PCI_DOMAIN: 0000 resource base c0000 size cff40000 align 0 gran 0 limit 0 flags e0004200 index 20
\r
1742 PCI_DOMAIN: 0000 resource base 100000000 size 120000000 align 0 gran 0 limit 0 flags e0004200 index 30
\r
1743 PCI: 00:18.0 child on link 0 PCI: 00:00.0
\r
1744 PCI: 00:18.0 resource base 0 size 1000 align 12 gran 12 limit ffff flags 60080100 index 10d8
\r
1745 PCI: 00:18.0 resource base dc000000 size 100000 align 20 gran 20 limit dfffffff flags 60081200 index 10b8
\r
1746 PCI: 00:18.0 resource base d0000000 size 4100000 align 26 gran 20 limit dfffffff flags 60080200 index 10b0
\r
1747 PCI: 00:18.0 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080100 index 110d0
\r
1748 PCI: 00:18.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081200 index 110a8
\r
1749 PCI: 00:18.0 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080200 index 110a0
\r
1751 PCI: 00:00.0 resource base dc000000 size 100 align 8 gran 8 limit dfffffff flags 60001200 index fc
\r
1753 PCI: 00:11.0 resource base 20 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
\r
1754 PCI: 00:11.0 resource base 40 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
\r
1755 PCI: 00:11.0 resource base 28 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
\r
1756 PCI: 00:11.0 resource base 44 size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
\r
1757 PCI: 00:11.0 resource base 0 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
\r
1758 PCI: 00:11.0 resource base d4008000 size 400 align 10 gran 10 limit dfffffff flags 60000200 index 24
\r
1760 PCI: 00:12.0 resource base d4004000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
\r
1762 PCI: 00:12.2 resource base d4008400 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10
\r
1764 PCI: 00:13.0 resource base d4005000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
\r
1766 PCI: 00:13.2 resource base d4008500 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10
\r
1769 PCI: 00:14.1 resource base 30 size 8 align 3 gran 3 limit ffff flags 60000100 index 10
\r
1770 PCI: 00:14.1 resource base 48 size 4 align 2 gran 2 limit ffff flags 60000100 index 14
\r
1771 PCI: 00:14.1 resource base 38 size 8 align 3 gran 3 limit ffff flags 60000100 index 18
\r
1772 PCI: 00:14.1 resource base 4c size 4 align 2 gran 2 limit ffff flags 60000100 index 1c
\r
1773 PCI: 00:14.1 resource base 10 size 10 align 4 gran 4 limit ffff flags 60000100 index 20
\r
1775 PCI: 00:14.2 resource base d4000000 size 4000 align 14 gran 14 limit dfffffff flags 60000201 index 10
\r
1778 PCI: 00:14.4 resource base ffff size 0 align 12 gran 12 limit ffff flags 60080102 index 1c
\r
1779 PCI: 00:14.4 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60081202 index 24
\r
1780 PCI: 00:14.4 resource base dfffffff size 0 align 20 gran 20 limit dfffffff flags 60080202 index 20
\r
1782 PCI: 00:14.5 resource base d4006000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
\r
1784 PCI: 00:16.0 resource base d4007000 size 1000 align 12 gran 12 limit dfffffff flags 60000200 index 10
\r
1786 PCI: 00:16.2 resource base d4008600 size 100 align 8 gran 8 limit dfffffff flags 60000200 index 10
\r
1791 PCI: 00:18.3 resource base d0000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000200 index 94
\r
1812 PCI: 00:14.0 child on link 0 I2C: 00:50
\r
1819 PCI: 00:14.3 child on link 0 PNP: 002e.0
\r
1821 PNP: 002e.0 resource base 3f0 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1822 PNP: 002e.0 resource base 6 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1823 PNP: 002e.0 resource base 2 size 0 align 0 gran 0 limit 0 flags c0000800 index 74
\r
1825 PNP: 002e.1 resource base 378 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1826 PNP: 002e.1 resource base 7 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1828 PNP: 002e.2 resource base 3f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1829 PNP: 002e.2 resource base 4 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1831 PNP: 002e.3 resource base 2f8 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1832 PNP: 002e.3 resource base 3 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1834 PNP: 002e.5 resource base 60 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1835 PNP: 002e.5 resource base 64 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
1836 PNP: 002e.5 resource base 1 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1837 PNP: 002e.5 resource base c size 0 align 0 gran 0 limit 0 flags c0000400 index 72
\r
1839 PNP: 002e.6 resource base 100 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
1841 PNP: 002e.7 resource base 220 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1842 PNP: 002e.7 resource base 300 size 0 align 0 gran 0 limit 0 flags c0000100 index 62
\r
1843 PNP: 002e.7 resource base 9 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1848 PNP: 002e.b resource base 290 size 0 align 0 gran 0 limit 0 flags c0000100 index 60
\r
1849 PNP: 002e.b resource base 5 size 0 align 0 gran 0 limit 0 flags c0000400 index 70
\r
1862 PCI: 00:18.3 resource base d8000000 size 4000000 align 26 gran 26 limit dfffffff flags 60000200 index 94
\r
1864 Done allocating resources.
\r
1866 Enabling resources...
\r
1867 PCI: 00:18.0 cmd <- 00
\r
1868 PCI: 00:18.1 subsystem <- 1043/843e
\r
1869 PCI: 00:18.1 cmd <- 00
\r
1870 PCI: 00:18.2 subsystem <- 1043/843e
\r
1871 PCI: 00:18.2 cmd <- 00
\r
1872 PCI: 00:18.3 cmd <- 00
\r
1873 PCI: 00:18.4 subsystem <- 1043/843e
\r
1874 PCI: 00:18.4 cmd <- 00
\r
1875 PCI: 00:00.0 cmd <- 02
\r
1876 PCI: 00:11.0 cmd <- 03
\r
1877 PCI: 00:12.0 cmd <- 02
\r
1878 PCI: 00:12.2 cmd <- 02
\r
1879 PCI: 00:13.0 cmd <- 02
\r
1880 PCI: 00:13.2 cmd <- 02
\r
1881 PCI: 00:14.0 cmd <- 403
\r
1882 PCI: 00:14.1 cmd <- 01
\r
1883 PCI: 00:14.2 cmd <- 02
\r
1884 PCI: 00:14.3 cmd <- 0f
\r
1885 PCI: 00:14.4 bridge ctrl <- 0003
\r
1886 PCI: 00:14.4 cmd <- 00
\r
1887 PCI: 00:14.5 cmd <- 02
\r
1888 PCI: 00:16.0 cmd <- 02
\r
1889 PCI: 00:16.2 cmd <- 02
\r
1890 PCI: 00:18.0 cmd <- 00
\r
1891 PCI: 00:18.1 cmd <- 00
\r
1892 PCI: 00:18.2 cmd <- 00
\r
1893 PCI: 00:18.3 cmd <- 00
\r
1894 PCI: 00:18.4 cmd <- 00
\r
1896 Initializing devices...
\r
1898 APIC_CLUSTER: 0 init
\r
1899 start_eip=0x00006000, offset=0x00200000, code_size=0x0000005b
\r
1900 Initializing CPU #0
\r
1901 CPU: vendor AMD device 100fa0
\r
1902 CPU: family 10, model 0a, stepping 00
\r
1903 nodeid = 00, coreid = 00
\r
1907 Setting fixed MTRRs(0-88) type: UC
\r
1908 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
1909 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
1911 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
1912 ADDRESS_MASK_HIGH=0xffff
\r
1913 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
1914 ADDRESS_MASK_HIGH=0xffff
\r
1915 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
1916 ADDRESS_MASK_HIGH=0xffff
\r
1917 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
1918 ADDRESS_MASK_HIGH=0xffff
\r
1919 DONE variable MTRRs
\r
1920 Clear out the extra MTRR's
\r
1921 call enable_var_mtrr()
\r
1922 Leave x86_setup_var_mtrrs
\r
1926 Fixed MTRRs : Enabled
\r
1927 Variable MTRRs: Enabled
\r
1930 Setting up local apic... apic_id: 0x00 done.
\r
1932 CPU model: AMD Processor model unknown
\r
1933 siblings = 05, CPU #0 initialized
\r
1935 Waiting for send to finish...
\r
1936 +Deasserting INIT.
\r
1937 Waiting for send to finish...
\r
1938 +#startup loops: 1.
\r
1939 Sending STARTUP #1 to 1.
\r
1942 Waiting for send to finish...
\r
1944 Initializing CPU #1
\r
1945 CPU: vendor AMD device 100fa0
\r
1946 CPU: family 10, model 0a, stepping 00
\r
1947 nodeid = 00, coreid = 01
\r
1951 Setting fixed MTRRs(0-88) type: UC
\r
1952 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
1953 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
1955 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
1956 ADDRESS_MASK_HIGH=0xffff
\r
1957 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
1958 ADDRESS_MASK_HIGH=0xffff
\r
1959 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
1960 ADDRESS_MASK_HIGH=0xffff
\r
1961 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
1962 ADDRESS_MASK_HIGH=0xffff
\r
1963 DONE variable MTRRs
\r
1964 Clear out the extra MTRR's
\r
1965 call enable_var_mtrr()
\r
1966 Leave x86_setup_var_mtrrs
\r
1970 Fixed MTRRs : Enabled
\r
1971 Variable MTRRs: Enabled
\r
1974 Setting up local apic... apic_id: 0x01 done.
\r
1976 CPU model: AMD Processor model unknown
\r
1977 siblings = 05, CPU #1 initialized
\r
1979 Waiting for send to finish...
\r
1980 +Deasserting INIT.
\r
1981 Waiting for send to finish...
\r
1982 +#startup loops: 1.
\r
1983 Sending STARTUP #1 to 2.
\r
1986 Waiting for send to finish...
\r
1988 Initializing CPU #2
\r
1989 CPU: vendor AMD device 100fa0
\r
1990 CPU: family 10, model 0a, stepping 00
\r
1991 nodeid = 00, coreid = 02
\r
1995 Setting fixed MTRRs(0-88) type: UC
\r
1996 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
1997 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
1999 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
2000 ADDRESS_MASK_HIGH=0xffff
\r
2001 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
2002 ADDRESS_MASK_HIGH=0xffff
\r
2003 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
2004 ADDRESS_MASK_HIGH=0xffff
\r
2005 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
2006 ADDRESS_MASK_HIGH=0xffff
\r
2007 DONE variable MTRRs
\r
2008 Clear out the extra MTRR's
\r
2009 call enable_var_mtrr()
\r
2010 Leave x86_setup_var_mtrrs
\r
2014 Fixed MTRRs : Enabled
\r
2015 Variable MTRRs: Enabled
\r
2018 Setting up local apic... apic_id: 0x02 done.
\r
2020 CPU model: AMD Processor model unknown
\r
2021 siblings = 05, CPU #2 initialized
\r
2023 Waiting for send to finish...
\r
2024 +Deasserting INIT.
\r
2025 Waiting for send to finish...
\r
2026 +#startup loops: 1.
\r
2027 Sending STARTUP #1 to 3.
\r
2030 Waiting for send to finish...
\r
2032 Initializing CPU #3
\r
2033 CPU: vendor AMD device 100fa0
\r
2034 CPU: family 10, model 0a, stepping 00
\r
2035 nodeid = 00, coreid = 03
\r
2039 Setting fixed MTRRs(0-88) type: UC
\r
2040 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
2041 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
2043 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
2044 ADDRESS_MASK_HIGH=0xffff
\r
2045 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
2046 ADDRESS_MASK_HIGH=0xffff
\r
2047 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
2048 ADDRESS_MASK_HIGH=0xffff
\r
2049 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
2050 ADDRESS_MASK_HIGH=0xffff
\r
2051 DONE variable MTRRs
\r
2052 Clear out the extra MTRR's
\r
2053 call enable_var_mtrr()
\r
2054 Leave x86_setup_var_mtrrs
\r
2058 Fixed MTRRs : Enabled
\r
2059 Variable MTRRs: Enabled
\r
2062 Setting up local apic... apic_id: 0x03 done.
\r
2064 CPU model: AMD Processor model unknown
\r
2065 siblings = 05, CPU #3 initialized
\r
2067 Waiting for send to finish...
\r
2068 +Deasserting INIT.
\r
2069 Waiting for send to finish...
\r
2070 +#startup loops: 1.
\r
2071 Sending STARTUP #1 to 4.
\r
2074 Waiting for send to finish...
\r
2076 Initializing CPU #4
\r
2077 CPU: vendor AMD device 100fa0
\r
2078 CPU: family 10, model 0a, stepping 00
\r
2079 nodeid = 00, coreid = 04
\r
2083 Setting fixed MTRRs(0-88) type: UC
\r
2084 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
2085 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
2087 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
2088 ADDRESS_MASK_HIGH=0xffff
\r
2089 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
2090 ADDRESS_MASK_HIGH=0xffff
\r
2091 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
2092 ADDRESS_MASK_HIGH=0xffff
\r
2093 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
2094 ADDRESS_MASK_HIGH=0xffff
\r
2095 DONE variable MTRRs
\r
2096 Clear out the extra MTRR's
\r
2097 call enable_var_mtrr()
\r
2098 Leave x86_setup_var_mtrrs
\r
2102 Fixed MTRRs : Enabled
\r
2103 Variable MTRRs: Enabled
\r
2106 Setting up local apic... apic_id: 0x04 done.
\r
2108 CPU model: AMD Processor model unknown
\r
2109 siblings = 05, CPU #4 initialized
\r
2111 Waiting for send to finish...
\r
2112 +Deasserting INIT.
\r
2113 Waiting for send to finish...
\r
2114 +#startup loops: 1.
\r
2115 Sending STARTUP #1 to 5.
\r
2118 Waiting for send to finish...
\r
2120 Initializing CPU #5
\r
2121 Waiting for 1 CPUS to stop
\r
2122 CPU: vendor AMD device 100fa0
\r
2123 CPU: family 10, model 0a, stepping 00
\r
2124 nodeid = 00, coreid = 05
\r
2128 Setting fixed MTRRs(0-88) type: UC
\r
2129 Setting fixed MTRRs(0-16) Type: WB, RdMEM, WrMEM
\r
2130 Setting fixed MTRRs(24-88) Type: WB, RdMEM, WrMEM
\r
2132 Setting variable MTRR 0, base: 0MB, range: 8192MB, type WB
\r
2133 ADDRESS_MASK_HIGH=0xffff
\r
2134 Setting variable MTRR 1, base: 8192MB, range: 512MB, type WB
\r
2135 ADDRESS_MASK_HIGH=0xffff
\r
2136 Setting variable MTRR 2, base: 3328MB, range: 256MB, type UC
\r
2137 ADDRESS_MASK_HIGH=0xffff
\r
2138 Setting variable MTRR 3, base: 3584MB, range: 512MB, type UC
\r
2139 ADDRESS_MASK_HIGH=0xffff
\r
2140 DONE variable MTRRs
\r
2141 Clear out the extra MTRR's
\r
2142 call enable_var_mtrr()
\r
2143 Leave x86_setup_var_mtrrs
\r
2147 Fixed MTRRs : Enabled
\r
2148 Variable MTRRs: Enabled
\r
2151 Setting up local apic... apic_id: 0x05 done.
\r
2153 CPU model: AMD Processor model unknown
\r
2154 siblings = 05, CPU #5 initialized
\r
2155 All AP CPUs stopped
\r
2156 SB900 - Early.c - sb_After_Pci_Init - Start.
\r
2157 SB900 - Cfg.c - sb900_cimx_config - Start.
\r
2158 SB900 - Cfg.c - sb900_cimx_config - End.
\r
2159 SB900 - Early.c - sb_After_Pci_Init - End.
\r
2160 SB900 - Early.c - sb_Mid_Post_Init - Start.
\r
2161 SB900 - Cfg.c - sb900_cimx_config - Start.
\r
2162 SB900 - Cfg.c - sb900_cimx_config - End.
\r
2163 SB900 - Early.c - sb_Mid_Post_Init - End.
\r
2168 NB: Function 3 Misc Control.. done.
\r
2171 IOAPIC: Initializing IOAPIC at 0xdc000000
\r
2172 IOAPIC: Bootstrap Processor Local APIC = 0x00
\r
2174 IOAPIC: 24 interrupts
\r
2175 IOAPIC: Enabling interrupts on FSB
\r
2176 IOAPIC not responding.
\r
2193 NB: Function 3 Misc Control.. done.
\r
2195 Devices initialized
\r
2196 Show all devs...After init.
\r
2197 Root Device: enabled 1
\r
2198 APIC_CLUSTER: 0: enabled 1
\r
2199 APIC: 00: enabled 1
\r
2200 PCI_DOMAIN: 0000: enabled 1
\r
2201 PCI: 00:18.0: enabled 1
\r
2202 PCI: 00:00.0: enabled 1
\r
2203 PCI: 00:00.1: enabled 0
\r
2204 PCI: 00:02.0: enabled 1
\r
2205 PCI: 00:03.0: enabled 0
\r
2206 PCI: 00:04.0: enabled 0
\r
2207 PCI: 00:05.0: enabled 0
\r
2208 PCI: 00:06.0: enabled 0
\r
2209 PCI: 00:07.0: enabled 0
\r
2210 PCI: 00:08.0: enabled 0
\r
2211 PCI: 00:09.0: enabled 0
\r
2212 PCI: 00:0a.0: enabled 0
\r
2213 PCI: 00:0b.0: enabled 0
\r
2214 PCI: 00:0c.0: enabled 0
\r
2215 PCI: 00:0d.0: enabled 1
\r
2216 PCI: 00:11.0: enabled 1
\r
2217 PCI: 00:12.0: enabled 1
\r
2218 PCI: 00:12.2: enabled 1
\r
2219 PCI: 00:13.0: enabled 1
\r
2220 PCI: 00:13.2: enabled 1
\r
2221 PCI: 00:14.0: enabled 1
\r
2222 I2C: 00:50: enabled 1
\r
2223 I2C: 00:51: enabled 1
\r
2224 I2C: 00:52: enabled 1
\r
2225 I2C: 00:53: enabled 1
\r
2226 PCI: 00:14.1: enabled 1
\r
2227 PCI: 00:14.2: enabled 1
\r
2228 PCI: 00:14.3: enabled 1
\r
2229 PNP: 002e.0: enabled 0
\r
2230 PNP: 002e.1: enabled 0
\r
2231 PNP: 002e.2: enabled 1
\r
2232 PNP: 002e.3: enabled 1
\r
2233 PNP: 002e.5: enabled 1
\r
2234 PNP: 002e.6: enabled 0
\r
2235 PNP: 002e.7: enabled 0
\r
2236 PNP: 002e.8: enabled 0
\r
2237 PNP: 002e.9: enabled 0
\r
2238 PNP: 002e.a: enabled 0
\r
2239 PNP: 002e.b: enabled 1
\r
2240 PCI: 00:14.4: enabled 0
\r
2241 PCI: 00:14.5: enabled 1
\r
2242 PCI: 00:14.6: enabled 0
\r
2243 PCI: 00:15.0: enabled 1
\r
2244 PCI: 00:15.1: enabled 1
\r
2245 PCI: 00:15.2: enabled 1
\r
2246 PCI: 00:15.3: enabled 1
\r
2247 PCI: 00:16.0: enabled 1
\r
2248 PCI: 00:16.2: enabled 1
\r
2249 PCI: 00:18.1: enabled 1
\r
2250 PCI: 00:18.2: enabled 1
\r
2251 PCI: 00:18.3: enabled 1
\r
2252 PCI: 00:18.4: enabled 1
\r
2253 APIC: 01: enabled 1
\r
2254 APIC: 02: enabled 1
\r
2255 APIC: 03: enabled 1
\r
2256 APIC: 04: enabled 1
\r
2257 APIC: 05: enabled 1
\r
2258 PCI: 00:00.0: enabled 1
\r
2259 PCI: 00:11.0: enabled 1
\r
2260 PCI: 00:12.0: enabled 1
\r
2261 PCI: 00:12.2: enabled 1
\r
2262 PCI: 00:13.0: enabled 1
\r
2263 PCI: 00:13.2: enabled 1
\r
2264 PCI: 00:14.0: enabled 1
\r
2265 PCI: 00:14.1: enabled 1
\r
2266 PCI: 00:14.2: enabled 1
\r
2267 PCI: 00:14.3: enabled 1
\r
2268 PCI: 00:14.4: enabled 1
\r
2269 PCI: 00:14.5: enabled 1
\r
2270 PCI: 00:16.0: enabled 1
\r
2271 PCI: 00:16.2: enabled 1
\r
2272 PCI: 00:18.0: enabled 1
\r
2273 PCI: 00:18.1: enabled 1
\r
2274 PCI: 00:18.2: enabled 1
\r
2275 PCI: 00:18.3: enabled 1
\r
2276 PCI: 00:18.4: enabled 1
\r
2278 Initializing CBMEM area to 0xcfff0000 (65536 bytes)
\r
2279 Adding CBMEM entry as no. 1
\r
2280 Moving GDT to cfff0200...ok
\r
2281 High Tables Base is cfff0000.
\r
2283 SB900 - Early.c - sb_Late_Post - Start.
\r
2284 SB900 - Cfg.c - sb900_cimx_config - Start.
\r
2285 SB900 - Cfg.c - sb900_cimx_config - End.
\r
2286 SB900 - Early.c - sb_Late_Post - End.
\r
2287 Writing IRQ routing tables to 0xf0000...write_pirq_routing_table done.
\r
2288 Adding CBMEM entry as no. 2
\r
2289 Writing IRQ routing tables to 0xcfff0400...write_pirq_routing_table done.
\r
2290 PIRQ table: 48 bytes.
\r
2292 Wrote the mp table end at: 000f0410 - 000f055c
\r
2293 Adding CBMEM entry as no. 3
\r
2294 Wrote the mp table end at: cfff1410 - cfff155c
\r
2295 MP table: 348 bytes.
\r
2297 Adding CBMEM entry as no. 4
\r
2298 ACPI: Writing ACPI tables at cfff2400...
\r
2299 ACPI: * HPET at cfff24c8
\r
2300 ACPI: added table 1/32, length now 40
\r
2301 ACPI: * MADT at cfff2500
\r
2302 ACPI: added table 2/32, length now 44
\r
2303 ACPI: * SRAT at cfff2580
\r
2304 SRAT: lapic cpu_index=00, node_id=00, apic_id=00
\r
2305 SRAT: lapic cpu_index=01, node_id=00, apic_id=01
\r
2306 SRAT: lapic cpu_index=02, node_id=00, apic_id=02
\r
2307 SRAT: lapic cpu_index=03, node_id=00, apic_id=03
\r
2308 SRAT: lapic cpu_index=04, node_id=00, apic_id=04
\r
2309 SRAT: lapic cpu_index=05, node_id=00, apic_id=05
\r
2310 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0010 startk=00000000, sizek=00000280
\r
2311 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0020 startk=00000300, sizek=0033fd00
\r
2312 set_srat_mem: dev PCI_DOMAIN: 0000, res->index=0030 startk=00400000, sizek=00480000
\r
2313 ACPI: added table 3/32, length now 48
\r
2314 ACPI: * SLIT at cfff2688
\r
2315 ACPI: added table 4/32, length now 52
\r
2316 ACPI: * SSDT at cfff26c0
\r
2317 ACPI: added table 5/32, length now 56
\r
2318 ACPI: * SSDT for PState at cfff2cf5
\r
2319 ACPI: * DSDT at cfff2cf8
\r
2320 ACPI: * DSDT @ cfff2cf8 Length 288b
\r
2321 ACPI: * FACS at cfff5588
\r
2322 ACPI: * FADT at cfff55c8
\r
2323 ACPI_BLK_BASE: 0x0800
\r
2324 ACPI: added table 6/32, length now 60
\r
2326 ACPI tables: 12988 bytes.
\r
2327 Adding CBMEM entry as no. 5
\r
2328 smbios_write_tables: cfffd800
\r
2329 Root Device (ASUS M5A99X-EVO Mainboard)
\r
2330 APIC_CLUSTER: 0 (AMD FAM10 Root Complex)
\r
2331 APIC: 00 (socket AM3)
\r
2332 PCI_DOMAIN: 0000 (AMD FAM10 Root Complex)
\r
2333 PCI: 00:18.0 (AMD FAM10 Northbridge)
\r
2334 PCI: 00:00.0 (ATI rd890)
\r
2335 PCI: 00:00.1 (ATI rd890)
\r
2336 PCI: 00:02.0 (ATI rd890)
\r
2337 PCI: 00:03.0 (ATI rd890)
\r
2338 PCI: 00:04.0 (ATI rd890)
\r
2339 PCI: 00:05.0 (ATI rd890)
\r
2340 PCI: 00:06.0 (ATI rd890)
\r
2341 PCI: 00:07.0 (ATI rd890)
\r
2342 PCI: 00:08.0 (ATI rd890)
\r
2343 PCI: 00:09.0 (ATI rd890)
\r
2344 PCI: 00:0a.0 (ATI rd890)
\r
2345 PCI: 00:0b.0 (ATI rd890)
\r
2346 PCI: 00:0c.0 (ATI rd890)
\r
2347 PCI: 00:0d.0 (ATI rd890)
\r
2348 PCI: 00:11.0 (ATI SB900)
\r
2349 PCI: 00:12.0 (ATI SB900)
\r
2350 PCI: 00:12.2 (ATI SB900)
\r
2351 PCI: 00:13.0 (ATI SB900)
\r
2352 PCI: 00:13.2 (ATI SB900)
\r
2353 PCI: 00:14.0 (ATI SB900)
\r
2358 PCI: 00:14.1 (ATI SB900)
\r
2359 PCI: 00:14.2 (ATI SB900)
\r
2360 PCI: 00:14.3 (ATI SB900)
\r
2361 PNP: 002e.0 (ITE IT8721F Super I/O)
\r
2362 PNP: 002e.1 (ITE IT8721F Super I/O)
\r
2363 PNP: 002e.2 (ITE IT8721F Super I/O)
\r
2364 PNP: 002e.3 (ITE IT8721F Super I/O)
\r
2365 PNP: 002e.5 (ITE IT8721F Super I/O)
\r
2366 PNP: 002e.6 (ITE IT8721F Super I/O)
\r
2367 PNP: 002e.7 (ITE IT8721F Super I/O)
\r
2368 PNP: 002e.8 (ITE IT8721F Super I/O)
\r
2369 PNP: 002e.9 (ITE IT8721F Super I/O)
\r
2370 PNP: 002e.a (ITE IT8721F Super I/O)
\r
2371 PNP: 002e.b (ITE IT8721F Super I/O)
\r
2372 PCI: 00:14.4 (ATI SB900)
\r
2373 PCI: 00:14.5 (ATI SB900)
\r
2374 PCI: 00:14.6 (ATI SB900)
\r
2375 PCI: 00:15.0 (ATI SB900)
\r
2376 PCI: 00:15.1 (ATI SB900)
\r
2377 PCI: 00:15.2 (ATI SB900)
\r
2378 PCI: 00:15.3 (ATI SB900)
\r
2379 PCI: 00:16.0 (ATI SB900)
\r
2380 PCI: 00:16.2 (ATI SB900)
\r
2381 PCI: 00:18.1 (AMD FAM10 Northbridge)
\r
2382 PCI: 00:18.2 (AMD FAM10 Northbridge)
\r
2383 PCI: 00:18.3 (AMD FAM10 Northbridge)
\r
2384 PCI: 00:18.4 (AMD FAM10 Northbridge)
\r
2409 SMBIOS tables: 269 bytes.
\r
2411 Adding CBMEM entry as no. 6
\r
2412 Writing high table forward entry at 0x00000500
\r
2413 Wrote coreboot table at: 00000500 - 00000518 checksum 4fde
\r
2414 New low_table_end: 0x00000518
\r
2415 Now going to write high coreboot table at 0xcfffe000
\r
2416 rom_table_end = 0xcfffe000
\r
2417 Adjust low_table_end from 0x00000518 to 0x00001000
\r
2418 Adjust rom_table_end from 0xcfffe000 to 0xd0000000
\r
2419 Adding high table area
\r
2420 coreboot memory table:
\r
2421 0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
\r
2422 1. 0000000000001000-000000000009ffff: RAM
\r
2423 2. 00000000000c0000-00000000cffeffff: RAM
\r
2424 3. 00000000cfff0000-00000000cfffffff: CONFIGURATION TABLES
\r
2425 4. 00000000e0000000-00000000efffffff: RESERVED
\r
2426 5. 0000000100000000-000000021fffffff: RAM
\r
2427 Wrote coreboot table at: cfffe000 - cfffe1e0 checksum 6b98
\r
2428 coreboot table: 480 bytes.
\r
2431 Multiboot Information structure has been written.
\r
2432 0. FREE SPACE d0000000 00000000
\r
2433 1. GDT cfff0200 00000200
\r
2434 2. IRQ TABLE cfff0400 00001000
\r
2435 3. SMP TABLE cfff1400 00001000
\r
2436 4. ACPI cfff2400 0000b400
\r
2437 5. SMBIOS cfffd800 00000800
\r
2438 6. COREBOOT cfffe000 00002000
\r
2439 Searching for fallback/payload
\r
2440 Check cmos_layout.bin
\r
2441 Check fallback/romstage
\r
2442 Check fallback/coreboot_ram
\r
2443 Check fallback/payload
\r
2445 Loading segment from rom address 0xffc43f38
\r
2446 data (compression=1)
\r
2447 New segment dstaddr 0xed1e0 memsize 0x12e20 srcaddr 0xffc43f70 filesize 0x976f
\r
2448 (cleaned up) New segment addr 0xed1e0 size 0x12e20 offset 0xffc43f70 filesize 0x976f
\r
2449 Loading segment from rom address 0xffc43f54
\r
2450 Entry Point 0x00000000
\r
2451 Loading Segment: addr: 0x00000000000ed1e0 memsz: 0x0000000000012e20 filesz: 0x000000000000976f
\r
2452 lb: [0x0000000000200000, 0x0000000000340000)
\r
2453 Post relocation: addr: 0x00000000000ed1e0 memsz: 0x0000000000012e20 filesz: 0x000000000000976f
\r
2455 [ 0x000ed1e0, 00100000, 0x00100000) <- ffc43f70
\r
2456 dest 000ed1e0, end 00100000, bouncebuffer cfd70000
\r
2458 Jumping to boot code at fc63c
\r
2460 entry = 0x000fc63c
\r
2461 lb_start = 0x00200000
\r
2462 lb_size = 0x00140000
\r
2463 adjust = 0xcfcb0000
\r
2464 buffer = 0xcfd70000
\r
2465 elf_boot_notes = 0x0023b1c4
\r
2466 adjusted_boot_notes = 0xcfeeb1c4
\r
2467 Start bios (version 1.6.3-20120208_172608-oldx86)
\r
2469 Attempting to find coreboot table
\r
2470 Found coreboot table forwarder.
\r
2471 Now attempting to find coreboot memory map
\r
2472 Add to e820 map: 00000000 00001000 2
\r
2473 Add to e820 map: 00001000 0009f000 1
\r
2474 Add to e820 map: 000c0000 cff30000 1
\r
2475 Add to e820 map: cfff0000 00010000 2
\r
2476 Add to e820 map: e0000000 10000000 2
\r
2477 Add to e820 map: 00000000 20000000 1
\r
2478 Add to e820 map: 00000000 00004000 1
\r
2479 Found mainboard ASUS M5A99X-EVO
\r
2480 Found CBFS header at 0xfffffca0
\r
2481 Add to e820 map: 000a0000 00050000 -1
\r
2482 Add to e820 map: 000f0000 00010000 2
\r
2483 Ram Size=0xcfff0000 (0x0000000120000000 high)
\r
2485 Add to e820 map: cffe0000 00010000 2
\r
2488 Add to e820 map: 0009fc00 00000400 2
\r