uart_tx: minimale anpassungen (wollt nur mal drueber schauen...)

diff --git a/cpu/src/extension_uart_b.vhd b/cpu/src/extension_uart_b.vhd
index b50506955c8cb5137895d041fecfd3cae3912137..99278a970284bbf806e13c099c2b001745693660 100644 (file)
--- a/cpu/src/extension_uart_b.vhd
+++ b/cpu/src/extension_uart_b.vhd
@@ -69,7 +69,7 @@ begin
    if (reset = RESET_VALUE) then
                        w1_st_co <= (others=>'0');
                        w2_uart_config(31 downto 16) <= (others=>'0');
    if (reset = RESET_VALUE) then
                        w1_st_co <= (others=>'0');
                        w2_uart_config(31 downto 16) <= (others=>'0');

-                       w2_uart_config(15 downto 0) <= x"01b2"; -- std_logic_vector(to_unsigned(CLK_PER_BAUD, 16)); -- x"0822"; -- x"01B2";
+                       w2_uart_config(15 downto 0) <= std_logic_vector(to_unsigned(CLK_PER_BAUD, 16));

                        w3_uart_send <= (others=>'0');
                        w4_uart_receive <= (others=>'0');
                        tx_rdy_int <= '0';
                        w3_uart_send <= (others=>'0');
                        w4_uart_receive <= (others=>'0');
                        tx_rdy_int <= '0';

diff --git a/cpu/src/rs232_tx_arc.vhd b/cpu/src/rs232_tx_arc.vhd
index 9b5a582f3f9d84235ee4e797fc6b214020df38bc..ee231e4068079786297ca90a1b5a5d64a69d1941 100755 (executable)
--- a/cpu/src/rs232_tx_arc.vhd
+++ b/cpu/src/rs232_tx_arc.vhd
@@ -22,7 +22,7 @@ architecture beh of rs232_tx is
        type STATE_TYPE is (IDLE,SEND);
        signal state, state_next : STATE_TYPE;
        signal bus_tx_int, bus_tx_nxt : std_logic := '1';
        type STATE_TYPE is (IDLE,SEND);
        signal state, state_next : STATE_TYPE;
        signal bus_tx_int, bus_tx_nxt : std_logic := '1';

-       signal baud_cnt,baud_cnt_next : integer := CLK_PER_BAUD;
+       signal baud_cnt,baud_cnt_next : integer := 0;

        signal cnt, cnt_next : natural range 0 to 11 := 0;
        signal idle_sig, idle_sig_next : std_logic := '0';
        
        signal cnt, cnt_next : natural range 0 to 11 := 0;
        signal idle_sig, idle_sig_next : std_logic := '0';
        


@@ -76,18 +76,17 @@ begin
                idle_sig_next <= '0';
                bus_tx_nxt <= bus_tx_int;
                cnt_next <= cnt;
                idle_sig_next <= '0';
                bus_tx_nxt <= bus_tx_int;
                cnt_next <= cnt;

-               baud_cnt_next <= baud_cnt;
+               -- Counter erhoehen um die Zeit einer Bitdauer abzuwarten
+               baud_cnt_next <= baud_cnt + 1;

 
                case state is
                        when IDLE =>
                                -- tx-Signale im idle Zustand halten
                                tx_rdy <= '1';
 
                case state is
                        when IDLE =>
                                -- tx-Signale im idle Zustand halten
                                tx_rdy <= '1';

-                               baud_cnt_next <= CLK_PER_BAUD;
+                               baud_cnt_next <= to_integer(unsigned(bd_rate));

                        when SEND =>
                                -- Signalisiert dass gerade ein Byte versendet wird 
                                tx_rdy <= '0';
                        when SEND =>
                                -- Signalisiert dass gerade ein Byte versendet wird 
                                tx_rdy <= '0';

-                               -- Counter erhoehen um die Zeit einer Bitdauer abzuwarten
-                               baud_cnt_next <= baud_cnt + 1;

                                if baud_cnt = bd_rate then 
                                        -- wenn die Bitdauer erreicht ist, Counter reseten
                                        baud_cnt_next <= 0;
                                if baud_cnt = bd_rate then 
                                        -- wenn die Bitdauer erreicht ist, Counter reseten
                                        baud_cnt_next <= 0;