ldih r1, inputdata@hi
;set address of program start
- ldis r2, prog_start@lo
- ldih r2, prog_start@hi
+ ldis r2, (prog_start/4)@lo
+ ldih r2, (prog_start/4)@hi
;set address to instruction table
ldis r3, instrtable@lo
;generate branch
sub r11, r6, r8
- lrs r11, r11, 2
+ ;lrs r11, r11, 2
;set the upper 16 bit 0
andx r11, 0xFFFF
;shift to the position of imm in br
PROGINSTR
;increment address
- addi r2, r2, 52
+ addi r2, r2, 13
br+ vm_loop
PROGINSTR
;increment address
- addi r2, r2, 16
+ addi r2, r2, 4
br+ vm_loop
PROGINSTR
;increment address
- addi r2, r2, 16
+ addi r2, r2, 4
br+ vm_loop
PROGINSTR
;increment address
- addi r2, r2, 8
+ addi r2, r2, 2
br+ vm_loop
PROGINSTR
;increment address
- addi r2, r2, 20
+ addi r2, r2, 5
br+ vm_loop
PROGINSTR
;increment address
- addi r2, r2, 8
+ addi r2, r2, 2
br+ vm_loop
PROGINSTR
;increment address
- addi r2, r2, 12
+ addi r2, r2, 3
;pc+4
addi r1, r1, 4
PROGINSTR
;we add the offset to this instruction
- addi r8, r2, 12
+ addi r8, r2, 3
;we know calculate the jump destination
sub r8, r0, r8
;we shift 2 bits out, because rel. br takes instr.
;count and not address amount ...
- lrs r8, r8, 2
+ ;lrs r8, r8, 2
;set the upper 16 bit 0
andx r8, 0xFFFF
;shift to the position of imm in br
PROGINSTR
;increment address
- addi r2, r2, 16
+ addi r2, r2, 4
br+ vm_loop
;increment defer table address
addi r9, r9, 8
;increment address
- addi r2, r2, 16
+ addi r2, r2, 4
br+ vm_loop
;case P
PROGINSTR
;increment address
- addi r2, r2, 4
+ addi r2, r2, 1
br+ vm_loop
PROGINSTR
;increment address
- addi r2, r2, 16
+ addi r2, r2, 4
br+ vm_loop
PROGINSTR
;increment address
- addi r2, r2, 12
+ addi r2, r2, 3
br+ vm_loop