1 #define PROGINSTR stw r0, PDATA(r13)
28 ;assuming that no more than 42 instr are used
39 .ifill ldis r8, 0;0xed400004
40 .ifill mov r0, r7;0xe1038000
41 .ifill andx r0, 1;0xe2800008
42 .ifill adddnz r8, r8, r6;0x00443001
43 .ifill subinz r7, r7, 1;0x01bb8008
44 .ifill addizs r7, r7, 0;0x113b8000
46 .ifill adddnz r8, r8, r6;0x00443001
47 .ifill adddnz r8, r8, r6;0x00443001
48 .ifill subi r7, r7, 2;0xe1bb8010
49 .fill 0x0b7ffe83;brnz+ loop
53 .fill 0xed300004;ldis r6, CONST
59 .ifill add r7, r7, r6;0xe03bb000
65 .ifill sub r7, r7, r6;0xe0bbb000
71 .ifill cmp r7, r6;0xec3b0000
81 .ifill cmpi r6,0;0xecb00000
83 .fill 1, 0x1b000103;breq- vm_next
84 .fill 1, 0xeb000003;br+ CONST
87 .fill 1, 0xed400000;ldil r6, CONST
88 .fill 1, 0xed400002;ldih r6, CONST
102 .ifill not r6;0xe4b7fffa
106 .define UART_BASE, 0x2000
107 .define UART_STATUS, 0x0
108 .define UART_RECV, 0xc
109 .define UART_TRANS, 0x8
111 .define UART_TRANS_EMPTY, 0x1
112 .define UART_RECV_NEW, 0x2
114 .define PBASE, 0x2030
121 ldi r10, UART_BASE@lo
122 ldih r10, UART_BASE@hi
125 ldw r3, UART_STATUS(r10)
126 andx r3, UART_RECV_NEW
127 brzs+ u_recv_byte; branch if zero
129 ldw r0, UART_RECV(r10)
133 ldw r9, UART_STATUS(r10)
134 andx r9, UART_TRANS_EMPTY
135 brnz+ u_test ; branch if not zero
136 stb r0, UART_TRANS(r10)
138 ;set address of input
139 ldis r1, inputdata@lo
140 ldih r1, inputdata@hi
142 ;set address of program start
143 ldis r2, prog_start@lo
144 ldih r2, prog_start@hi
146 ;set address to instruction table
147 ldis r3, instrtable@lo
148 ldih r3, instrtable@hi
150 ;set address to defer table
151 ldis r9, defertable@lo
152 ldih r9, defertable@hi
157 ;set programmer address
163 ;set address to stack
167 ;make r15 a 0-register
169 ;make r14 a 8-bit -1-register
177 ldi r10, UART_BASE@lo
178 ldih r10, UART_BASE@hi
181 ldw r9, UART_STATUS(r10)
182 andx r9, UART_TRANS_EMPTY
183 brnz+ u_send_by1 ; branch if not zero
185 stb r0, UART_TRANS(r10)
188 ldw r9, UART_STATUS(r10)
189 andx r9, UART_TRANS_EMPTY
190 brnz+ u_send_byte ; branch if not zero
192 stb r0, UART_TRANS(r10)
198 ;first version only supports backward jumps
200 ;r1 ... address to input, every byte is a new input
201 ; includes pc implicitly
202 ;r2 ... address to program start
203 ;r3 ... address of instruction table
204 ;r4 ... gets loaded with instr. prog. addr.
206 ;r9 ... address to actual entry in defer table
207 ;r10... address to defer table
208 ;r13 .. programmer address
210 ;load address of program
211 ldil r14, prog_mul@lo
212 ldih r14, prog_mul@hi
214 ldil r15, prog_consts@lo
215 ldih r15, prog_consts@hi
217 ;backup defer table address
219 ;decrement address to input by 1
224 ;increment input address
227 ;store address of next instruction in table
229 ;increment instr. table
234 ;we need to multiply input by 4 to get correct address offset
236 ;calc position in jumptable
237 ldw r0, jumptable(r0)
242 ;load address of program
245 ;program instruction (2)
252 ;now it is time to clear up the defer table
256 ;load branch template
259 ;if actual and base are equal, no entry
265 ;load pointer to where to jump to
267 ;load where to jump to
269 ;load where to save from defer table
275 ;set the upper 16 bit 0
277 ;shift to the position of imm in br
292 ;program instruction (14)
328 ;load address of program
332 ;program instruction (5)
350 ;load address of program
354 ;program instruction (5)
369 ;case 0 1 2 3 4 5 6 7 8 9
372 ;program instruction (3)
374 ;the first instr. loads r6 with the number
375 ;thus we shall emulate this
379 ;shift 3 bits left, as the immediate in ldi has
382 ;now 'add' this to the ldi
385 ;store this 'dynamic' instruction
398 ;load address of program
399 ldil r4, prog_lessthan@lo
400 ldih r4, prog_lessthan@hi
402 ;program instruction (6)
425 ;program instruction (3)
439 ;the following instructions calculate the immediate
461 ;now we will generate ldih/l which will store this
462 ;immediate into a register
464 ;load address of program
485 ;now we program the instructions that will save the
486 ;immediate onto the stack and increment the later
502 ;gespeicherte instrs sollten input indepentent sein
504 ;fuer forward jumps muss deferrer table gemacht werden *puke*
506 ;load address of program
510 ;program instruction (2)
525 ;we add the offset to this instruction
529 ;we know calculate the jump destination
530 ;set r6 to 0 (to clear upper bytes)
534 ;compare input with neg. max of 8 bit
540 ;generate negativ offset
542 ;r6 is now the 'real' negativ number
544 ;todo: testing showed (at least once) we are off by 2 instr.
546 ;multiply by to get the offset
548 ;generate address in table
550 ;r0 now has the target address
555 ;we shift 2 bits out, because rel. br takes instr.
556 ;count and not address amount ...
558 ;set the upper 16 bit 0
560 ;shift to the position of imm in br
574 ;we know save the address in the instrtable where the addr to jump to stands
575 ;the value doesn't exists at the moment, but it will at evaluation
577 ;save position to save the instr into defer table
580 ;we need one instruction to have the correct offset (?)
583 ;todo: check if -1 is needed
585 ;multiply with 2 to get offset right
589 ;save the address to defer table
591 ;increment defer table address
600 ;load address of program
604 ;program instruction (1)
616 ;load address of program
620 ;program instruction (4)
638 ;load address of program
642 ;program instruction (3)
661 .fill 41, vm_default/4
667 .fill 1, vm_default/4
671 .fill 2, vm_default/4
673 .fill 10, vm_consts/4
675 .fill 2, vm_default/4
677 .fill 1, vm_lessthan/4
679 .fill 7, vm_default/4
683 .fill 4, vm_default/4
689 .fill 5, vm_default/4
693 .fill 7, vm_default/4
697 .fill 37, vm_default/4
701 .fill 129, vm_default/4
703 ;we assume not more than 3 entries