3 use IEEE.std_logic_1164.all;
4 use IEEE.numeric_std.all;
6 use work.common_pkg.all;
10 component fetch_stage is
13 RESET_VALUE : std_logic;
24 jump_result : in instruction_addr_t;
25 prediction_result : in instruction_addr_t;
26 branch_prediction_bit : in std_logic;
27 alu_jump_bit : in std_logic;
30 instruction : out instruction_word_t
33 end component fetch_stage;
37 component decode_stage is
40 RESET_VALUE : std_logic;
51 instruction : in instruction_word_t;
52 reg_w_addr : in std_logic_vector(REG_ADDR_WIDTH-1 downto 0);
53 reg_wr_data : in gp_register_t;
54 reg_we : in std_logic;
58 -- reg1_rd_data : out gp_register_t;
59 -- reg2_rd_data : out gp_register_t;
60 branch_prediction_res : out instruction_word_t;
61 branch_prediction_bit : out std_logic;
62 to_next_stage : out dec_op
64 end component decode_stage;
70 instruction : in instruction_word_t;
71 instr_spl : out instruction_rec
75 end component decoder;
77 component execute_stage is
81 RESET_VALUE : std_logic
83 --LOGIC_ACT : std_logic;
90 dec_instr : in dec_op;
93 result : out gp_register_t;--reg
94 result_addr : out gp_addr_t;--reg
95 addr : out word_t; --memaddr
96 data : out gp_register_t; --mem data --ureg
97 alu_jump : out std_logic;--reg
98 brpr : out std_logic; --reg
99 wr_en : out std_logic;--regop --reg
100 dmem : out std_logic;--memop
101 dmem_write_en : out std_logic;
102 hword : out std_logic;
103 byte_s : out std_logic
105 end component execute_stage;
109 component writeback_stage is
111 -- active reset value
112 RESET_VALUE : std_logic;
113 -- active logic value
114 LOGIC_ACT : std_logic
120 reset : in std_logic;
122 result : in gp_register_t; --reg (alu result or jumpaddr)
123 result_addr : in gp_addr_t; --reg
124 address : in word_t; --ureg
125 ram_data : in word_t; --ureg
126 alu_jmp : in std_logic; --reg
127 br_pred : in std_logic; --reg
128 write_en : in std_logic; --reg (register file)
129 dmem_en : in std_logic; --ureg (jump addr in mem or in address)
130 dmem_write_en : in std_logic; --ureg
131 hword : in std_logic; --ureg
132 byte_s : in std_logic; --ureg
134 regfile_val : out gp_register_t;
135 reg_we : out std_logic;
136 reg_addr : out gp_addr_t;
137 jump_addr : out instruction_addr_t;
140 end component writeback_stage;
144 end package core_pkg;