3 use IEEE.std_logic_1164.all;
4 use IEEE.numeric_std.all;
8 constant WORD_WIDTH : INTEGER := 32;
9 constant BYTE_WIDTH : INTEGER := 8;
11 constant INSTR_ADDR_WIDTH : INTEGER := 32;
12 constant PHYS_INSTR_ADDR_WIDTH : INTEGER := 11;
13 constant REG_ADDR_WIDTH : INTEGER := 4;
14 constant DATA_ADDR_WIDTH : INTEGER := 32;
15 constant PHYS_DATA_ADDR_WIDTH : INTEGER := 32;
17 subtype instruction_word_t is std_logic_vector(WORD_WIDTH-1 downto 0);
18 subtype instruction_addr_t is std_logic_vector(INSTR_ADDR_WIDTH-1 downto 0);
20 subtype gp_register_t is std_logic_vector(WORD_WIDTH-1 downto 0);
22 subtype data_ram_word_t is std_logic_vector(WORD_WIDTH-1 downto 0);
23 subtype data_ram_addr_t is std_logic_vecotr(DATA_ADDR_WIDTH-1 downto 0);
25 end package common_pkg;