17 .define UART_BASE, 0x2000
18 .define UART_STATUS, 0x0
19 .define UART_RECV, 0xc
20 .define UART_TRANS, 0x8
22 .define UART_TRANS_EMPTY, 0x1
23 .define UART_RECV_NEW, 0x2
32 ldih r10, UART_BASE@hi
33 ldw r5, UART_STATUS(r10)
34 andx r5, UART_RECV_NEW
35 brzs+ main ; no new data?
36 ldw r7, UART_RECV(r10) ; load data
54 ldw r5, UART_STATUS(r10)
55 andx r5, UART_RECV_NEW
56 brzs+ main2 ; no new data?
57 ldb r7, UART_RECV(r10) ; load data
60 andx r5, UART_TRANS_EMPTY
61 brnz+ uartnrdy ; transmitter not ready yet?
62 stw r7, UART_TRANS(r10) ; send zeh shit!
63 br main2 ; back to usual stuff
79 ldw r9, UART_STATUS(r10)
80 andx r9, UART_TRANS_EMPTY
81 brnz+ send_byte ; branch if not zero
82 stb r1, UART_TRANS(r10)
87 ;usb_sendbuffersafe ("0x", 2);
100 ;for (j = 0; j < 8; ++j) {
103 ;usb_sendbuffersafe (&int2hex[(i >> 28) & 0xf], 1);