7seg added to dt_inc.s

diff --git a/progs/dt_inc.s b/progs/dt_inc.s
index adedc502b23d832f555c7b090a5354894c8adee9..ad347c129d180751828f15c049e3e1ae713c82b3 100644 (file)
--- a/progs/dt_inc.s
+++ b/progs/dt_inc.s
@@ -22,6 +22,13 @@ int2hex:
        .define UART_TRANS_EMPTY, 0x1
        .define UART_RECV_NEW, 0x2
 
+       .define SSEG_BASE, 0x2010
+
+       .define INT_BASE, 0x2020
+       .define INT_CONF, 0x04
+       .define INT_GLOBAL_BIT, 0x01
+       .define INT_UART_REC_BIT, 0x02
+
 u_recv_byte:
 #ifndef DTSIM
        ldw r3, UART_STATUS(r10)
@@ -110,3 +117,10 @@ u_init:
        ldih r10, UART_BASE@hi
 #endif
        ret
+
+sseg_displ:
+#ifndef DTSIM
+       ldi r2, SSEG_BASE
+       stw r1, 0(r2)
+#endif
+       ret