* src/vm/jit/codegen-common.cpp (codegen_emit): Fixed support to pass float

arguments via integer registers (i.e. ARM) in generic codegen loop.
* src/vm/jit/arm/codegen.h: Relaxed assertions in M_LDR.
* src/vm/jit/arm/codegen.c (codegen_emit_stub_native): Stackframe size for
native stubs is stored as number of stackslots.

diff --git a/src/vm/jit/arm/codegen.c b/src/vm/jit/arm/codegen.c
index bb6418f4a1e37081d6f47460feba86bfb4a5de1f..4a87bc94929db6f1850d72eee4ce31e8f9e63341 100644 (file)
--- a/src/vm/jit/arm/codegen.c
+++ b/src/vm/jit/arm/codegen.c
@@ -2405,14 +2405,14 @@ void codegen_emit_stub_native(jitdata *jd, methoddesc *nmd, functionptr f, int s
        /* calculate stackframe size */
 
        cd->stackframesize =
-               4 +                                                /* return address  */
-               sizeof(stackframeinfo_t) +                         /* stackframeinfo  */
-               sizeof(localref_table) +                           /* localref_table  */
-               nmd->memuse * 4;                                   /* stack arguments */
+               1 +                                                /* return address  */
+               sizeof(stackframeinfo_t) / SIZEOF_VOID_P +         /* stackframeinfo  */
+               sizeof(localref_table) / SIZEOF_VOID_P +           /* localref_table  */
+               nmd->memuse;                                       /* stack arguments */
 
        /* align stack to 8-byte */
 
-       cd->stackframesize = (cd->stackframesize + 4) & ~4;
+       cd->stackframesize = (cd->stackframesize + 1) & ~1;
 
        /* create method header */
 
@@ -2425,7 +2425,7 @@ void codegen_emit_stub_native(jitdata *jd, methoddesc *nmd, functionptr f, int s
        /* generate stub code */
 
        M_STMFD(1<<REG_LR, REG_SP);
-       M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize / 4 - 1);
+       M_SUB_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize * 2 - 1);
 
 #if defined(ENABLE_GC_CACAO)
        /* Save callee saved integer registers in stackframeinfo (GC may
@@ -2498,7 +2498,7 @@ void codegen_emit_stub_native(jitdata *jd, methoddesc *nmd, functionptr f, int s
                        }
                }
                else {
-                       s1 = md->params[i].regoff + cd->stackframesize;
+                       s1 = md->params[i].regoff + cd->stackframesize * 8;
                        s2 = nmd->params[j].regoff;
 
                        if (IS_2_WORD_TYPE(t)) {
@@ -2583,7 +2583,7 @@ void codegen_emit_stub_native(jitdata *jd, methoddesc *nmd, functionptr f, int s
 
        /* finish stub code, but do not yet return to caller */
 
-       M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize / 4 - 1);
+       M_ADD_IMM_EXT_MUL4(REG_SP, REG_SP, cd->stackframesize * 2 - 1);
        M_LDMFD(1<<REG_LR, REG_SP);
 
        /* check for exception */

diff --git a/src/vm/jit/arm/codegen.h b/src/vm/jit/arm/codegen.h
index f7fd56ab04b490d4495c40ef69ffd09e60d7ac93..59ee5c27ec00620bedadf246e4062ac23c69811d 100644 (file)
--- a/src/vm/jit/arm/codegen.h
+++ b/src/vm/jit/arm/codegen.h
@@ -961,11 +961,11 @@ do { \
 
 #define M_STR(d, base, offset) \
 do { \
-       assert((d) != REG_ITMP3); \
        CHECK_OFFSET(offset, 0x0fffff); \
        if (IS_OFFSET(offset, 0x000fff)) { \
                M_STR_INTERN(d, base, offset); \
        } else { \
+               assert((d) != REG_ITMP3); \
                if ((offset) > 0) { \
                        M_ADD_IMM(REG_ITMP3, base, IMM_ROTL((offset) >> 12, 6)); \
                        M_STR_INTERN(d, REG_ITMP3, (offset) & 0x000fff); \
@@ -978,8 +978,6 @@ do { \
 
 #define M_STRD(d, base, offset) \
 do { \
-       assert(GET_LOW_REG(d) != REG_ITMP3); \
-       assert(GET_HIGH_REG(d) != REG_ITMP3); \
        CHECK_OFFSET(offset, 0x0fffff - 4); \
        if (IS_OFFSET(offset, 0x000fff - 4)) { \
                M_STRD_INTERN(d,base,offset); \
@@ -987,6 +985,8 @@ do { \
                dolog("M_STRD: this offset seems to be complicated (%d)", offset); \
                assert(0); \
        } else { \
+               assert(GET_LOW_REG(d) != REG_ITMP3); \
+               assert(GET_HIGH_REG(d) != REG_ITMP3); \
                if ((offset) > 0) { \
                        M_ADD_IMM(REG_ITMP3, base, IMM_ROTL((offset) >> 12, 6)); \
                        M_STRD_INTERN(d, REG_ITMP3, (offset) & 0x000fff); \

diff --git a/src/vm/jit/codegen-common.cpp b/src/vm/jit/codegen-common.cpp
index 62ee9aecdda1f8cf582f5c8535bd9e4c2f00ab78..f05b6d951a932feeae117d1f29a6feaa8e5b5cad 100644 (file)
--- a/src/vm/jit/codegen-common.cpp
+++ b/src/vm/jit/codegen-common.cpp
@@ -1356,9 +1356,13 @@ bool codegen_emit(jitdata *jd)
                        case ICMD_IMUL:       /* ..., val1, val2  ==> ..., val1 * val2    */
                        case ICMD_IMULCONST:  /* ..., value  ==> ..., value * constant    */
                                              /* sx.val.i = constant                      */
+                       case ICMD_IMULPOW2:   /* ..., value  ==> ..., value * (2 ^ constant) */
+                                             /* sx.val.i = constant                      */
                        case ICMD_LMUL:       /* ..., val1, val2  ==> ..., val1 * val2    */
                        case ICMD_LMULCONST:  /* ..., value  ==> ..., value * constant    */
                                              /* sx.val.l = constant                      */
+                       case ICMD_LMULPOW2:   /* ..., value  ==> ..., value * (2 ^ constant) */
+                                             /* sx.val.l = constant                      */
                        case ICMD_IDIV:       /* ..., val1, val2  ==> ..., val1 / val2    */
                        case ICMD_IREM:       /* ..., val1, val2  ==> ..., val1 % val2    */
                        case ICMD_IDIVPOW2:   /* ..., value  ==> ..., value >> constant   */
@@ -1527,7 +1531,6 @@ bool codegen_emit(jitdata *jd)
                                /* This approach is much faster than moving the field
                                   address inline into a register. */
 
-                               // XXX ARM: M_DSEG_LOAD(REG_ITMP3, disp);
                                M_ALD_DSEG(REG_ITMP1, disp);
 
                                switch (fieldtype) {
@@ -1585,7 +1588,6 @@ bool codegen_emit(jitdata *jd)
                                /* This approach is much faster than moving the field
                                   address inline into a register. */
 
-                               // XXX ARM: M_DSEG_LOAD(REG_ITMP3, disp);
                                M_ALD_DSEG(REG_ITMP1, disp);
 
                                switch (fieldtype) {
@@ -1839,16 +1841,22 @@ bool codegen_emit(jitdata *jd)
 
                                REPLACEMENT_POINT_RETURN(cd, iptr);
                                s1 = emit_load_s1(jd, iptr, REG_FRESULT);
-                               // XXX ARM: Here this was M_CAST_F2I(s1, REG_RESULT);
+#if !defined(SUPPORT_PASS_FLOATARGS_IN_INTREGS)
                                emit_fmove(cd, s1, REG_FRESULT);
+#else
+                               M_CAST_F2I(s1, REG_RESULT);
+#endif
                                goto nowperformreturn;
 
                        case ICMD_DRETURN:    /* ..., retvalue ==> ...                    */
 
                                REPLACEMENT_POINT_RETURN(cd, iptr);
                                s1 = emit_load_s1(jd, iptr, REG_FRESULT);
-                               // XXX ARM: Here this was M_CAST_D2L(s1, REG_RESULT_PACKED);
+#if !defined(SUPPORT_PASS_FLOATARGS_IN_INTREGS)
                                emit_dmove(cd, s1, REG_FRESULT);
+#else
+                               M_CAST_D2L(s1, REG_LRESULT);
+#endif
                                goto nowperformreturn;
 
 nowperformreturn:
@@ -1964,26 +1972,24 @@ gen_method:
                                                        emit_imove(cd, s1, d);
                                                        break;
 
-#if 0 //XXX For ARM:
-if (!md->params[s3].inmemory) {
-       s1 = emit_load(jd, iptr, var, REG_FTMP1);
-       if (IS_2_WORD_TYPE(var->type))
-               M_CAST_D2L(s1, d);
-       else
-               M_CAST_F2I(s1, d);
-}
-#endif //XXX End of ARM!
-
                                                case TYPE_LNG:
                                                        emit_lmove(cd, s1, d);
                                                        break;
 
                                                case TYPE_FLT:
+#if !defined(SUPPORT_PASS_FLOATARGS_IN_INTREGS)
                                                        emit_fmove(cd, s1, d);
+#else
+                                                       M_CAST_F2I(s1, d);
+#endif
                                                        break;
 
                                                case TYPE_DBL:
+#if !defined(SUPPORT_PASS_FLOATARGS_IN_INTREGS)
                                                        emit_dmove(cd, s1, d);
+#else
+                                                       M_CAST_D2L(s1, d);
+#endif
                                                        break;
                                                }
                                        }
@@ -2071,27 +2077,25 @@ if (!md->params[s3].inmemory) {
                                        emit_store_dst(jd, iptr, s1);
                                        break;
 
-#if 0 //XXX For ARM!!!
-#if !defined(ENABLE_SOFTFLOAT)
-                               } else {
-                                       s1 = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
-                                       if (IS_2_WORD_TYPE(d))
-                                               M_CAST_L2D(REG_RESULT_PACKED, s1);
-                                       else
-                                               M_CAST_I2F(REG_RESULT, s1);
-                               }
-#endif /* !defined(ENABLE_SOFTFLOAT) */
-#endif //XXX End of ARM
-
                                case TYPE_FLT:
+#if !defined(SUPPORT_PASS_FLOATARGS_IN_INTREGS)
                                        s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
                                        emit_fmove(cd, REG_FRESULT, s1);
+#else
+                                       s1 = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
+                                       M_CAST_I2F(REG_RESULT, s1);
+#endif
                                        emit_store_dst(jd, iptr, s1);
                                        break;
 
                                case TYPE_DBL:
+#if !defined(SUPPORT_PASS_FLOATARGS_IN_INTREGS)
                                        s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
                                        emit_dmove(cd, REG_FRESULT, s1);
+#else
+                                       s1 = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
+                                       M_CAST_L2D(REG_LRESULT, s1);
+#endif
                                        emit_store_dst(jd, iptr, s1);
                                        break;