1 /* src/vm/jit/codegen-common.cpp - architecture independent code generator stuff
3 Copyright (C) 1996-2005, 2006, 2007, 2008, 2009
4 CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
5 Copyright (C) 2009 Theobroma Systems Ltd.
7 This file is part of CACAO.
9 This program is free software; you can redistribute it and/or
10 modify it under the terms of the GNU General Public License as
11 published by the Free Software Foundation; either version 2, or (at
12 your option) any later version.
14 This program is distributed in the hope that it will be useful, but
15 WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
24 All functions assume the following code area / data area layout:
28 | code area | code area grows to higher addresses
30 +-----------+ <-- start of procedure
32 | data area | data area grows to lower addresses
36 The functions first write into a temporary code/data area allocated by
37 "codegen_init". "codegen_finish" copies the code and data area into permanent
38 memory. All functions writing values into the data area return the offset
39 relative the begin of the code area (start of procedure).
55 #include "mm/memory.hpp"
57 #include "toolbox/avl.h"
58 #include "toolbox/list.hpp"
59 #include "toolbox/logging.hpp"
61 #include "native/llni.h"
62 #include "native/localref.hpp"
63 #include "native/native.hpp"
65 #include "threads/thread.hpp"
67 #include "vm/jit/builtin.hpp"
68 #include "vm/exceptions.hpp"
69 #include "vm/method.hpp"
70 #include "vm/options.h"
71 #include "vm/statistics.h"
72 #include "vm/string.hpp"
74 #include "vm/jit/abi.h"
75 #include "vm/jit/asmpart.h"
76 #include "vm/jit/code.hpp"
77 #include "vm/jit/codegen-common.hpp"
79 #if defined(ENABLE_DISASSEMBLER)
80 # include "vm/jit/disass.h"
83 #include "vm/jit/dseg.h"
84 #include "vm/jit/emit-common.hpp"
85 #include "vm/jit/jit.hpp"
86 #include "vm/jit/linenumbertable.hpp"
87 #include "vm/jit/methodheader.h"
88 #include "vm/jit/methodtree.h"
89 #include "vm/jit/patcher-common.hpp"
90 #include "vm/jit/replace.hpp"
91 #include "vm/jit/show.hpp"
92 #include "vm/jit/stacktrace.hpp"
93 #include "vm/jit/trace.hpp"
95 #include "vm/jit/optimizing/profile.hpp"
97 #if defined(ENABLE_SSA)
98 # include "vm/jit/optimizing/lsra.h"
99 # include "vm/jit/optimizing/ssa.h"
100 #elif defined(ENABLE_LSRA)
101 # include "vm/jit/allocator/lsra.h"
104 #if defined(ENABLE_INTRP)
105 #include "vm/jit/intrp/intrp.h"
108 #if defined(ENABLE_VMLOG)
109 #include <vmlog_cacao.h>
113 /* codegen_init ****************************************************************
117 *******************************************************************************/
119 void codegen_init(void)
124 /* codegen_setup ***************************************************************
126 Allocates and initialises code area, data area and references.
128 *******************************************************************************/
130 void codegen_setup(jitdata *jd)
135 /* get required compiler data */
140 /* initialize members */
142 // Set flags as requested.
143 if (opt_AlwaysEmitLongBranches) {
144 cd->flags = CODEGENDATA_FLAG_LONGBRANCHES;
150 cd->mcodebase = (u1*) DumpMemory::allocate(MCODEINITSIZE);
151 cd->mcodeend = cd->mcodebase + MCODEINITSIZE;
152 cd->mcodesize = MCODEINITSIZE;
154 /* initialize mcode variables */
156 cd->mcodeptr = cd->mcodebase;
157 cd->lastmcodeptr = cd->mcodebase;
159 #if defined(ENABLE_INTRP)
160 /* native dynamic superinstructions variables */
163 cd->ncodebase = (u1*) DumpMemory::allocate(NCODEINITSIZE);
164 cd->ncodesize = NCODEINITSIZE;
166 /* initialize ncode variables */
168 cd->ncodeptr = cd->ncodebase;
170 cd->lastinstwithoutdispatch = ~0; /* no inst without dispatch */
171 cd->superstarts = NULL;
178 cd->jumpreferences = NULL;
180 #if defined(__I386__) || defined(__X86_64__) || defined(__XDSPCORE__) || defined(__M68K__) || defined(ENABLE_INTRP)
181 cd->datareferences = NULL;
184 cd->brancheslabel = new DumpList<branch_label_ref_t*>();
185 cd->linenumbers = new DumpList<Linenumber>();
189 /* codegen_reset ***************************************************************
191 Resets the codegen data structure so we can recompile the method.
193 *******************************************************************************/
195 static void codegen_reset(jitdata *jd)
201 /* get required compiler data */
206 /* reset error flag */
208 cd->flags &= ~CODEGENDATA_FLAG_ERROR;
210 /* reset some members, we reuse the code memory already allocated
211 as this should have almost the correct size */
213 cd->mcodeptr = cd->mcodebase;
214 cd->lastmcodeptr = cd->mcodebase;
219 cd->jumpreferences = NULL;
221 #if defined(__I386__) || defined(__X86_64__) || defined(__XDSPCORE__) || defined(__M68K__) || defined(ENABLE_INTRP)
222 cd->datareferences = NULL;
225 cd->brancheslabel = new DumpList<branch_label_ref_t*>();
226 cd->linenumbers = new DumpList<Linenumber>();
228 /* We need to clear the mpc and the branch references from all
229 basic blocks as they will definitely change. */
231 for (bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
233 bptr->branchrefs = NULL;
236 /* We need to clear all the patcher references from the codeinfo
237 since they all will be regenerated */
239 patcher_list_reset(code);
241 #if defined(ENABLE_REPLACEMENT)
242 code->rplpoints = NULL;
243 code->rplpointcount = 0;
244 code->regalloc = NULL;
245 code->regalloccount = 0;
246 code->globalcount = 0;
251 /* codegen_generate ************************************************************
253 Generates the code for the currently compiled method.
255 *******************************************************************************/
257 bool codegen_generate(jitdata *jd)
261 /* get required compiler data */
265 /* call the machine-dependent code generation function */
267 if (!codegen_emit(jd))
270 /* check for an error */
272 if (CODEGENDATA_HAS_FLAG_ERROR(cd)) {
273 /* check for long-branches flag, if it is set we recompile the
278 log_message_method("Re-generating code: ", jd->m);
281 /* XXX maybe we should tag long-branches-methods for recompilation */
283 if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
284 /* we have to reset the codegendata structure first */
288 /* and restart the compiler run */
290 if (!codegen_emit(jd))
294 os::abort("codegen_generate: unknown error occurred during codegen_emit: flags=%x\n", cd->flags);
299 log_message_method("Re-generating code done: ", jd->m);
303 /* reallocate the memory and finish the code generation */
307 /* everything's ok */
313 /* codegen_close ***************************************************************
317 *******************************************************************************/
319 void codegen_close(void)
321 /* TODO: release avl tree on i386 and x86_64 */
325 /* codegen_increase ************************************************************
329 *******************************************************************************/
331 void codegen_increase(codegendata *cd)
335 /* save old mcodebase pointer */
337 oldmcodebase = cd->mcodebase;
339 /* reallocate to new, doubled memory */
341 cd->mcodebase = (u1*) DumpMemory::reallocate(cd->mcodebase,
345 cd->mcodeend = cd->mcodebase + cd->mcodesize;
347 /* set new mcodeptr */
349 cd->mcodeptr = cd->mcodebase + (cd->mcodeptr - oldmcodebase);
351 #if defined(__I386__) || defined(__MIPS__) || defined(__X86_64__) || defined(__M68K__) || defined(ENABLE_INTRP) \
352 || defined(__SPARC_64__)
353 /* adjust the pointer to the last patcher position */
355 if (cd->lastmcodeptr != NULL)
356 cd->lastmcodeptr = cd->mcodebase + (cd->lastmcodeptr - oldmcodebase);
361 /* codegen_ncode_increase ******************************************************
365 *******************************************************************************/
367 #if defined(ENABLE_INTRP)
368 u1 *codegen_ncode_increase(codegendata *cd, u1 *ncodeptr)
372 /* save old ncodebase pointer */
374 oldncodebase = cd->ncodebase;
376 /* reallocate to new, doubled memory */
378 cd->ncodebase = DMREALLOC(cd->ncodebase,
384 /* return the new ncodeptr */
386 return (cd->ncodebase + (ncodeptr - oldncodebase));
391 /* codegen_add_branch_ref ******************************************************
393 Prepends an branch to the list.
395 *******************************************************************************/
397 void codegen_add_branch_ref(codegendata *cd, basicblock *target, s4 condition, s4 reg, u4 options)
402 STATISTICS(count_branches_unresolved++);
404 /* calculate the mpc of the branch instruction */
406 branchmpc = cd->mcodeptr - cd->mcodebase;
408 br = (branchref*) DumpMemory::allocate(sizeof(branchref));
410 br->branchmpc = branchmpc;
411 br->condition = condition;
413 br->options = options;
414 br->next = target->branchrefs;
416 target->branchrefs = br;
420 /* codegen_resolve_branchrefs **************************************************
422 Resolves and patches the branch references of a given basic block.
424 *******************************************************************************/
426 void codegen_resolve_branchrefs(codegendata *cd, basicblock *bptr)
431 /* Save the mcodeptr because in the branch emitting functions
432 we generate code somewhere inside already generated code,
433 but we're still in the actual code generation phase. */
435 mcodeptr = cd->mcodeptr;
437 /* just to make sure */
439 assert(bptr->mpc >= 0);
441 for (br = bptr->branchrefs; br != NULL; br = br->next) {
442 /* temporary set the mcodeptr */
444 cd->mcodeptr = cd->mcodebase + br->branchmpc;
446 /* emit_bccz and emit_branch emit the correct code, even if we
447 pass condition == BRANCH_UNCONDITIONAL or reg == -1. */
449 emit_bccz(cd, bptr, br->condition, br->reg, br->options);
452 /* restore mcodeptr */
454 cd->mcodeptr = mcodeptr;
458 /* codegen_branch_label_add ****************************************************
460 Append an branch to the label-branch list.
462 *******************************************************************************/
464 void codegen_branch_label_add(codegendata *cd, s4 label, s4 condition, s4 reg, u4 options)
466 // Calculate the current mpc.
467 int32_t mpc = cd->mcodeptr - cd->mcodebase;
469 branch_label_ref_t* br = (branch_label_ref_t*) DumpMemory::allocate(sizeof(branch_label_ref_t));
473 br->condition = condition;
475 br->options = options;
477 // Add the branch to the list.
478 cd->brancheslabel->push_back(br);
482 /* codegen_set_replacement_point_notrap ****************************************
484 Record the position of a non-trappable replacement point.
486 *******************************************************************************/
488 #if defined(ENABLE_REPLACEMENT)
490 void codegen_set_replacement_point_notrap(codegendata *cd, s4 type)
492 void codegen_set_replacement_point_notrap(codegendata *cd)
495 assert(cd->replacementpoint);
496 assert(cd->replacementpoint->type == type);
497 assert(cd->replacementpoint->flags & RPLPOINT_FLAG_NOTRAP);
499 cd->replacementpoint->pc = (u1*) (ptrint) (cd->mcodeptr - cd->mcodebase);
501 cd->replacementpoint++;
503 #endif /* defined(ENABLE_REPLACEMENT) */
506 /* codegen_set_replacement_point ***********************************************
508 Record the position of a trappable replacement point.
510 *******************************************************************************/
512 #if defined(ENABLE_REPLACEMENT)
514 void codegen_set_replacement_point(codegendata *cd, s4 type)
516 void codegen_set_replacement_point(codegendata *cd)
519 assert(cd->replacementpoint);
520 assert(cd->replacementpoint->type == type);
521 assert(!(cd->replacementpoint->flags & RPLPOINT_FLAG_NOTRAP));
523 cd->replacementpoint->pc = (u1*) (ptrint) (cd->mcodeptr - cd->mcodebase);
525 cd->replacementpoint++;
528 /* XXX actually we should use an own REPLACEMENT_NOPS here! */
529 if (opt_TestReplacement)
533 /* XXX assert(cd->lastmcodeptr <= cd->mcodeptr); */
535 cd->lastmcodeptr = cd->mcodeptr + PATCHER_CALL_SIZE;
537 #endif /* defined(ENABLE_REPLACEMENT) */
540 /* codegen_finish **************************************************************
542 Finishes the code generation. A new memory, large enough for both
543 data and code, is allocated and data and code are copied together
544 to their final layout, unresolved jumps are resolved, ...
546 *******************************************************************************/
548 void codegen_finish(jitdata *jd)
551 #if defined(ENABLE_INTRP)
559 /* Get required compiler data. */
561 codeinfo* code = jd->code;
562 codegendata* cd = jd->cd;
563 registerdata* rd = jd->rd;
565 /* prevent compiler warning */
567 #if defined(ENABLE_INTRP)
571 /* calculate the code length */
573 mcodelen = (s4) (cd->mcodeptr - cd->mcodebase);
575 #if defined(ENABLE_STATISTICS)
577 count_code_len += mcodelen;
578 count_data_len += cd->dseglen;
582 alignedmcodelen = MEMORY_ALIGN(mcodelen, MAX_ALIGN);
584 #if defined(ENABLE_INTRP)
586 ncodelen = cd->ncodeptr - cd->ncodebase;
588 ncodelen = 0; /* avoid compiler warning */
592 cd->dseglen = MEMORY_ALIGN(cd->dseglen, MAX_ALIGN);
593 alignedlen = alignedmcodelen + cd->dseglen;
595 #if defined(ENABLE_INTRP)
597 alignedlen += ncodelen;
601 /* allocate new memory */
603 code->mcodelength = mcodelen + cd->dseglen;
604 code->mcode = CNEW(u1, alignedlen);
606 /* set the entrypoint of the method */
608 assert(code->entrypoint == NULL);
609 code->entrypoint = epoint = (code->mcode + cd->dseglen);
611 /* fill the data segment (code->entrypoint must already be set!) */
615 /* copy code to the new location */
617 MCOPY((void *) code->entrypoint, cd->mcodebase, u1, mcodelen);
619 #if defined(ENABLE_INTRP)
620 /* relocate native dynamic superinstruction code (if any) */
623 cd->mcodebase = code->entrypoint;
626 u1 *ncodebase = code->mcode + cd->dseglen + alignedmcodelen;
628 MCOPY((void *) ncodebase, cd->ncodebase, u1, ncodelen);
630 /* flush the instruction and data caches */
632 md_cacheflush(ncodebase, ncodelen);
634 /* set some cd variables for dynamic_super_rerwite */
636 cd->ncodebase = ncodebase;
639 cd->ncodebase = NULL;
642 dynamic_super_rewrite(cd);
646 /* Fill runtime information about generated code. */
648 code->stackframesize = cd->stackframesize;
649 code->synchronizedoffset = rd->memuse * 8;
650 code->savedintcount = INT_SAV_CNT - rd->savintreguse;
651 code->savedfltcount = FLT_SAV_CNT - rd->savfltreguse;
652 #if defined(HAS_ADDRESS_REGISTER_FILE)
653 code->savedadrcount = ADR_SAV_CNT - rd->savadrreguse;
656 /* Create the exception table. */
658 exceptiontable_create(jd);
660 /* Create the linenumber table. */
662 code->linenumbertable = new LinenumberTable(jd);
664 /* jump table resolving */
666 for (jr = cd->jumpreferences; jr != NULL; jr = jr->next)
667 *((functionptr *) ((ptrint) epoint + jr->tablepos)) =
668 (functionptr) ((ptrint) epoint + (ptrint) jr->target->mpc);
670 /* patcher resolving */
674 #if defined(ENABLE_REPLACEMENT)
675 /* replacement point resolving */
680 rp = code->rplpoints;
681 for (i=0; i<code->rplpointcount; ++i, ++rp) {
682 rp->pc = (u1*) ((ptrint) epoint + (ptrint) rp->pc);
685 #endif /* defined(ENABLE_REPLACEMENT) */
687 /* Insert method into methodtree to find the entrypoint. */
689 methodtree_insert(code->entrypoint, code->entrypoint + mcodelen);
691 #if defined(__I386__) || defined(__X86_64__) || defined(__XDSPCORE__) || defined(__M68K__) || defined(ENABLE_INTRP)
692 /* resolve data segment references */
694 dseg_resolve_datareferences(jd);
697 /* flush the instruction and data caches */
699 md_cacheflush(code->mcode, code->mcodelength);
703 /* codegen_start_native_call ***************************************************
705 Prepares the stuff required for a native (JNI) function call:
707 - adds a stackframe info structure to the chain, for stacktraces
708 - prepares the local references table on the stack
710 The layout of the native stub stackframe should look like this:
712 +---------------------------+ <- java SP (of parent Java function)
714 +---------------------------+ <- data SP
716 | stackframe info structure |
718 +---------------------------+
720 | local references table |
722 +---------------------------+
724 | saved registers (if any) |
726 +---------------------------+
728 | arguments (if any) |
730 +---------------------------+ <- current SP (native stub)
732 *******************************************************************************/
734 java_handle_t *codegen_start_native_call(u1 *sp, u1 *pv)
736 stackframeinfo_t *sfi;
747 STATISTICS(count_calls_java_to_native++);
749 // Get information from method header.
750 code = code_get_codeinfo_for_pv(pv);
751 assert(code != NULL);
753 framesize = md_stacktrace_get_framesize(code);
754 assert(framesize >= (int32_t) (sizeof(stackframeinfo_t) + sizeof(localref_table)));
756 // Get the methodinfo.
757 m = code_get_methodinfo_for_pv(pv);
760 /* calculate needed values */
762 #if defined(__ALPHA__) || defined(__ARM__)
763 datasp = sp + framesize - SIZEOF_VOID_P;
764 javasp = sp + framesize;
765 arg_regs = (uint64_t *) sp;
766 arg_stack = (uint64_t *) javasp;
767 #elif defined(__MIPS__)
768 /* MIPS always uses 8 bytes to store the RA */
769 datasp = sp + framesize - 8;
770 javasp = sp + framesize;
771 # if SIZEOF_VOID_P == 8
772 arg_regs = (uint64_t *) sp;
774 arg_regs = (uint64_t *) (sp + 5 * 8);
776 arg_stack = (uint64_t *) javasp;
777 #elif defined(__S390__)
778 datasp = sp + framesize - 8;
779 javasp = sp + framesize;
780 arg_regs = (uint64_t *) (sp + 96);
781 arg_stack = (uint64_t *) javasp;
782 #elif defined(__I386__) || defined(__M68K__) || defined(__X86_64__)
783 datasp = sp + framesize;
784 javasp = sp + framesize + SIZEOF_VOID_P;
785 arg_regs = (uint64_t *) sp;
786 arg_stack = (uint64_t *) javasp;
787 #elif defined(__POWERPC__)
788 datasp = sp + framesize;
789 javasp = sp + framesize;
790 arg_regs = (uint64_t *) (sp + LA_SIZE + 4 * SIZEOF_VOID_P);
791 arg_stack = (uint64_t *) javasp;
792 #elif defined(__POWERPC64__)
793 datasp = sp + framesize;
794 javasp = sp + framesize;
795 arg_regs = (uint64_t *) (sp + PA_SIZE + LA_SIZE + 4 * SIZEOF_VOID_P);
796 arg_stack = (uint64_t *) javasp;
798 /* XXX is was unable to do this port for SPARC64, sorry. (-michi) */
799 /* XXX maybe we need to pass the RA as argument there */
800 os::abort("codegen_start_native_call: unsupported architecture");
803 /* get data structures from stack */
805 sfi = (stackframeinfo_t *) (datasp - sizeof(stackframeinfo_t));
806 lrt = (localref_table *) (datasp - sizeof(stackframeinfo_t) -
807 sizeof(localref_table));
809 #if defined(ENABLE_JNI)
810 /* add current JNI local references table to this thread */
812 localref_table_add(lrt);
816 # if defined(__ALPHA__) || defined(__I386__) || defined(__M68K__) || defined(__MIPS__) || defined(__POWERPC__) || defined(__POWERPC64__) || defined(__S390__) || defined(__X86_64__)
817 /* print the call-trace if necesarry */
818 /* BEFORE: filling the local reference table */
820 if (opt_TraceJavaCalls || opt_TraceBuiltinCalls)
821 trace_java_call_enter(m, arg_regs, arg_stack);
825 #if defined(ENABLE_HANDLES)
826 /* place all references into the local reference table */
827 /* BEFORE: creating stackframeinfo */
829 localref_native_enter(m, arg_regs, arg_stack);
832 /* Add a stackframeinfo for this native method. We don't have RA
833 and XPC here. These are determined in
834 stacktrace_stackframeinfo_add. */
836 stacktrace_stackframeinfo_add(sfi, pv, sp, NULL, NULL);
838 /* Return a wrapped classinfo for static methods. */
840 if (m->flags & ACC_STATIC)
841 return (java_handle_t *) LLNI_classinfo_wrap(m->clazz);
847 /* codegen_finish_native_call **************************************************
849 Removes the stuff required for a native (JNI) function call.
850 Additionally it checks for an exceptions and in case, get the
851 exception object and clear the pointer.
853 *******************************************************************************/
855 java_object_t *codegen_finish_native_call(u1 *sp, u1 *pv)
857 stackframeinfo_t *sfi;
867 // Get information from method header.
868 code = code_get_codeinfo_for_pv(pv);
869 assert(code != NULL);
871 framesize = md_stacktrace_get_framesize(code);
873 // Get the methodinfo.
877 /* calculate needed values */
879 #if defined(__ALPHA__) || defined(__ARM__)
880 datasp = sp + framesize - SIZEOF_VOID_P;
881 ret_regs = (uint64_t *) sp;
882 #elif defined(__MIPS__)
883 /* MIPS always uses 8 bytes to store the RA */
884 datasp = sp + framesize - 8;
885 # if SIZEOF_VOID_P == 8
886 ret_regs = (uint64_t *) sp;
888 ret_regs = (uint64_t *) (sp + 1 * 8);
890 #elif defined(__S390__)
891 datasp = sp + framesize - 8;
892 ret_regs = (uint64_t *) (sp + 96);
893 #elif defined(__I386__)
894 datasp = sp + framesize;
895 ret_regs = (uint64_t *) (sp + 2 * SIZEOF_VOID_P);
896 #elif defined(__M68K__)
897 datasp = sp + framesize;
898 ret_regs = (uint64_t *) (sp + 2 * 8);
899 #elif defined(__X86_64__)
900 datasp = sp + framesize;
901 ret_regs = (uint64_t *) sp;
902 #elif defined(__POWERPC__)
903 datasp = sp + framesize;
904 ret_regs = (uint64_t *) (sp + LA_SIZE + 2 * SIZEOF_VOID_P);
905 #elif defined(__POWERPC64__)
906 datasp = sp + framesize;
907 ret_regs = (uint64_t *) (sp + PA_SIZE + LA_SIZE + 2 * SIZEOF_VOID_P);
909 os::abort("codegen_finish_native_call: unsupported architecture");
912 /* get data structures from stack */
914 sfi = (stackframeinfo_t *) (datasp - sizeof(stackframeinfo_t));
916 /* Remove current stackframeinfo from chain. */
918 stacktrace_stackframeinfo_remove(sfi);
920 #if defined(ENABLE_HANDLES)
921 /* unwrap the return value from the local reference table */
922 /* AFTER: removing the stackframeinfo */
923 /* BEFORE: releasing the local reference table */
925 localref_native_exit(m, ret_regs);
928 /* get and unwrap the exception */
929 /* AFTER: removing the stackframe info */
930 /* BEFORE: releasing the local reference table */
932 e = exceptions_get_and_clear_exception();
935 #if defined(ENABLE_JNI)
936 /* release JNI local references table for this thread */
938 localref_frame_pop_all();
939 localref_table_remove();
943 # if defined(__ALPHA__) || defined(__I386__) || defined(__M68K__) || defined(__MIPS__) || defined(__POWERPC__) || defined(__POWERPC64__) || defined(__S390__) || defined(__X86_64__)
944 /* print the call-trace if necesarry */
945 /* AFTER: unwrapping the return value */
947 if (opt_TraceJavaCalls || opt_TraceBuiltinCalls)
948 trace_java_call_exit(m, ret_regs);
956 /* codegen_reg_of_var **********************************************************
958 This function determines a register, to which the result of an
959 operation should go, when it is ultimatively intended to store the
960 result in pseudoregister v. If v is assigned to an actual
961 register, this register will be returned. Otherwise (when v is
962 spilled) this function returns tempregnum. If not already done,
963 regoff and flags are set in the stack location.
965 *******************************************************************************/
967 s4 codegen_reg_of_var(u2 opcode, varinfo *v, s4 tempregnum)
969 if (!(v->flags & INMEMORY))
976 /* codegen_reg_of_dst **********************************************************
978 This function determines a register, to which the result of an
979 operation should go, when it is ultimatively intended to store the
980 result in iptr->dst.var. If dst.var is assigned to an actual
981 register, this register will be returned. Otherwise (when it is
982 spilled) this function returns tempregnum. If not already done,
983 regoff and flags are set in the stack location.
985 *******************************************************************************/
987 s4 codegen_reg_of_dst(jitdata *jd, instruction *iptr, s4 tempregnum)
989 return codegen_reg_of_var(iptr->opc, VAROP(iptr->dst), tempregnum);
994 * Generates machine code.
996 bool codegen_emit(jitdata *jd)
999 builtintable_entry* bte;
1001 int32_t s1, s2, /*s3,*/ d;
1006 // Get required compiler data.
1007 //methodinfo* m = jd->m;
1008 codeinfo* code = jd->code;
1009 codegendata* cd = jd->cd;
1010 registerdata* rd = jd->rd;
1011 #if defined(ENABLE_SSA)
1012 lsradata* ls = jd->ls;
1013 bool last_cmd_was_goto = false;
1016 // Space to save used callee saved registers.
1017 int32_t savedregs_num = 0;
1018 savedregs_num += (INT_SAV_CNT - rd->savintreguse);
1019 savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
1020 #ifdef HAS_ADDRESS_REGISTER_FILE
1021 savedregs_num += (ADR_SAV_CNT - rd->savadrreguse);
1024 // Calculate size of stackframe.
1025 cd->stackframesize = rd->memuse + savedregs_num;
1027 // Space to save the return address.
1028 #if STACKFRAME_RA_TOP_OF_FRAME
1029 # if STACKFRAME_LEAFMETHODS_RA_REGISTER
1030 if (!code_is_leafmethod(code))
1032 cd->stackframesize += 1;
1035 // Space to save argument of monitor_enter.
1036 #if defined(ENABLE_THREADS)
1037 if (checksync && code_is_synchronized(code))
1038 # if STACKFRAME_SYNC_NEEDS_TWO_SLOTS
1039 /* On some architectures the stack position for the argument can
1040 not be shared with place to save the return register values to
1041 survive monitor_exit since both values reside in the same register. */
1042 cd->stackframesize += 2;
1044 cd->stackframesize += 1;
1048 // Keep stack of non-leaf functions 16-byte aligned for calls into
1050 if (!code_is_leafmethod(code) || JITDATA_HAS_FLAG_VERBOSECALL(jd))
1051 #if STACKFRMAE_RA_BETWEEN_FRAMES
1052 ALIGN_ODD(cd->stackframesize);
1054 ALIGN_EVEN(cd->stackframesize);
1057 #if defined(SPECIALMEMUSE)
1058 // On architectures having a linkage area, we can get rid of the whole
1059 // stackframe in leaf functions without saved registers.
1060 if (code_is_leafmethod(code) && (cd->stackframesize == LA_SIZE_IN_POINTERS))
1061 cd->stackframesize = 0;
1065 * SECTION 1: Method header generation.
1068 // The method header was reduced to the bare minimum of one pointer
1069 // to the codeinfo structure, which in turn contains all runtime
1070 // information. However this section together with the methodheader.h
1071 // file will be kept alive for historical reasons. It might come in
1072 // handy at some point.
1074 (void) dseg_add_unique_address(cd, code); ///< CodeinfoPointer
1076 // XXX, REMOVEME: We still need it for exception handling in assembler.
1077 // XXX ARM, M68K: (void) dseg_add_unique_s4(cd, cd->stackframesize);
1078 #if defined(__I386__)
1079 int align_off = (cd->stackframesize != 0) ? 4 : 0;
1080 (void) dseg_add_unique_s4(cd, cd->stackframesize * 8 + align_off); /* FrameSize */
1082 (void) dseg_add_unique_s4(cd, cd->stackframesize * 8); /* FrameSize */
1084 // XXX M68K: We use the IntSave as a split field for the adr now
1085 // (void) dseg_add_unique_s4(cd, (ADR_SAV_CNT - rd->savadrreguse) << 16 | (INT_SAV_CNT - rd->savintreguse)); /* IntSave */
1086 (void) dseg_add_unique_s4(cd, code_is_leafmethod(code) ? 1 : 0);
1087 (void) dseg_add_unique_s4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
1088 (void) dseg_add_unique_s4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
1091 * SECTION 2: Method prolog generation.
1094 #if defined(ENABLE_PROFILING)
1095 // Generate method profiling code.
1096 if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) {
1098 // Count method frequency.
1099 emit_profile_method(cd, code);
1101 // Start CPU cycle counting.
1102 emit_profile_cycle_start(cd, code);
1106 // Emit code for the method prolog.
1107 codegen_emit_prolog(jd);
1109 #if defined(ENABLE_THREADS)
1110 // Emit code to call monitorenter function.
1111 if (checksync && code_is_synchronized(code))
1112 emit_monitor_enter(jd, rd->memuse * 8);
1115 #if !defined(NDEBUG)
1116 // Call trace function.
1117 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
1118 emit_verbosecall_enter(jd);
1121 #if defined(ENABLE_SSA)
1122 // With SSA the header is basicblock 0, insert phi moves if necessary.
1124 codegen_emit_phi_moves(jd, ls->basicblocks[0]);
1127 // Create replacement points.
1128 REPLACEMENT_POINTS_INIT(cd, jd);
1131 * SECTION 3: ICMD code generation.
1134 // Walk through all basic blocks.
1135 for (basicblock* bptr = jd->basicblocks; bptr != NULL; bptr = bptr->next) {
1137 bptr->mpc = (s4) (cd->mcodeptr - cd->mcodebase);
1139 // Is this basic block reached?
1140 if (bptr->flags < BBREACHED)
1143 // Branch resolving.
1144 codegen_resolve_branchrefs(cd, bptr);
1146 // Handle replacement points.
1147 REPLACEMENT_POINT_BLOCK_START(cd, bptr);
1149 #if defined(ENABLE_REPLACEMENT) && defined(__I386__)
1150 // Generate countdown trap code.
1151 methodinfo* m = jd->m;
1152 if (bptr->bitflags & BBFLAG_REPLACEMENT) {
1153 if (cd->replacementpoint[-1].flags & RPLPOINT_FLAG_COUNTDOWN) {
1155 emit_trap_countdown(cd, &(m->hitcountdown));
1160 #if defined(ENABLE_PROFILING)
1161 // Generate basicblock profiling code.
1162 if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) {
1164 // Count basicblock frequency.
1165 emit_profile_basicblock(cd, code, bptr);
1167 // If this is an exception handler, start profiling again.
1168 if (bptr->type == BBTYPE_EXH)
1169 emit_profile_cycle_start(cd, code);
1173 // Copy interface registers to their destination.
1174 int32_t indepth = bptr->indepth;
1175 // XXX Check if this is true for all archs.
1176 MCODECHECK(64+indepth); // All
1177 MCODECHECK(128+indepth); // PPC64
1178 MCODECHECK(512); // I386, X86_64, S390
1179 #if defined(ENABLE_SSA)
1180 // XXX Check if this is correct and add a propper comment!
1182 last_cmd_was_goto = false;
1184 #elif defined(ENABLE_LSRA)
1186 while (indepth > 0) {
1188 var = VAR(bptr->invars[indepth]);
1189 if ((indepth == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
1190 if (!IS_INMEMORY(src->flags))
1194 // XXX M68K: Actually this is M_ADRMOVE(REG_ATMP1_XPTR, d);
1195 // XXX Sparc64: Here we use REG_ITMP2_XPTR, fix this!
1196 // XXX S390: Here we use REG_ITMP3_XPTR, fix this!
1197 emit_imove(cd, REG_ITMP1_XPTR, d);
1198 emit_store(jd, NULL, var, d);
1203 while (indepth > 0) {
1205 var = VAR(bptr->invars[indepth]);
1206 if ((indepth == bptr->indepth-1) && (bptr->type == BBTYPE_EXH)) {
1207 d = codegen_reg_of_var(0, var, REG_ITMP1_XPTR);
1208 // XXX M68K: Actually this is M_ADRMOVE(REG_ATMP1_XPTR, d);
1209 // XXX Sparc64: Here we use REG_ITMP2_XPTR, fix this!
1210 // XXX S390: Here we use REG_ITMP3_XPTR, fix this!
1211 emit_imove(cd, REG_ITMP1_XPTR, d);
1212 emit_store(jd, NULL, var, d);
1215 assert((var->flags & INOUT));
1218 #if defined(ENABLE_SSA) || defined(ENABLE_LSRA)
1222 // Walk through all instructions.
1223 int32_t len = bptr->icount;
1224 uint16_t currentline = 0;
1225 for (instruction* iptr = bptr->iinstr; len > 0; len--, iptr++) {
1228 if (iptr->line != currentline) {
1229 linenumbertable_list_entry_add(cd, iptr->line);
1230 currentline = iptr->line;
1233 // An instruction usually needs < 64 words.
1234 // XXX Check if this is true for all archs.
1235 MCODECHECK(64); // All
1236 MCODECHECK(128); // PPC64
1237 MCODECHECK(1024); // I386, X86_64, M68K, S390 /* 1kB should be enough */
1240 switch (iptr->opc) {
1242 case ICMD_NOP: /* ... ==> ... */
1243 case ICMD_POP: /* ..., value ==> ... */
1244 case ICMD_POP2: /* ..., value, value ==> ... */
1247 case ICMD_CHECKNULL: /* ..., objectref ==> ..., objectref */
1249 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1250 emit_nullpointer_check(cd, iptr, s1);
1253 case ICMD_BREAKPOINT: /* ... ==> ... */
1254 /* sx.val.anyptr = Breakpoint */
1256 patcher_add_patch_ref(jd, PATCHER_breakpoint, iptr->sx.val.anyptr, 0);
1260 #if defined(ENABLE_SSA)
1261 case ICMD_GETEXCEPTION:
1263 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1264 emit_imove(cd, REG_ITMP1, d);
1265 emit_store_dst(jd, iptr, d);
1269 /* inline operations **********************************************/
1271 case ICMD_INLINE_START:
1273 REPLACEMENT_POINT_INLINE_START(cd, iptr);
1276 case ICMD_INLINE_BODY:
1278 REPLACEMENT_POINT_INLINE_BODY(cd, iptr);
1279 linenumbertable_list_entry_add_inline_start(cd, iptr);
1280 linenumbertable_list_entry_add(cd, iptr->line);
1283 case ICMD_INLINE_END:
1285 linenumbertable_list_entry_add_inline_end(cd, iptr);
1286 linenumbertable_list_entry_add(cd, iptr->line);
1290 /* constant operations ********************************************/
1292 case ICMD_ICONST: /* ... ==> ..., constant */
1294 d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
1295 ICONST(d, iptr->sx.val.i);
1296 emit_store_dst(jd, iptr, d);
1299 case ICMD_LCONST: /* ... ==> ..., constant */
1301 d = codegen_reg_of_dst(jd, iptr, REG_LTMP12);
1302 LCONST(d, iptr->sx.val.l);
1303 emit_store_dst(jd, iptr, d);
1307 /* load/store/copy/move operations ********************************/
1311 case ICMD_ILOAD: /* ... ==> ..., content of local variable */
1312 case ICMD_LLOAD: /* s1 = local variable */
1316 case ICMD_ISTORE: /* ..., value ==> ... */
1321 emit_copy(jd, iptr);
1326 if (!(iptr->flags.bits & INS_FLAG_RETADDR))
1327 emit_copy(jd, iptr);
1331 /* integer operations *********************************************/
1333 case ICMD_FCONST: /* ... ==> ..., constant */
1334 case ICMD_DCONST: /* ... ==> ..., constant */
1335 case ICMD_ACONST: /* ... ==> ..., constant */
1336 case ICMD_INEG: /* ..., value ==> ..., - value */
1337 case ICMD_LNEG: /* ..., value ==> ..., - value */
1338 case ICMD_I2L: /* ..., value ==> ..., value */
1339 case ICMD_L2I: /* ..., value ==> ..., value */
1340 case ICMD_INT2BYTE: /* ..., value ==> ..., value */
1341 case ICMD_INT2CHAR: /* ..., value ==> ..., value */
1342 case ICMD_INT2SHORT: /* ..., value ==> ..., value */
1343 case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */
1345 case ICMD_IADDCONST: /* ..., value ==> ..., value + constant */
1346 /* sx.val.i = constant */
1347 case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */
1348 case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */
1349 /* sx.val.l = constant */
1350 case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */
1351 case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */
1352 /* sx.val.i = constant */
1353 case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
1354 case ICMD_LSUBCONST: /* ..., value ==> ..., value - constant */
1355 /* sx.val.l = constant */
1356 case ICMD_IMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
1357 case ICMD_IMULCONST: /* ..., value ==> ..., value * constant */
1358 /* sx.val.i = constant */
1359 case ICMD_LMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
1360 case ICMD_LMULCONST: /* ..., value ==> ..., value * constant */
1361 /* sx.val.l = constant */
1362 case ICMD_IDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
1363 case ICMD_IREM: /* ..., val1, val2 ==> ..., val1 % val2 */
1364 case ICMD_IDIVPOW2: /* ..., value ==> ..., value >> constant */
1365 /* sx.val.i = constant */
1366 case ICMD_IREMPOW2: /* ..., value ==> ..., value % constant */
1367 /* sx.val.i = constant */
1368 case ICMD_LDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
1369 case ICMD_LREM: /* ..., val1, val2 ==> ..., val1 % val2 */
1370 case ICMD_LDIVPOW2: /* ..., value ==> ..., value >> constant */
1371 /* sx.val.i = constant */
1372 case ICMD_LREMPOW2: /* ..., value ==> ..., value % constant */
1373 /* sx.val.l = constant */
1374 case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */
1375 case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */
1376 /* sx.val.i = constant */
1377 case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
1378 case ICMD_ISHRCONST: /* ..., value ==> ..., value >> constant */
1379 /* sx.val.i = constant */
1380 case ICMD_IUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
1381 case ICMD_IUSHRCONST: /* ..., value ==> ..., value >>> constant */
1382 /* sx.val.i = constant */
1383 case ICMD_LSHL: /* ..., val1, val2 ==> ..., val1 << val2 */
1384 case ICMD_LSHLCONST: /* ..., value ==> ..., value << constant */
1385 /* sx.val.i = constant */
1386 case ICMD_LSHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
1387 case ICMD_LSHRCONST: /* ..., value ==> ..., value >> constant */
1388 /* sx.val.i = constant */
1389 case ICMD_LUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
1390 case ICMD_LUSHRCONST: /* ..., value ==> ..., value >>> constant */
1391 /* sx.val.l = constant */
1392 case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */
1393 case ICMD_IANDCONST: /* ..., value ==> ..., value & constant */
1394 /* sx.val.i = constant */
1395 case ICMD_LAND: /* ..., val1, val2 ==> ..., val1 & val2 */
1396 case ICMD_LANDCONST: /* ..., value ==> ..., value & constant */
1397 /* sx.val.l = constant */
1398 case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */
1399 case ICMD_IORCONST: /* ..., value ==> ..., value | constant */
1400 /* sx.val.i = constant */
1401 case ICMD_LOR: /* ..., val1, val2 ==> ..., val1 | val2 */
1402 case ICMD_LORCONST: /* ..., value ==> ..., value | constant */
1403 /* sx.val.l = constant */
1404 case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
1405 case ICMD_IXORCONST: /* ..., value ==> ..., value ^ constant */
1406 /* sx.val.i = constant */
1407 case ICMD_LXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
1408 case ICMD_LXORCONST: /* ..., value ==> ..., value ^ constant */
1409 /* sx.val.l = constant */
1411 // Generate architecture specific instructions.
1412 codegen_emit_instruction(jd, iptr);
1416 /* floating operations ********************************************/
1418 #if !defined(ENABLE_SOFTFLOAT)
1419 case ICMD_FNEG: /* ..., value ==> ..., - value */
1421 case ICMD_FADD: /* ..., val1, val2 ==> ..., val1 + val2 */
1423 case ICMD_FSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
1425 case ICMD_FMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
1427 case ICMD_FDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
1429 case ICMD_FREM: /* ..., val1, val2 ==> ..., val1 % val2 */
1431 case ICMD_I2F: /* ..., value ==> ..., (float) value */
1432 case ICMD_I2D: /* ..., value ==> ..., (double) value */
1433 case ICMD_L2F: /* ..., value ==> ..., (float) value */
1434 case ICMD_L2D: /* ..., value ==> ..., (double) value */
1435 case ICMD_F2I: /* ..., value ==> ..., (int) value */
1437 case ICMD_F2L: /* ..., value ==> ..., (long) value */
1439 case ICMD_F2D: /* ..., value ==> ..., (double) value */
1440 case ICMD_D2F: /* ..., value ==> ..., (float) value */
1441 case ICMD_FCMPL: /* ..., val1, val2 ==> ..., val1 fcmpg val2 */
1442 case ICMD_DCMPL: /* == => 0, < => 1, > => -1 */
1443 case ICMD_FCMPG: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
1444 case ICMD_DCMPG: /* == => 0, < => 1, > => -1 */
1446 // Generate architecture specific instructions.
1447 codegen_emit_instruction(jd, iptr);
1449 #endif /* !defined(ENABLE_SOFTFLOAT) */
1452 /* memory operations **********************************************/
1454 case ICMD_ARRAYLENGTH:/* ..., arrayref ==> ..., length */
1456 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1457 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1458 /* implicit null-pointer check */
1459 // XXX PPC64: Here we had an explicit null-pointer check
1460 // which I think was obsolete, please confirm. Otherwise:
1461 // emit_nullpointer_check(cd, iptr, s1);
1462 M_ILD(d, s1, OFFSET(java_array_t, size));
1463 emit_store_dst(jd, iptr, d);
1466 case ICMD_BALOAD: /* ..., arrayref, index ==> ..., value */
1467 case ICMD_CALOAD: /* ..., arrayref, index ==> ..., value */
1468 case ICMD_SALOAD: /* ..., arrayref, index ==> ..., value */
1469 case ICMD_IALOAD: /* ..., arrayref, index ==> ..., value */
1470 case ICMD_LALOAD: /* ..., arrayref, index ==> ..., value */
1471 case ICMD_FALOAD: /* ..., arrayref, index ==> ..., value */
1472 case ICMD_DALOAD: /* ..., arrayref, index ==> ..., value */
1473 case ICMD_AALOAD: /* ..., arrayref, index ==> ..., value */
1474 case ICMD_BASTORE: /* ..., arrayref, index, value ==> ... */
1475 case ICMD_CASTORE: /* ..., arrayref, index, value ==> ... */
1476 case ICMD_SASTORE: /* ..., arrayref, index, value ==> ... */
1477 case ICMD_IASTORE: /* ..., arrayref, index, value ==> ... */
1478 case ICMD_LASTORE: /* ..., arrayref, index, value ==> ... */
1479 case ICMD_FASTORE: /* ..., arrayref, index, value ==> ... */
1480 case ICMD_DASTORE: /* ..., arrayref, index, value ==> ... */
1481 case ICMD_AASTORE: /* ..., arrayref, index, value ==> ... */
1482 case ICMD_BASTORECONST: /* ..., arrayref, index ==> ... */
1483 case ICMD_CASTORECONST: /* ..., arrayref, index ==> ... */
1484 case ICMD_SASTORECONST: /* ..., arrayref, index ==> ... */
1485 case ICMD_IASTORECONST: /* ..., arrayref, index ==> ... */
1486 case ICMD_LASTORECONST: /* ..., arrayref, index ==> ... */
1487 case ICMD_FASTORECONST: /* ..., arrayref, index ==> ... */
1488 case ICMD_DASTORECONST: /* ..., arrayref, index ==> ... */
1489 case ICMD_AASTORECONST: /* ..., arrayref, index ==> ... */
1490 case ICMD_GETFIELD: /* ... ==> ..., value */
1491 case ICMD_PUTFIELD: /* ..., value ==> ... */
1492 case ICMD_PUTFIELDCONST: /* ..., objectref ==> ... */
1493 /* val = value (in current instruction) */
1494 case ICMD_PUTSTATICCONST: /* ... ==> ... */
1495 /* val = value (in current instruction) */
1497 // Generate architecture specific instructions.
1498 codegen_emit_instruction(jd, iptr);
1501 case ICMD_GETSTATIC: /* ... ==> ..., value */
1503 #if defined(__I386__)
1504 // Generate architecture specific instructions.
1505 codegen_emit_instruction(jd, iptr);
1507 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1508 unresolved_field* uf = iptr->sx.s23.s3.uf;
1509 fieldtype = uf->fieldref->parseddesc.fd->type;
1510 disp = dseg_add_unique_address(cd, 0);
1512 patcher_add_patch_ref(jd, PATCHER_get_putstatic, uf, disp);
1515 fieldinfo* fi = iptr->sx.s23.s3.fmiref->p.field;
1516 fieldtype = fi->type;
1517 disp = dseg_add_address(cd, fi->value);
1519 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->clazz)) {
1521 patcher_add_patch_ref(jd, PATCHER_initialize_class, fi->clazz, 0);
1522 PROFILE_CYCLE_START;
1526 // XXX X86_64: Here We had this:
1527 /* This approach is much faster than moving the field
1528 address inline into a register. */
1530 // XXX ARM: M_DSEG_LOAD(REG_ITMP3, disp);
1531 M_ALD_DSEG(REG_ITMP1, disp);
1533 switch (fieldtype) {
1535 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1536 M_ALD(d, REG_ITMP1, 0);
1539 d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
1540 M_ILD(d, REG_ITMP1, 0);
1543 d = codegen_reg_of_dst(jd, iptr, REG_LTMP23);
1544 M_LLD(d, REG_ITMP1, 0);
1547 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1548 M_FLD(d, REG_ITMP1, 0);
1551 d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
1552 M_DLD(d, REG_ITMP1, 0);
1555 emit_store_dst(jd, iptr, d);
1559 case ICMD_PUTSTATIC: /* ..., value ==> ... */
1561 #if defined(__I386__)
1562 // Generate architecture specific instructions.
1563 codegen_emit_instruction(jd, iptr);
1565 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1566 unresolved_field* uf = iptr->sx.s23.s3.uf;
1567 fieldtype = uf->fieldref->parseddesc.fd->type;
1568 disp = dseg_add_unique_address(cd, 0);
1570 patcher_add_patch_ref(jd, PATCHER_get_putstatic, uf, disp);
1573 fieldinfo* fi = iptr->sx.s23.s3.fmiref->p.field;
1574 fieldtype = fi->type;
1575 disp = dseg_add_address(cd, fi->value);
1577 if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->clazz)) {
1579 patcher_add_patch_ref(jd, PATCHER_initialize_class, fi->clazz, 0);
1580 PROFILE_CYCLE_START;
1584 // XXX X86_64: Here We had this:
1585 /* This approach is much faster than moving the field
1586 address inline into a register. */
1588 // XXX ARM: M_DSEG_LOAD(REG_ITMP3, disp);
1589 M_ALD_DSEG(REG_ITMP1, disp);
1591 switch (fieldtype) {
1593 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1594 M_AST(s1, REG_ITMP1, 0);
1597 s1 = emit_load_s1(jd, iptr, REG_ITMP2);
1598 M_IST(s1, REG_ITMP1, 0);
1601 s1 = emit_load_s1(jd, iptr, REG_LTMP23);
1602 M_LST(s1, REG_ITMP1, 0);
1605 s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1606 M_FST(s1, REG_ITMP1, 0);
1609 s1 = emit_load_s1(jd, iptr, REG_FTMP2);
1610 M_DST(s1, REG_ITMP1, 0);
1616 /* branch operations **********************************************/
1618 case ICMD_ATHROW: /* ..., objectref ==> ... (, objectref) */
1620 // We might leave this method, stop profiling.
1623 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1624 // XXX M68K: Actually this is M_ADRMOVE(s1, REG_ATMP1_XPTR);
1625 // XXX Sparc64: We use REG_ITMP2_XPTR here, fix me!
1626 emit_imove(cd, s1, REG_ITMP1_XPTR);
1628 #ifdef ENABLE_VERIFIER
1629 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1630 unresolved_class *uc = iptr->sx.s23.s2.uc;
1631 patcher_add_patch_ref(jd, PATCHER_resolve_class, uc, 0);
1633 #endif /* ENABLE_VERIFIER */
1635 // Generate architecture specific instructions.
1636 codegen_emit_instruction(jd, iptr);
1640 case ICMD_GOTO: /* ... ==> ... */
1641 case ICMD_RET: /* ... ==> ... */
1643 #if defined(ENABLE_SSA)
1644 // In case of a goto, phimoves have to be inserted
1647 last_cmd_was_goto = true;
1648 codegen_emit_phi_moves(jd, bptr);
1651 emit_br(cd, iptr->dst.block);
1655 case ICMD_JSR: /* ... ==> ... */
1657 emit_br(cd, iptr->sx.s23.s3.jsrtarget.block);
1661 case ICMD_IFNULL: /* ..., value ==> ... */
1662 case ICMD_IFNONNULL:
1664 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1665 #if SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1666 emit_bccz(cd, iptr->dst.block, iptr->opc - ICMD_IFNULL, s1, BRANCH_OPT_NONE);
1667 #elif SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1669 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IFNULL, BRANCH_OPT_NONE);
1671 # error Unable to generate code for this configuration!
1675 case ICMD_IFEQ: /* ..., value ==> ... */
1682 // XXX Sparc64: int compares must not branch on the
1683 // register directly. Reason is, that register content is
1684 // not 32-bit clean. Fix this!
1686 #if SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1687 if (iptr->sx.val.i == 0) {
1688 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1689 emit_bccz(cd, iptr->dst.block, iptr->opc - ICMD_IFEQ, s1, BRANCH_OPT_NONE);
1691 // Generate architecture specific instructions.
1692 codegen_emit_instruction(jd, iptr);
1694 #elif SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1695 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1696 emit_icmp_imm(cd, s1, iptr->sx.val.i);
1697 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IFEQ, BRANCH_OPT_NONE);
1699 # error Unable to generate code for this configuration!
1703 case ICMD_IF_LEQ: /* ..., value ==> ... */
1710 // Generate architecture specific instructions.
1711 codegen_emit_instruction(jd, iptr);
1714 case ICMD_IF_ACMPEQ: /* ..., value, value ==> ... */
1715 case ICMD_IF_ACMPNE: /* op1 = target JavaVM pc */
1717 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1718 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1719 #if SUPPORT_BRANCH_CONDITIONAL_TWO_INTEGER_REGISTERS
1720 switch (iptr->opc) {
1721 case ICMD_IF_ACMPEQ:
1722 emit_beq(cd, iptr->dst.block, s1, s2);
1724 case ICMD_IF_ACMPNE:
1725 emit_bne(cd, iptr->dst.block, s1, s2);
1728 #elif SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1730 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_ACMPEQ, BRANCH_OPT_NONE);
1731 #elif SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1732 M_CMPEQ(s1, s2, REG_ITMP1);
1733 switch (iptr->opc) {
1734 case ICMD_IF_ACMPEQ:
1735 emit_bnez(cd, iptr->dst.block, REG_ITMP1);
1737 case ICMD_IF_ACMPNE:
1738 emit_beqz(cd, iptr->dst.block, REG_ITMP1);
1742 # error Unable to generate code for this configuration!
1746 case ICMD_IF_ICMPEQ: /* ..., value, value ==> ... */
1747 case ICMD_IF_ICMPNE: /* op1 = target JavaVM pc */
1749 #if SUPPORT_BRANCH_CONDITIONAL_TWO_INTEGER_REGISTERS
1750 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1751 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1752 switch (iptr->opc) {
1753 case ICMD_IF_ICMPEQ:
1754 emit_beq(cd, iptr->dst.block, s1, s2);
1756 case ICMD_IF_ICMPNE:
1757 emit_bne(cd, iptr->dst.block, s1, s2);
1765 case ICMD_IF_ICMPLT: /* ..., value, value ==> ... */
1766 case ICMD_IF_ICMPGT: /* op1 = target JavaVM pc */
1767 case ICMD_IF_ICMPLE:
1768 case ICMD_IF_ICMPGE:
1770 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
1771 s2 = emit_load_s2(jd, iptr, REG_ITMP2);
1772 #if SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1773 # if defined(__I386__) || defined(__M68K__) || defined(__X86_64__)
1774 // XXX Fix this soon!!!
1779 emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_ICMPEQ, BRANCH_OPT_NONE);
1780 #elif SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1781 // Generate architecture specific instructions.
1782 codegen_emit_instruction(jd, iptr);
1784 # error Unable to generate code for this configuration!
1788 case ICMD_IF_LCMPEQ: /* ..., value, value ==> ... */
1789 case ICMD_IF_LCMPNE: /* op1 = target JavaVM pc */
1790 case ICMD_IF_LCMPLT:
1791 case ICMD_IF_LCMPGT:
1792 case ICMD_IF_LCMPLE:
1793 case ICMD_IF_LCMPGE:
1795 // Generate architecture specific instructions.
1796 codegen_emit_instruction(jd, iptr);
1799 case ICMD_RETURN: /* ... ==> ... */
1801 REPLACEMENT_POINT_RETURN(cd, iptr);
1802 goto nowperformreturn;
1804 case ICMD_ARETURN: /* ..., retvalue ==> ... */
1806 REPLACEMENT_POINT_RETURN(cd, iptr);
1807 s1 = emit_load_s1(jd, iptr, REG_RESULT);
1808 // XXX M68K: This should actually be M_ADR2INTMOVE(s1, REG_RESULT);
1809 // XXX Sparc64: Here this should be REG_RESULT_CALLEE!
1810 emit_imove(cd, s1, REG_RESULT);
1812 #ifdef ENABLE_VERIFIER
1813 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1815 unresolved_class *uc = iptr->sx.s23.s2.uc;
1816 patcher_add_patch_ref(jd, PATCHER_resolve_class, uc, 0);
1817 PROFILE_CYCLE_START;
1819 #endif /* ENABLE_VERIFIER */
1820 goto nowperformreturn;
1822 case ICMD_IRETURN: /* ..., retvalue ==> ... */
1824 REPLACEMENT_POINT_RETURN(cd, iptr);
1825 s1 = emit_load_s1(jd, iptr, REG_RESULT);
1826 // XXX Sparc64: Here this should be REG_RESULT_CALLEE!
1827 emit_imove(cd, s1, REG_RESULT);
1828 goto nowperformreturn;
1830 case ICMD_LRETURN: /* ..., retvalue ==> ... */
1832 REPLACEMENT_POINT_RETURN(cd, iptr);
1833 s1 = emit_load_s1(jd, iptr, REG_LRESULT);
1834 // XXX Sparc64: Here this should be REG_RESULT_CALLEE!
1835 emit_lmove(cd, s1, REG_LRESULT);
1836 goto nowperformreturn;
1838 case ICMD_FRETURN: /* ..., retvalue ==> ... */
1840 REPLACEMENT_POINT_RETURN(cd, iptr);
1841 s1 = emit_load_s1(jd, iptr, REG_FRESULT);
1842 // XXX ARM: Here this was M_CAST_F2I(s1, REG_RESULT);
1843 emit_fmove(cd, s1, REG_FRESULT);
1844 goto nowperformreturn;
1846 case ICMD_DRETURN: /* ..., retvalue ==> ... */
1848 REPLACEMENT_POINT_RETURN(cd, iptr);
1849 s1 = emit_load_s1(jd, iptr, REG_FRESULT);
1850 // XXX ARM: Here this was M_CAST_D2L(s1, REG_RESULT_PACKED);
1851 emit_dmove(cd, s1, REG_FRESULT);
1852 goto nowperformreturn;
1855 #if !defined(NDEBUG)
1856 // Call trace function.
1857 if (JITDATA_HAS_FLAG_VERBOSECALL(jd))
1858 emit_verbosecall_exit(jd);
1861 #if defined(ENABLE_THREADS)
1862 // Emit code to call monitorexit function.
1863 if (checksync && code_is_synchronized(code)) {
1864 emit_monitor_exit(jd, rd->memuse * 8);
1868 // Generate method profiling code.
1871 // Emit code for the method epilog.
1872 codegen_emit_epilog(jd);
1876 case ICMD_BUILTIN: /* ..., [arg1, [arg2 ...]] ==> ... */
1878 REPLACEMENT_POINT_FORGC_BUILTIN(cd, iptr);
1880 bte = iptr->sx.s23.s3.bte;
1883 #if defined(ENABLE_ESCAPE_REASON) && defined(__I386__)
1884 if (bte->fp == BUILTIN_escape_reason_new) {
1885 void set_escape_reasons(void *);
1886 M_ASUB_IMM(8, REG_SP);
1887 M_MOV_IMM(iptr->escape_reasons, REG_ITMP1);
1888 M_AST(EDX, REG_SP, 4);
1889 M_AST(REG_ITMP1, REG_SP, 0);
1890 M_MOV_IMM(set_escape_reasons, REG_ITMP1);
1892 M_ALD(EDX, REG_SP, 4);
1893 M_AADD_IMM(8, REG_SP);
1897 // Emit the fast-path if available.
1898 if (bte->emit_fastpath != NULL) {
1899 void (*emit_fastpath)(jitdata* jd, instruction* iptr, int d);
1900 emit_fastpath = (void (*)(jitdata* jd, instruction* iptr, int d)) bte->emit_fastpath;
1902 assert(md->returntype.type == TYPE_VOID);
1905 // Actually call the fast-path emitter.
1906 emit_fastpath(jd, iptr, d);
1908 // If fast-path succeeded, jump to the end of the builtin
1910 // XXX Actually the slow-path block below should be moved
1911 // out of the instruction stream and the jump below should be
1913 #if SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
1914 os::abort("codegen_emit: Implement jump over slow-path for this configuration.");
1915 #elif SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
1917 emit_label_bne(cd, BRANCH_LABEL_10);
1919 # error Unable to generate code for this configuration!
1925 case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ... */
1926 case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
1927 case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer */
1928 case ICMD_INVOKEINTERFACE:
1930 REPLACEMENT_POINT_INVOKE(cd, iptr);
1932 if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
1933 unresolved_method* um = iptr->sx.s23.s3.um;
1934 md = um->methodref->parseddesc.md;
1937 methodinfo* lm = iptr->sx.s23.s3.fmiref->p.method;
1938 md = lm->parseddesc;
1944 // XXX Check this again!
1945 MCODECHECK((i << 1) + 64); // PPC
1947 // Copy arguments to registers or stack location.
1948 for (i = i - 1; i >= 0; i--) {
1949 var = VAR(iptr->sx.s23.s2.args[i]);
1950 d = md->params[i].regoff;
1952 // Already pre-allocated?
1953 if (var->flags & PREALLOC)
1956 if (!md->params[i].inmemory) {
1957 assert(ARG_CNT > 0);
1958 s1 = emit_load(jd, iptr, var, d);
1960 switch (var->type) {
1963 assert(INT_ARG_CNT > 0);
1964 emit_imove(cd, s1, d);
1967 #if 0 //XXX For ARM:
1968 if (!md->params[s3].inmemory) {
1969 s1 = emit_load(jd, iptr, var, REG_FTMP1);
1970 if (IS_2_WORD_TYPE(var->type))
1975 #endif //XXX End of ARM!
1978 emit_lmove(cd, s1, d);
1982 emit_fmove(cd, s1, d);
1986 emit_dmove(cd, s1, d);
1991 switch (var->type) {
1993 s1 = emit_load(jd, iptr, var, REG_ITMP1);
1994 // XXX M68K: This should actually be like this:
1995 // s1 = emit_load(jd, iptr, var, REG_ATMP1);
1996 // XXX Sparc64: Here this actually was:
1997 // M_STX(s1, REG_SP, JITSTACK + d);
1998 M_AST(s1, REG_SP, d);
2002 #if SIZEOF_VOID_P == 4
2003 s1 = emit_load(jd, iptr, var, REG_ITMP1);
2004 M_IST(s1, REG_SP, d);
2011 s1 = emit_load(jd, iptr, var, REG_LTMP12);
2012 // XXX Sparc64: Here this actually was:
2013 // M_STX(s1, REG_SP, JITSTACK + d);
2014 M_LST(s1, REG_SP, d);
2018 #if SIZEOF_VOID_P == 4
2019 s1 = emit_load(jd, iptr, var, REG_FTMP1);
2020 M_FST(s1, REG_SP, d);
2027 s1 = emit_load(jd, iptr, var, REG_FTMP1);
2028 // XXX Sparc64: Here this actually was:
2029 // M_DST(s1, REG_SP, JITSTACK + d);
2030 M_DST(s1, REG_SP, d);
2036 // Generate method profiling code.
2039 // Generate architecture specific instructions.
2040 codegen_emit_instruction(jd, iptr);
2042 // Generate method profiling code.
2043 PROFILE_CYCLE_START;
2045 // Store size of call code in replacement point.
2046 REPLACEMENT_POINT_INVOKE_RETURN(cd, iptr);
2047 REPLACEMENT_POINT_FORGC_BUILTIN_RETURN(cd, iptr);
2049 // Recompute the procedure vector (PV).
2050 emit_recompute_pv(cd);
2052 // Store return value.
2053 #if defined(ENABLE_SSA)
2054 if ((ls == NULL) /* || (!IS_TEMPVAR_INDEX(iptr->dst.varindex)) */ ||
2055 (ls->lifetime[iptr->dst.varindex].type != UNUSED))
2056 /* a "living" stackslot */
2058 switch (md->returntype.type) {
2061 s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT);
2062 // XXX Sparc64: This should actually be REG_RESULT_CALLER, fix this!
2063 emit_imove(cd, REG_RESULT, s1);
2064 emit_store_dst(jd, iptr, s1);
2068 s1 = codegen_reg_of_dst(jd, iptr, REG_LRESULT);
2069 // XXX Sparc64: This should actually be REG_RESULT_CALLER, fix this!
2070 emit_lmove(cd, REG_LRESULT, s1);
2071 emit_store_dst(jd, iptr, s1);
2074 #if 0 //XXX For ARM!!!
2075 #if !defined(ENABLE_SOFTFLOAT)
2077 s1 = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
2078 if (IS_2_WORD_TYPE(d))
2079 M_CAST_L2D(REG_RESULT_PACKED, s1);
2081 M_CAST_I2F(REG_RESULT, s1);
2083 #endif /* !defined(ENABLE_SOFTFLOAT) */
2084 #endif //XXX End of ARM
2087 s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
2088 emit_fmove(cd, REG_FRESULT, s1);
2089 emit_store_dst(jd, iptr, s1);
2093 s1 = codegen_reg_of_dst(jd, iptr, REG_FRESULT);
2094 emit_dmove(cd, REG_FRESULT, s1);
2095 emit_store_dst(jd, iptr, s1);
2102 // If we are emitting a fast-path block, this is the label for
2103 // successful fast-path execution.
2104 if ((iptr->opc == ICMD_BUILTIN) && (bte->emit_fastpath != NULL)) {
2105 emit_label(cd, BRANCH_LABEL_10);
2110 case ICMD_TABLESWITCH: /* ..., index ==> ... */
2112 // Generate architecture specific instructions.
2113 codegen_emit_instruction(jd, iptr);
2116 case ICMD_LOOKUPSWITCH: /* ..., key ==> ... */
2118 s1 = emit_load_s1(jd, iptr, REG_ITMP1);
2119 i = iptr->sx.s23.s2.lookupcount;
2121 // XXX Again we need to check this
2122 MCODECHECK((i<<2)+8); // Alpha, ARM, i386, MIPS, M68K, Sparc64
2123 MCODECHECK((i<<3)+8); // PPC64
2124 MCODECHECK(8 + ((7 + 6) * i) + 5); // X86_64, S390
2127 for (lookup_target_t* lookup = iptr->dst.lookup; i > 0; ++lookup, --i) {
2128 #if SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER
2129 emit_icmp_imm(cd, s1, lookup->value);
2130 emit_beq(cd, lookup->target.block);
2131 #elif SUPPORT_BRANCH_CONDITIONAL_TWO_INTEGER_REGISTERS
2132 ICONST(REG_ITMP2, lookup->value);
2133 emit_beq(cd, lookup->target.block, s1, REG_ITMP2);
2134 #elif SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER
2135 emit_icmpeq_imm(cd, s1, lookup->value, REG_ITMP2);
2136 emit_bnez(cd, lookup->target.block, REG_ITMP2);
2138 # error Unable to generate code for this configuration!
2143 emit_br(cd, iptr->sx.s23.s3.lookupdefault.block);
2147 case ICMD_CHECKCAST: /* ..., objectref ==> ..., objectref */
2148 case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult */
2149 case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref */
2151 // Generate architecture specific instructions.
2152 codegen_emit_instruction(jd, iptr);
2156 exceptions_throw_internalerror("Unknown ICMD %d during code generation",
2162 } // for all instructions
2164 #if defined(ENABLE_SSA)
2165 // By edge splitting, in blocks with phi moves there can only
2166 // be a goto as last command, no other jump/branch command.
2168 if (!last_cmd_was_goto)
2169 codegen_emit_phi_moves(jd, bptr);
2173 #if defined(__I386__) || defined(__M68K__) || defined(__MIPS__) || defined(__S390__) || defined(__SPARC_64__) || defined(__X86_64__)
2175 /* XXX require a lower number? */
2176 MCODECHECK(64); // I386, MIPS, Sparc64
2177 MCODECHECK(512); // S390, X86_64
2179 /* XXX We can remove that when we don't use UD2 anymore on i386
2182 /* At the end of a basic block we may have to append some nops,
2183 because the patcher stub calling code might be longer than the
2184 actual instruction. So codepatching does not change the
2185 following block unintentionally. */
2187 if (cd->mcodeptr < cd->lastmcodeptr) {
2188 while (cd->mcodeptr < cd->lastmcodeptr) {
2194 } // for all basic blocks
2197 emit_patcher_traps(jd);
2204 /* codegen_emit_phi_moves ****************************************************
2206 Emits phi moves at the end of the basicblock.
2208 *******************************************************************************/
2210 #if defined(ENABLE_SSA)
2211 void codegen_emit_phi_moves(jitdata *jd, basicblock *bptr)
2224 /* Moves from phi functions with highest indices have to be */
2225 /* inserted first, since this is the order as is used for */
2226 /* conflict resolution */
2228 for(i = ls->num_phi_moves[bptr->nr] - 1; i >= 0 ; i--) {
2229 lt_d = ls->phi_moves[bptr->nr][i][0];
2230 lt_s = ls->phi_moves[bptr->nr][i][1];
2231 #if defined(SSA_DEBUG_VERBOSE)
2233 printf("BB %3i Move %3i <- %3i ", bptr->nr, lt_d, lt_s);
2235 if (lt_s == UNUSED) {
2236 #if defined(SSA_DEBUG_VERBOSE)
2238 printf(" ... not processed \n");
2243 d = VAR(ls->lifetime[lt_d].v_index);
2244 s = VAR(ls->lifetime[lt_s].v_index);
2247 if (d->type == -1) {
2248 #if defined(SSA_DEBUG_VERBOSE)
2250 printf("...returning - phi lifetimes where joined\n");
2255 if (s->type == -1) {
2256 #if defined(SSA_DEBUG_VERBOSE)
2258 printf("...returning - phi lifetimes where joined\n");
2264 tmp_i.s1.varindex = ls->lifetime[lt_s].v_index;
2265 tmp_i.dst.varindex = ls->lifetime[lt_d].v_index;
2266 emit_copy(jd, &tmp_i);
2268 #if defined(SSA_DEBUG_VERBOSE)
2269 if (compileverbose) {
2270 if (IS_INMEMORY(d->flags) && IS_INMEMORY(s->flags)) {
2272 printf("M%3i <- M%3i",d->vv.regoff,s->vv.regoff);
2274 else if (IS_INMEMORY(s->flags)) {
2276 printf("R%3i <- M%3i",d->vv.regoff,s->vv.regoff);
2278 else if (IS_INMEMORY(d->flags)) {
2280 printf("M%3i <- R%3i",d->vv.regoff,s->vv.regoff);
2284 printf("R%3i <- R%3i",d->vv.regoff,s->vv.regoff);
2288 #endif /* defined(SSA_DEBUG_VERBOSE) */
2291 #endif /* defined(ENABLE_SSA) */
2294 /* REMOVEME When we have exception handling in C. */
2296 void *md_asm_codegen_get_pv_from_pc(void *ra)
2298 return md_codegen_get_pv_from_pc(ra);
2303 * These are local overrides for various environment variables in Emacs.
2304 * Please do not remove this and leave it at the end of the file, where
2305 * Emacs will automagically detect them.
2306 * ---------------------------------------------------------------------
2309 * indent-tabs-mode: t
2313 * vim:noexpandtab:sw=4:ts=4: