Uwe Hermann [Tue, 29 May 2007 12:06:06 +0000 (12:06 +0000)]
Use the common LinuxBIOS license header format.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Sven Kapferer <skapfere@rumms.uni-mannheim.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2704
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Tue, 29 May 2007 10:37:52 +0000 (10:37 +0000)]
Intel
82371EB: Add IDE init support.
In a mainboard's Config.lb file you can configure whether the primary
and/or secondary IDE interfaces shall be enabled.
Also, various fixups in the rest of the southbridge code, most notably
the early SMBus code, plus some documentation improvements.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Corey Osgood <corey_osgood@verizon.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2703
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Mon, 28 May 2007 14:37:06 +0000 (14:37 +0000)]
Lower the RAM init delays we use on the Intel 440BX.
As per JEDEC, we should wait 200us until voltages and clocks are stable.
Then apply NOPs for 200 clock cycles (for simplicity we use 200us here).
All other delays are so low that we get away with just waiting 1us.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2702
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sun, 27 May 2007 23:31:31 +0000 (23:31 +0000)]
Various 440BX and Tyan S1846 related minor changes and fixes (trivial):
- Only check the RAM from 0 - 640 KB and 768 KB - 1 MB now. That's
available on all boards, regardless of what DIMMs you use.
Tested on the Tyan S1846, works fine.
- Properly set the PAM registers to allow the region from 768 KB - 1 MB
to be used as normal RAM (required for the above).
- Document all of this properly. Add/improve other documentation, too.
- Simplify and document code in northbridge.c.
- Cosmetics and coding style.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2701
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sun, 27 May 2007 21:43:58 +0000 (21:43 +0000)]
Init for the Intel
82371EB southbridge: make all ROM/BIOS regions
accessible (but not writable), so that reading/loading a payload
from that area can work (for instance).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2700
2b7e53f0-3cfb-0310-b3e9-
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Sven Kapferer [Sat, 26 May 2007 13:56:34 +0000 (13:56 +0000)]
This patch fixes the processor name string for Rev F. CPUs.
It moves the complete naming functionality to
src/cpu/amd/model_fxx/processor_name.c.
The current code sets the processor name string twice for Rev. F CPUs.
In src/cpu/amd/model_fxx/model_fxx_init.c the function
amd_set_name_string_f is called first. Several lines later
init_processor_name is called which doesn't recognize newer CPUs and
actually programs incorrect values, thus overwriting the previously set
CPU name. For example, this resulted in identifying an Opteron 2218 as a
Turion processor.
This patch removes the amd_set_name_string_f function from
src/cpu/amd/model_fxx/model_fxx_init.c and adds support for Rev. F CPUs
to src/cpu/amd/model_fxx/processor_name.c as described in the Revision
Guide for AMD NPT Family 0Fh Processors, AMD Document ID 33610 Rev 3.00,
October 2006.
Signed-off-by: Sven Kapferer <skapfere@rumms.uni-mannheim.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2699
2b7e53f0-3cfb-0310-b3e9-
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Philipp Degler [Thu, 24 May 2007 20:39:48 +0000 (20:39 +0000)]
Add initial support for the ASUS A8N-E board.
Signed-off-by: Philipp Degler <pdegler@rumms.uni-mannheim.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2698
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 24 May 2007 19:46:32 +0000 (19:46 +0000)]
Drop the src/southbridge/amd/cs5536_lx directory and its contents, as
the new src/southbridge/amd/cs5536 code completely replaces it.
The Artecgroup dbe61 board currently uses it, but that is broken anyway
at the moment. A fix to use the new CS5536 code for it is being worked on.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2697
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 24 May 2007 19:17:29 +0000 (19:17 +0000)]
Minor cosmetics (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2696
2b7e53f0-3cfb-0310-b3e9-
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Philipp Degler [Thu, 24 May 2007 18:44:50 +0000 (18:44 +0000)]
Various IT8712F fixes:
- Add missing IT8712F_GPIO definition.
- Add functions for entering and exiting MB PnP mode.
- Add some more device init lines to pnp_dev_info[].
Signed-off-by: Philipp Degler <pdegler@rumms.uni-mannheim.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2695
2b7e53f0-3cfb-0310-b3e9-
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Philipp Degler [Thu, 24 May 2007 13:55:45 +0000 (13:55 +0000)]
Small patch that adds an error message in case the keyboard selftest fails.
Signed-off-by: Philipp Degler <pdegler@rumms.uni-mannheim.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2694
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 24 May 2007 09:26:39 +0000 (09:26 +0000)]
drop leftover includes (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2693
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 24 May 2007 09:08:36 +0000 (09:08 +0000)]
some copyright analysis
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2692
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 24 May 2007 08:48:10 +0000 (08:48 +0000)]
factor out register mapping code (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2691
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 23 May 2007 18:24:58 +0000 (18:24 +0000)]
Unify mmap error messages in flashrom (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2690
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Wed, 23 May 2007 17:20:56 +0000 (17:20 +0000)]
big cosmetic offensive on flashrom. (trivial)
* Give decent names to virt_addr and virt_addr_2
* add some comments
* move virtual addresses to the end of the struct,
so they dont mess up the initializer.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2689
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Tue, 22 May 2007 15:04:28 +0000 (15:04 +0000)]
reverting 2683, NAK by YhLu, patch not necessary.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2688
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Tue, 22 May 2007 10:12:49 +0000 (10:12 +0000)]
Add missing license headers, minor cosmetic fixes in existing headers.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2687
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Mon, 21 May 2007 21:39:08 +0000 (21:39 +0000)]
Add support for the Winbond W39V040FA chip.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2686
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Mon, 21 May 2007 21:36:03 +0000 (21:36 +0000)]
Drop the (non-working, almost non-existant) support for
- the Transmeta TM5800 northbridge
- the Densitron DPX114 mainboard (the only one using the TM5800)
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2685
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Mon, 21 May 2007 21:33:24 +0000 (21:33 +0000)]
Drop romcc related stuff, as this board only uses CAR.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2684
2b7e53f0-3cfb-0310-b3e9-
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Ward Vandewege [Mon, 21 May 2007 20:50:48 +0000 (20:50 +0000)]
The Gigabyte m57sli-s4 board supports Rev. F CPUs.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2683
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Mon, 21 May 2007 18:38:29 +0000 (18:38 +0000)]
fix some typos, clarify comments and drop dead code (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2682
2b7e53f0-3cfb-0310-b3e9-
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Yinghai Lu [Mon, 21 May 2007 18:11:17 +0000 (18:11 +0000)]
This is the last remainder from Yinghai's mega patch. It fixes issues with
devices conflicting with the northbridge devices on PCI bus 0.
Signed-off-by: Yinghai Lu <yinghailu@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2681
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Sun, 20 May 2007 17:28:55 +0000 (17:28 +0000)]
fix lbtdump after last checkin. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2680
2b7e53f0-3cfb-0310-b3e9-
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Ben Hewson [Sun, 20 May 2007 17:10:17 +0000 (17:10 +0000)]
Here is a small fix to prevent a segmentation fault in lbtdump.
The format specifier in the printf statements have been changed from
%08lx to %08llx or similar where uint64_t are being displayed.
Signed-off-by: Ben Hewson <ben@hewson-venieri.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2679
2b7e53f0-3cfb-0310-b3e9-
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Jeremy Jackson [Sun, 20 May 2007 16:36:01 +0000 (16:36 +0000)]
Add additional CPU device ID:
CPU: vendor AMD device
30ff2
CPU: family 0f, model 3f, stepping 02
All I know is this makes it boot when it didn't before, YMMV.
Signed-off-by: Jeremy Jackson <jerj@coplanar.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2678
2b7e53f0-3cfb-0310-b3e9-
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Luc Verhaegen [Sun, 20 May 2007 16:16:13 +0000 (16:16 +0000)]
Flashrom: add support for ASUS P5A (Socket 7, ALi based).
* Add support for the ALi M1533 to chipset_enable.c
* Add some SMBus poking needed for the ASUS P5A, to board_enable.c
Since PCI subsystem IDs are worthless with this board, people will
have to name the board directly.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2677
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sat, 19 May 2007 19:22:55 +0000 (19:22 +0000)]
Fix typos (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2676
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sat, 19 May 2007 17:28:40 +0000 (17:28 +0000)]
Minor cosmetics (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2675
2b7e53f0-3cfb-0310-b3e9-
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Ward Vandewege [Sat, 19 May 2007 16:07:08 +0000 (16:07 +0000)]
Initialize the fans on the adt7463 chip to be dynamically regulated by the
hardware, rather than always on at full speed. Set temperature treshold values
to safe defaults, rather than the not-so-safe power-on defaults.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Yinghai Lu <yinghailu@gmail.com>
Acked-by: Ward Vandewege <ward@gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2674
2b7e53f0-3cfb-0310-b3e9-
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Luis Correia [Thu, 17 May 2007 16:00:30 +0000 (16:00 +0000)]
Add missing license header (closes #53).
Signed-off-by: Luis Correia <luis.f.correia@gmail.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2673
2b7e53f0-3cfb-0310-b3e9-
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Corey Osgood [Thu, 17 May 2007 11:20:18 +0000 (11:20 +0000)]
Whitespace fixes (trivial).
Signed-off-by: Corey Osgood <corey_osgood@verizon.net>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2672
2b7e53f0-3cfb-0310-b3e9-
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Roger Zauner [Wed, 16 May 2007 06:58:15 +0000 (06:58 +0000)]
Cosmetic changes: push includes to top of file in chip.h files.
Signed-off-by: Roger Zauner <roger@eskimo.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2671
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Tue, 15 May 2007 10:26:16 +0000 (10:26 +0000)]
Simplify spd_read_byte() functions (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2670
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Tue, 15 May 2007 07:11:09 +0000 (07:11 +0000)]
Various cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2669
2b7e53f0-3cfb-0310-b3e9-
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Luis Correia [Tue, 15 May 2007 06:57:57 +0000 (06:57 +0000)]
IEI NOVA-4899R: Add missing license headers.
Signed-off-by: Luis Correia <luis.f.correia@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2668
2b7e53f0-3cfb-0310-b3e9-
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Luis Correia [Tue, 15 May 2007 06:56:12 +0000 (06:56 +0000)]
IEI NOVA-4899R: Correctly configure Super I/O PNP devices.
Signed-off-by: Luis Correia <luis.f.correia@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2667
2b7e53f0-3cfb-0310-b3e9-
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Luis Correia [Tue, 15 May 2007 06:55:03 +0000 (06:55 +0000)]
IEI NOVA-4899R: Fix incorrect irq_tables.c.
Signed-off-by: Luis Correia <luis.f.correia@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2666
2b7e53f0-3cfb-0310-b3e9-
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Luis Correia [Tue, 15 May 2007 06:50:06 +0000 (06:50 +0000)]
IEI NOVA-4899R: Drop unused files.
Signed-off-by: Luis Correia <luis.f.correia@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2665
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Mon, 14 May 2007 11:33:41 +0000 (11:33 +0000)]
AMD Norwich: minor cosmetic fixes and drop dead code (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2664
2b7e53f0-3cfb-0310-b3e9-
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Ward Vandewege [Fri, 11 May 2007 19:23:57 +0000 (19:23 +0000)]
Clean up whitespace in preparation for another patch to fix fan control.
This is nothing more than the result of running
indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs adm1027.c
Signed-off-by: Ward Vandewege <ward@gnu.org>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2663
2b7e53f0-3cfb-0310-b3e9-
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Roger Zauner [Fri, 11 May 2007 11:17:58 +0000 (11:17 +0000)]
The Super I/O needs 0x87 sent twice to 0x2e (or 0x4e) to enable extended
function (power-on strapping). Although this is already done in superio.c,
it's not being done when w83627thf_early_serial.c is executed.
As such, no console_init() without it.
Signed-off-by: Roger Zauner <roger@eskimo.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2662
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 10 May 2007 23:59:20 +0000 (23:59 +0000)]
Fixup the 440BX northbridge.c (self-ack as this wasn't working anyway).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2661
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Thu, 10 May 2007 23:53:11 +0000 (23:53 +0000)]
This fix properly hides the UDC and OTG PCI headers when the cs5536 is
setup as the host on USB port4. In client mode the headers remain
available. Also fixes an outb to 0x80 to use the post_code() function.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2660
2b7e53f0-3cfb-0310-b3e9-
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Peter Stuge [Thu, 10 May 2007 23:50:27 +0000 (23:50 +0000)]
Changes by Richard Smith and Peter Stuge from the LinuxBIOS symposium 2006.
With CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=0, 1 million outb():s are used
for timer calibration, which takes about one second.
All EPIA-M boards have timer2 so we use it to boot faster.
Only some EPIA boards have the Nehemiah CPU with timer2 so we default to IO
calibration but add the TSC options so that they can be set in Config.lb.
src/mainboard/via/epia*/reset.c is dead code (entire file within #if 0) so we
set HAVE_HARD_RESET=0 for both boards.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2659
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Marc Jones [Thu, 10 May 2007 23:22:27 +0000 (23:22 +0000)]
This patch cleans up and clarifies Geode source code comments.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2658
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Marc Jones [Thu, 10 May 2007 23:13:18 +0000 (23:13 +0000)]
This patch cleans up \r left in the print strings. They were required for romcc code but no longer needed in cache as ram code.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2657
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Marc Jones [Thu, 10 May 2007 23:12:18 +0000 (23:12 +0000)]
This patch updates the PCI ID of the Geode IDE device to include the revision.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2656
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Ceri Coburn [Thu, 10 May 2007 22:46:17 +0000 (22:46 +0000)]
Fixed a bug within the 440BX RAM size calculation. Since the DRB values
on the 440BX are 8 MB units we need to shift left by 13 to get it into KB.
Signed-off-by: Ceri Coburn <ceri.coburn@gmail.com>
Signed-off-by: Roger Zauner <roger@eskimo.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2655
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Thu, 10 May 2007 22:21:13 +0000 (22:21 +0000)]
indent is by no means as harmless as one might think ;-)
trivial fix.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2654
2b7e53f0-3cfb-0310-b3e9-
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Alex Mauer [Thu, 10 May 2007 19:02:19 +0000 (19:02 +0000)]
The attached patch sets the MA map type correctly for all DIMMs I was
able to find to test with the Epia.
Signed-off-by: Alex Mauer <hawke@hawkesnest.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2653
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Marc Jones [Thu, 10 May 2007 18:49:58 +0000 (18:49 +0000)]
This patch removes auto.c from the Norwich mainboard directory.
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Signed-off-by: Marc Jones <marc.jones@amd.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2652
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Thu, 10 May 2007 18:43:57 +0000 (18:43 +0000)]
Fix the indent and whitespace to match LinuxBIOS standards
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2651
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Jordan Crouse [Thu, 10 May 2007 18:32:28 +0000 (18:32 +0000)]
Fix the indent and whitespace to match LinuxBIOS standards
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2650
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Jordan Crouse [Thu, 10 May 2007 18:16:03 +0000 (18:16 +0000)]
Fix the indent and whitespace to match LinuxBIOS standards
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2649
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Jordan Crouse [Thu, 10 May 2007 18:00:24 +0000 (18:00 +0000)]
Fix the indent and whitespace to match LinuxBIOS standards
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2648
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Jordan Crouse [Thu, 10 May 2007 17:58:11 +0000 (17:58 +0000)]
Add missing licenses to several of the files.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2647
2b7e53f0-3cfb-0310-b3e9-
8179ed1497e1
Jordan Crouse [Thu, 10 May 2007 17:57:03 +0000 (17:57 +0000)]
Add missing licenses to several of the files.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2646
2b7e53f0-3cfb-0310-b3e9-
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Roger Zauner [Wed, 9 May 2007 17:54:25 +0000 (17:54 +0000)]
The superio needs 0x87 sent twice to 0x3f0 to enable extended function
(power-on strapping). Although this is already done in superio.c, it's
not being done when w83977tf_early_serial.c is executed. As such, no
console_init() without it.
Signed-off-by: Roger Zauner <roger@eskimo.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2645
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Wed, 9 May 2007 15:11:03 +0000 (15:11 +0000)]
Uncomment compression config variables. This should fix the abuild
problems with the asi/mb_5bmlp (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2644
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Wed, 9 May 2007 10:17:44 +0000 (10:17 +0000)]
Fix coding style of flashrom by running indent on all files:
indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch]
Some minor fixups were required, and maybe a few more cosmetic
changeѕ are needed.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2643
2b7e53f0-3cfb-0310-b3e9-
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Corey Osgood [Wed, 9 May 2007 08:11:52 +0000 (08:11 +0000)]
This patch uses auto.c from Uwe's tyan s1846 for both boards, with some
minor changes, to bring them up to par. It also should remove (but might
just clean out) the irq_tables.c from both boards, because they were
just copied from Via Epia to begin with, and weren't usable. As far as I
can tell, these are the only changes needed to the targets for now,
aside from fixups to reset.c when the time comes. Both have been build
tested, but not checked on hardware since I don't have it. I have left
Uwe as the copyright holder since the only changes I've made are trivial.
Signed-off-by: Corey Osgood <corey_osgood@verizon.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2642
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Wed, 9 May 2007 07:52:14 +0000 (07:52 +0000)]
Add initial support for the ASI/BCom MB-5BLMP mainboard, as used in
the IGEL Winnet III thin client.
It boots a Linux kernel, but there are some problems. The login
prompt is never reached, it simply hangs at some point.
One possible reason is the IRQ table, which needs fixing.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2641
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Tue, 8 May 2007 16:04:36 +0000 (16:04 +0000)]
New irq table, and a correct setting for
the 5c register in the southbridge so that interrupts are routed
correctly.
With this patch, ethernet works quite well.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2640
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Mon, 7 May 2007 22:26:46 +0000 (22:26 +0000)]
Add missing licenses to several of the files.
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2639
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Sat, 5 May 2007 03:54:13 +0000 (03:54 +0000)]
This is the final patch to enable the msm800sev to build. This patch
adds a symbol to the model_lx/cache_as_ram.inc, and modifies some
files in the mainboard directory. This patch has been tested but there
is a remaining problem which I am tracking down. Expect one more patch
to "get it all working".
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2638
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Sat, 5 May 2007 00:10:31 +0000 (00:10 +0000)]
With this patch, the msm800sev runs FILO and boots a kernel.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
-This line, and those below, will be ignored--
M cs5536.c
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2637
2b7e53f0-3cfb-0310-b3e9-
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Ronald G. Minnich [Fri, 4 May 2007 23:15:28 +0000 (23:15 +0000)]
This patch as a cache_as_ram_auto.c for the msm800sev.
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2636
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Fri, 4 May 2007 21:52:18 +0000 (21:52 +0000)]
Drop src/mainboard/amd/norwich/debug.c as it is not used.
I'm self-acking as this is pretty trivial. I tested both a normal build
and an abuild-run, and nothing breaks.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2635
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Fri, 4 May 2007 21:33:40 +0000 (21:33 +0000)]
Some minor fixes in it8716f/superio.c:
- Add Ward Vandewege <ward@gnu.org> as copyright holder.
- Use explicit 'uint16_t' instead of 'unsigned long'.
- Minor cosmetics.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2634
2b7e53f0-3cfb-0310-b3e9-
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Ben Hewson [Fri, 4 May 2007 19:43:57 +0000 (19:43 +0000)]
patch to fix the IDE configuration on EPIA boards. At some point this
broke and stopped FILO
from being able to boot.
The fix is a simple one line change plus a comment to
src/mainboard/via/epia/auto.c to write to the IDE
configuration register 0x42 . This has always been done here, however
at some point
something broke it.
The same register was also being set correctly in ide_init(), however
for some reason
this does not work. Possibly the register needs to be set before the IDE
peripheral is enabled
or maybe it is a timing issue.
The section of code in ide_init() (
src/southbridge/via/vt8231/vt8231_ide.c ) that does
write to register 0x42 has been commented out as it is superfluous
and I have added a comment to indicate the reason, should someone at a
future date wonder
why.
I have also changed the default COM speed from 19200 to 115200 in
src/mainboard/via/epia/Options.lb
There has been mention before about the EPIA board not being able to use
115200 but I have seen
no such problems with my board.
Signed-off-by: Ben Hewson <ben@hewson-venieri.com>
This patch worked for me and allowed me to boot Debian kernel
2.5.16-4-486 on an epia 800 mhz system. It is able to consistently get
through the initialization and start init now.
However, after that it crashes at various points in the boot process.
Acked-by: Alex Mauer <hawke@hawkesnest.net>
Note from comitter: I am commiting this, although:
1. it's not the exact right way to fix it up, the chip.h for the sb
should change
2. Alex reports problems, which are almost certainly memory issues.
But it is as close as we've gotten. I can't test it.
Ron Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2633
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Fri, 4 May 2007 19:09:01 +0000 (19:09 +0000)]
This repairs the other Geode mainboards so they'll build with the new
Geode changes.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2632
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Fri, 4 May 2007 19:05:36 +0000 (19:05 +0000)]
This patch re-implements support for the CS5536 companion chip for the
AMD GX and LX processors. This aguments the previous code, which was
very specific to the OLPC platform with general purpose support and
better integration with the VSA and CPUs.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2631
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Fri, 4 May 2007 18:58:42 +0000 (18:58 +0000)]
This patch adds support for the northbridge integrated into the AMD
Geode LX platform, including memory and graphics. (rediffed for whitespace)
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2630
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Fri, 4 May 2007 18:47:52 +0000 (18:47 +0000)]
This patch adds support for the AMD Norwich development platform
based on the Geode LX processor. The Norwich is the canonical
Geode reference, and will server as a good basis for other
Geode based platforms.
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2629
2b7e53f0-3cfb-0310-b3e9-
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Marc Jones [Fri, 4 May 2007 18:24:55 +0000 (18:24 +0000)]
This patch adds support for the AMD Geode LX CPU. (rediffed)
Signed-off-by: Marc Jones <marc.jones@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2628
2b7e53f0-3cfb-0310-b3e9-
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Luc Verhaegen [Fri, 4 May 2007 04:47:04 +0000 (04:47 +0000)]
Add WinBond Super IO helpers.
* These helpers severely clear up winbond superio usage.
* Removed board_iwill_dk8_htx as it can be replaced by
board_agami_aruma (Mondrian Nuessle).
* Renamed board_agami_aruma to w83627hf_gpio24_raise.
* Clarified comments in w83627hf_gpio24_raise, and added
some things from the old iwill code.
* Moved all board functions name argument to const.
(warning breaks build)
* Moved iwill entry in board_pciid_enables.
Signed-off-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2627
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Fri, 4 May 2007 00:51:17 +0000 (00:51 +0000)]
Cosmetics (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2626
2b7e53f0-3cfb-0310-b3e9-
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Jordan Crouse [Thu, 3 May 2007 21:36:51 +0000 (21:36 +0000)]
Add missing license headers to some Geode LX related files.
The following original authors agreed to the license:
- Ronald G. Minnich <rminnich@gmail.com>
- Indrek Kruusa <indrek.kruusa@artecdesign.ee>
- Stefan Reinauer <stepan@coresystems.de>
- Andrei Birjukov <andrei.birjukov@artecdesign.ee>
Signed-off-by: Jordan Crouse <jordan.crouse@amd.com>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2625
2b7e53f0-3cfb-0310-b3e9-
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Mondrian Nuessle [Thu, 3 May 2007 10:09:23 +0000 (10:09 +0000)]
Enable flashing on the IWILL DK8-HTX board by configuring the Super I/O
to set the right GPIO pins, so write protection is disabled.
Signed-off-by: Mondrian Nuessle <nuessle@uni-mannheim.de>
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2624
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Thu, 3 May 2007 08:50:37 +0000 (08:50 +0000)]
Correct the RAM checking code to _not_ check the range from 640 KB - 1 MB,
as that is not RAM but used for other stuff.
First try at PCI init added to src/mainboard/tyan/s1846/Config.lb.
Use a real payload (FILO) per default now.
Note: this cannot boot a payload, yet, but it gets a lot further now.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2623
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Mon, 30 Apr 2007 23:27:27 +0000 (23:27 +0000)]
Fix typo: s/PRINT_DEBUG_/PRINT_DEBUG/ (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2622
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sat, 28 Apr 2007 02:22:59 +0000 (02:22 +0000)]
Add initial support for the following flash chips:
- Atmel AT29C020
- STMicroelectronics M29F002B
- STMicroelectronics M29F002T
- STMicroelectronics M29F002NT
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Signed-off-by: Roger Zauner <roger@eskimo.com>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2621
2b7e53f0-3cfb-0310-b3e9-
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Ward Vandewege [Fri, 27 Apr 2007 21:24:53 +0000 (21:24 +0000)]
Add fan control support to ITE IT8716F.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2620
2b7e53f0-3cfb-0310-b3e9-
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Ward Vandewege [Thu, 26 Apr 2007 20:55:45 +0000 (20:55 +0000)]
Activate EC for access to fan speeds and temperature sensors.
Signed-off-by: Ward Vandewege <ward@gnu.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2619
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Wed, 25 Apr 2007 00:23:39 +0000 (00:23 +0000)]
Revert the image size increasing for abuild. It breaks more boards than
it fixes. It seems many of the other boards run out of space for the
payload.
Thus, this patch only increases the image size for the three boards
- tyan/s2912
- nvidia/l1_2pvv
- gigabyte/m57sli
by adding a custom Config-abuild.lb file for each of them.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2618
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Tue, 24 Apr 2007 21:54:21 +0000 (21:54 +0000)]
Increase image size for abuild. This should fix the build of these boards:
- tyan/s2912
- nvidia/l1_2pvv
- gigabyte/m57sli
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2617
2b7e53f0-3cfb-0310-b3e9-
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Stefan Reinauer [Tue, 24 Apr 2007 18:40:02 +0000 (18:40 +0000)]
trivial: fix filename in comment.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2616
2b7e53f0-3cfb-0310-b3e9-
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Uwe Hermann [Sun, 22 Apr 2007 19:08:13 +0000 (19:08 +0000)]
Add explicit license headers to all files in src/device.
For files derived from the Linux kernel we merely add a small header
which states the origin of the file and the copyright owners of the
modifications to the file.
We know all files from Linux are licensed under the GPLv2.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2615
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Uwe Hermann [Sun, 22 Apr 2007 19:03:34 +0000 (19:03 +0000)]
Use __PAYLOAD__ instead of PAYLOAD as replacement template for abuild.
Comment out code which currently doesn't compile. Needs fixing later.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2614
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Uwe Hermann [Sun, 22 Apr 2007 01:17:36 +0000 (01:17 +0000)]
Update URL for the PCI IRQ Routing Table Specification (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2613
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Uwe Hermann [Sat, 21 Apr 2007 18:17:50 +0000 (18:17 +0000)]
Make the output of getpir look a bit less crappy (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2612
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Stefan Reinauer [Sat, 14 Apr 2007 16:34:32 +0000 (16:34 +0000)]
This patch makes a some elf debugging information available at log level
debug instead of spew. (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2611
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Stefan Reinauer [Sat, 14 Apr 2007 16:32:59 +0000 (16:32 +0000)]
Exit on return code of read_layout and print error message to stderr
instead of stdout (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2610
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Yinghai Lu [Thu, 12 Apr 2007 01:23:12 +0000 (01:23 +0000)]
On behalf of AMD:
Drop AMD prototype mainboards that were for internal testing &
validation use only.
Note: These boards could never be purchased. No reasons to worry.
Questions welcome via private mail.
Signed-off-by: Yinghai Lu <yinghai.lu@amd.com>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2609
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Stefan Reinauer [Thu, 12 Apr 2007 00:47:22 +0000 (00:47 +0000)]
add uses CONFIG_COMPRESSED_PAYLOAD_* to allow building the board in
abuild with a payload. Trivial
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2608
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Peter Stuge [Thu, 12 Apr 2007 00:28:32 +0000 (00:28 +0000)]
Fix two boards broken by the large patches of late.
artecgroup/dbe61
Add CONFIG_COMPRESSED_PAYLOAD_NRV2B to Options.lb since it's used in
Config.lb.
Change default for CONFIG_PCI_ROM_RUN to 1 so VGA ROM can run.
technologic/ts5300
Removed CONFIG_CONSOLE_VGA, the embedded board has no VGA without the
development addon card anyways.
Changes to target Config.lb so it actually builds.
Signed-off-by: Peter Stuge <peter@stuge.se>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2607
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Stefan Reinauer [Thu, 12 Apr 2007 00:12:41 +0000 (00:12 +0000)]
Vendor specific patch, thus self-acked.
* going back to old board specific dsdt for agami aruma.
This is hopefully dropped again some day, but until then
here's a working solution.
* Some minor Agami specific changes.
* drop obsolete bringup workaround hyperclocking.diff
* increase image size again, x86emu wants it.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2606
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Stefan Reinauer [Wed, 11 Apr 2007 23:38:50 +0000 (23:38 +0000)]
Config file update for Agami Aruma board.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2605
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