3 // Product Version "C-2009.06"
4 // Program "Synplify Pro", Mapper "map450rc, Build 029R"
5 // Thu Oct 29 16:49:33 2009
7 // Source file index table:
8 // Object locations will have the form <file>:<line>
10 // file 1 "\/opt/synplify/fpga_c200906/lib/vhd/std.vhd "
11 // file 2 "\/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_pak.vhd "
12 // file 3 "\/opt/synplify/fpga_c200906/lib/vhd/std1164.vhd "
13 // file 4 "\/opt/synplify/fpga_c200906/lib/vhd/unsigned.vhd "
14 // file 5 "\/opt/synplify/fpga_c200906/lib/vhd/arith.vhd "
15 // file 6 "\/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_ent.vhd "
16 // file 7 "\/homes/burban/didelu/dide_16/bsp3/Designflow/src/board_driver_ent.vhd "
17 // file 8 "\/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_control_ent.vhd "
18 // file 9 "\/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_driver_ent.vhd "
19 // file 10 "\/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_arc.vhd "
20 // file 11 "\/homes/burban/didelu/dide_16/bsp3/Designflow/src/board_driver_arc.vhd "
21 // file 12 "\/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_control_arc.vhd "
22 // file 13 "\/homes/burban/didelu/dide_16/bsp3/Designflow/src/vga_driver_arc.vhd "
82 un10_column_counter_siglt6_1,
83 un10_column_counter_siglt6_3,
94 output line_counter_sig_0 ;
95 output line_counter_sig_1 ;
96 output line_counter_sig_2 ;
97 output line_counter_sig_3 ;
98 output line_counter_sig_4 ;
99 output line_counter_sig_5 ;
100 output line_counter_sig_6 ;
101 output line_counter_sig_7 ;
102 output line_counter_sig_8 ;
103 input dly_counter_1 ;
104 input dly_counter_0 ;
105 output vsync_state_2 ;
106 output vsync_state_5 ;
107 output vsync_state_3 ;
108 output vsync_state_6 ;
109 output vsync_state_4 ;
110 output vsync_state_1 ;
111 output vsync_state_0 ;
112 output hsync_state_2 ;
113 output hsync_state_4 ;
114 output hsync_state_0 ;
115 output hsync_state_5 ;
116 output hsync_state_1 ;
117 output hsync_state_3 ;
118 output hsync_state_6 ;
119 output column_counter_sig_0 ;
120 output column_counter_sig_1 ;
121 output column_counter_sig_2 ;
122 output column_counter_sig_3 ;
123 output column_counter_sig_4 ;
124 output column_counter_sig_5 ;
125 output column_counter_sig_6 ;
126 output column_counter_sig_7 ;
127 output column_counter_sig_8 ;
128 output column_counter_sig_9 ;
129 output vsync_counter_9 ;
130 output vsync_counter_8 ;
131 output vsync_counter_7 ;
132 output vsync_counter_6 ;
133 output vsync_counter_5 ;
134 output vsync_counter_4 ;
135 output vsync_counter_3 ;
136 output vsync_counter_2 ;
137 output vsync_counter_1 ;
138 output vsync_counter_0 ;
139 output hsync_counter_9 ;
140 output hsync_counter_8 ;
141 output hsync_counter_7 ;
142 output hsync_counter_6 ;
143 output hsync_counter_5 ;
144 output hsync_counter_4 ;
145 output hsync_counter_3 ;
146 output hsync_counter_2 ;
147 output hsync_counter_1 ;
148 output hsync_counter_0 ;
149 output d_set_vsync_counter ;
150 output un10_column_counter_siglt6_1 ;
151 output un10_column_counter_siglt6_3 ;
154 output h_enable_sig ;
155 output v_enable_sig ;
157 output un6_dly_counter_0_x ;
158 output d_set_hsync_counter ;
160 wire line_counter_sig_0 ;
161 wire line_counter_sig_1 ;
162 wire line_counter_sig_2 ;
163 wire line_counter_sig_3 ;
164 wire line_counter_sig_4 ;
165 wire line_counter_sig_5 ;
166 wire line_counter_sig_6 ;
167 wire line_counter_sig_7 ;
168 wire line_counter_sig_8 ;
185 wire column_counter_sig_0 ;
186 wire column_counter_sig_1 ;
187 wire column_counter_sig_2 ;
188 wire column_counter_sig_3 ;
189 wire column_counter_sig_4 ;
190 wire column_counter_sig_5 ;
191 wire column_counter_sig_6 ;
192 wire column_counter_sig_7 ;
193 wire column_counter_sig_8 ;
194 wire column_counter_sig_9 ;
195 wire vsync_counter_9 ;
196 wire vsync_counter_8 ;
197 wire vsync_counter_7 ;
198 wire vsync_counter_6 ;
199 wire vsync_counter_5 ;
200 wire vsync_counter_4 ;
201 wire vsync_counter_3 ;
202 wire vsync_counter_2 ;
203 wire vsync_counter_1 ;
204 wire vsync_counter_0 ;
205 wire hsync_counter_9 ;
206 wire hsync_counter_8 ;
207 wire hsync_counter_7 ;
208 wire hsync_counter_6 ;
209 wire hsync_counter_5 ;
210 wire hsync_counter_4 ;
211 wire hsync_counter_3 ;
212 wire hsync_counter_2 ;
213 wire hsync_counter_1 ;
214 wire hsync_counter_0 ;
215 wire d_set_vsync_counter ;
216 wire un10_column_counter_siglt6_1 ;
217 wire un10_column_counter_siglt6_3 ;
223 wire un6_dly_counter_0_x ;
224 wire d_set_hsync_counter ;
226 wire [8:0] hsync_counter_cout;
227 wire [8:0] vsync_counter_cout;
228 wire [9:1] un2_column_counter_next_combout;
229 wire [9:1] un1_line_counter_sig_combout;
230 wire [7:1] un1_line_counter_sig_cout;
231 wire [1:1] un1_line_counter_sig_a_cout;
232 wire [7:0] un2_column_counter_next_cout;
233 wire hsync_counter_next_1_sqmuxa ;
235 wire un9_hsync_counterlt9 ;
236 wire vsync_counter_next_1_sqmuxa ;
238 wire un9_vsync_counterlt9 ;
239 wire un10_column_counter_siglto9 ;
240 wire column_counter_next_0_sqmuxa_1_1 ;
241 wire vsync_state_3_iv_0_0__g0_0_a3_0 ;
242 wire vsync_state_next_2_sqmuxa ;
243 wire un12_vsync_counter_7 ;
244 wire un13_vsync_counter_4 ;
245 wire un10_line_counter_siglto8 ;
246 wire line_counter_next_0_sqmuxa_1_1 ;
247 wire v_enable_sig_1_0_0_0_g0_i_o4 ;
248 wire h_enable_sig_1_0_0_0_g0_i_o4 ;
249 wire h_sync_1_0_0_0_g1 ;
250 wire v_sync_1_0_0_0_g1 ;
251 wire un14_vsync_counter_8 ;
252 wire hsync_state_3_0_0_0__g0_0 ;
253 wire un10_hsync_counter_3 ;
254 wire un10_hsync_counter_1 ;
255 wire un10_hsync_counter_4 ;
256 wire un12_hsync_counter ;
257 wire un11_hsync_counter_2 ;
258 wire un11_hsync_counter_3 ;
259 wire un13_hsync_counter ;
260 wire vsync_state_next_1_sqmuxa_1 ;
261 wire vsync_state_next_1_sqmuxa_3 ;
262 wire un1_vsync_state_next_1_sqmuxa_0 ;
263 wire hsync_state_next_1_sqmuxa_1 ;
264 wire hsync_state_next_1_sqmuxa_2 ;
265 wire un1_hsync_state_next_1_sqmuxa_0 ;
266 wire un12_vsync_counter_6 ;
267 wire un15_vsync_counter_4 ;
268 wire vsync_state_next_1_sqmuxa_2 ;
269 wire un10_column_counter_siglt6 ;
270 wire un10_line_counter_siglto5 ;
271 wire un9_vsync_counterlt9_5 ;
272 wire un9_vsync_counterlt9_6 ;
273 wire un12_hsync_counter_3 ;
274 wire un12_hsync_counter_4 ;
275 wire un13_hsync_counter_2 ;
276 wire un13_hsync_counter_7 ;
277 wire un9_hsync_counterlt9_3 ;
278 wire un10_line_counter_siglt4_2 ;
279 wire un13_vsync_counter_3 ;
280 wire un15_vsync_counter_3 ;
281 wire un1_vsync_state_2_0 ;
282 wire un1_hsync_state_3_0 ;
285 wire line_counter_next_0_sqmuxa_1_1_i ;
286 wire column_counter_next_0_sqmuxa_1_1_i ;
287 wire un9_vsync_counterlt9_i ;
289 wire un9_hsync_counterlt9_i ;
295 stratix_lcell hsync_counter_0_ (
296 .regout(hsync_counter_0),
297 .cout(hsync_counter_cout[0]),
299 .dataa(hsync_counter_0),
301 .datac(hsync_counter_next_1_sqmuxa),
305 .sload(un9_hsync_counterlt9_i),
311 defparam hsync_counter_0_.operation_mode="arithmetic";
312 defparam hsync_counter_0_.output_mode="reg_only";
313 defparam hsync_counter_0_.lut_mask="55aa";
314 defparam hsync_counter_0_.synch_mode="on";
315 defparam hsync_counter_0_.sum_lutc_input="datac";
317 stratix_lcell hsync_counter_1_ (
318 .regout(hsync_counter_1),
319 .cout(hsync_counter_cout[1]),
321 .dataa(hsync_counter_1),
323 .datac(hsync_counter_next_1_sqmuxa),
327 .sload(un9_hsync_counterlt9_i),
329 .cin(hsync_counter_cout[0]),
334 defparam hsync_counter_1_.cin_used="true";
335 defparam hsync_counter_1_.operation_mode="arithmetic";
336 defparam hsync_counter_1_.output_mode="reg_only";
337 defparam hsync_counter_1_.lut_mask="5aa0";
338 defparam hsync_counter_1_.synch_mode="on";
339 defparam hsync_counter_1_.sum_lutc_input="cin";
341 stratix_lcell hsync_counter_2_ (
342 .regout(hsync_counter_2),
343 .cout(hsync_counter_cout[2]),
345 .dataa(hsync_counter_2),
347 .datac(hsync_counter_next_1_sqmuxa),
351 .sload(un9_hsync_counterlt9_i),
353 .cin(hsync_counter_cout[1]),
358 defparam hsync_counter_2_.cin_used="true";
359 defparam hsync_counter_2_.operation_mode="arithmetic";
360 defparam hsync_counter_2_.output_mode="reg_only";
361 defparam hsync_counter_2_.lut_mask="5aa0";
362 defparam hsync_counter_2_.synch_mode="on";
363 defparam hsync_counter_2_.sum_lutc_input="cin";
365 stratix_lcell hsync_counter_3_ (
366 .regout(hsync_counter_3),
367 .cout(hsync_counter_cout[3]),
369 .dataa(hsync_counter_3),
371 .datac(hsync_counter_next_1_sqmuxa),
375 .sload(un9_hsync_counterlt9_i),
377 .cin(hsync_counter_cout[2]),
382 defparam hsync_counter_3_.cin_used="true";
383 defparam hsync_counter_3_.operation_mode="arithmetic";
384 defparam hsync_counter_3_.output_mode="reg_only";
385 defparam hsync_counter_3_.lut_mask="5aa0";
386 defparam hsync_counter_3_.synch_mode="on";
387 defparam hsync_counter_3_.sum_lutc_input="cin";
389 stratix_lcell hsync_counter_4_ (
390 .regout(hsync_counter_4),
391 .cout(hsync_counter_cout[4]),
393 .dataa(hsync_counter_4),
395 .datac(hsync_counter_next_1_sqmuxa),
399 .sload(un9_hsync_counterlt9_i),
401 .cin(hsync_counter_cout[3]),
406 defparam hsync_counter_4_.cin_used="true";
407 defparam hsync_counter_4_.operation_mode="arithmetic";
408 defparam hsync_counter_4_.output_mode="reg_only";
409 defparam hsync_counter_4_.lut_mask="5aa0";
410 defparam hsync_counter_4_.synch_mode="on";
411 defparam hsync_counter_4_.sum_lutc_input="cin";
413 stratix_lcell hsync_counter_5_ (
414 .regout(hsync_counter_5),
415 .cout(hsync_counter_cout[5]),
417 .dataa(hsync_counter_5),
419 .datac(hsync_counter_next_1_sqmuxa),
423 .sload(un9_hsync_counterlt9_i),
425 .cin(hsync_counter_cout[4]),
430 defparam hsync_counter_5_.cin_used="true";
431 defparam hsync_counter_5_.operation_mode="arithmetic";
432 defparam hsync_counter_5_.output_mode="reg_only";
433 defparam hsync_counter_5_.lut_mask="5aa0";
434 defparam hsync_counter_5_.synch_mode="on";
435 defparam hsync_counter_5_.sum_lutc_input="cin";
437 stratix_lcell hsync_counter_6_ (
438 .regout(hsync_counter_6),
439 .cout(hsync_counter_cout[6]),
441 .dataa(hsync_counter_6),
443 .datac(hsync_counter_next_1_sqmuxa),
447 .sload(un9_hsync_counterlt9_i),
449 .cin(hsync_counter_cout[5]),
454 defparam hsync_counter_6_.cin_used="true";
455 defparam hsync_counter_6_.operation_mode="arithmetic";
456 defparam hsync_counter_6_.output_mode="reg_only";
457 defparam hsync_counter_6_.lut_mask="5aa0";
458 defparam hsync_counter_6_.synch_mode="on";
459 defparam hsync_counter_6_.sum_lutc_input="cin";
461 stratix_lcell hsync_counter_7_ (
462 .regout(hsync_counter_7),
463 .cout(hsync_counter_cout[7]),
465 .dataa(hsync_counter_7),
467 .datac(hsync_counter_next_1_sqmuxa),
471 .sload(un9_hsync_counterlt9_i),
473 .cin(hsync_counter_cout[6]),
478 defparam hsync_counter_7_.cin_used="true";
479 defparam hsync_counter_7_.operation_mode="arithmetic";
480 defparam hsync_counter_7_.output_mode="reg_only";
481 defparam hsync_counter_7_.lut_mask="5aa0";
482 defparam hsync_counter_7_.synch_mode="on";
483 defparam hsync_counter_7_.sum_lutc_input="cin";
485 stratix_lcell hsync_counter_8_ (
486 .regout(hsync_counter_8),
487 .cout(hsync_counter_cout[8]),
489 .dataa(hsync_counter_8),
491 .datac(hsync_counter_next_1_sqmuxa),
495 .sload(un9_hsync_counterlt9_i),
497 .cin(hsync_counter_cout[7]),
502 defparam hsync_counter_8_.cin_used="true";
503 defparam hsync_counter_8_.operation_mode="arithmetic";
504 defparam hsync_counter_8_.output_mode="reg_only";
505 defparam hsync_counter_8_.lut_mask="5aa0";
506 defparam hsync_counter_8_.synch_mode="on";
507 defparam hsync_counter_8_.sum_lutc_input="cin";
509 stratix_lcell hsync_counter_9_ (
510 .regout(hsync_counter_9),
512 .dataa(hsync_counter_9),
514 .datac(hsync_counter_next_1_sqmuxa),
518 .sload(un9_hsync_counterlt9_i),
520 .cin(hsync_counter_cout[8]),
525 defparam hsync_counter_9_.cin_used="true";
526 defparam hsync_counter_9_.operation_mode="normal";
527 defparam hsync_counter_9_.output_mode="reg_only";
528 defparam hsync_counter_9_.lut_mask="5a5a";
529 defparam hsync_counter_9_.synch_mode="on";
530 defparam hsync_counter_9_.sum_lutc_input="cin";
532 stratix_lcell vsync_counter_0_ (
533 .regout(vsync_counter_0),
534 .cout(vsync_counter_cout[0]),
536 .dataa(vsync_counter_0),
537 .datab(d_set_hsync_counter),
538 .datac(vsync_counter_next_1_sqmuxa),
542 .sload(un9_vsync_counterlt9_i),
548 defparam vsync_counter_0_.operation_mode="arithmetic";
549 defparam vsync_counter_0_.output_mode="reg_only";
550 defparam vsync_counter_0_.lut_mask="6688";
551 defparam vsync_counter_0_.synch_mode="on";
552 defparam vsync_counter_0_.sum_lutc_input="datac";
554 stratix_lcell vsync_counter_1_ (
555 .regout(vsync_counter_1),
556 .cout(vsync_counter_cout[1]),
558 .dataa(vsync_counter_1),
560 .datac(vsync_counter_next_1_sqmuxa),
564 .sload(un9_vsync_counterlt9_i),
566 .cin(vsync_counter_cout[0]),
571 defparam vsync_counter_1_.cin_used="true";
572 defparam vsync_counter_1_.operation_mode="arithmetic";
573 defparam vsync_counter_1_.output_mode="reg_only";
574 defparam vsync_counter_1_.lut_mask="5aa0";
575 defparam vsync_counter_1_.synch_mode="on";
576 defparam vsync_counter_1_.sum_lutc_input="cin";
578 stratix_lcell vsync_counter_2_ (
579 .regout(vsync_counter_2),
580 .cout(vsync_counter_cout[2]),
582 .dataa(vsync_counter_2),
584 .datac(vsync_counter_next_1_sqmuxa),
588 .sload(un9_vsync_counterlt9_i),
590 .cin(vsync_counter_cout[1]),
595 defparam vsync_counter_2_.cin_used="true";
596 defparam vsync_counter_2_.operation_mode="arithmetic";
597 defparam vsync_counter_2_.output_mode="reg_only";
598 defparam vsync_counter_2_.lut_mask="5aa0";
599 defparam vsync_counter_2_.synch_mode="on";
600 defparam vsync_counter_2_.sum_lutc_input="cin";
602 stratix_lcell vsync_counter_3_ (
603 .regout(vsync_counter_3),
604 .cout(vsync_counter_cout[3]),
606 .dataa(vsync_counter_3),
608 .datac(vsync_counter_next_1_sqmuxa),
612 .sload(un9_vsync_counterlt9_i),
614 .cin(vsync_counter_cout[2]),
619 defparam vsync_counter_3_.cin_used="true";
620 defparam vsync_counter_3_.operation_mode="arithmetic";
621 defparam vsync_counter_3_.output_mode="reg_only";
622 defparam vsync_counter_3_.lut_mask="5aa0";
623 defparam vsync_counter_3_.synch_mode="on";
624 defparam vsync_counter_3_.sum_lutc_input="cin";
626 stratix_lcell vsync_counter_4_ (
627 .regout(vsync_counter_4),
628 .cout(vsync_counter_cout[4]),
630 .dataa(vsync_counter_4),
632 .datac(vsync_counter_next_1_sqmuxa),
636 .sload(un9_vsync_counterlt9_i),
638 .cin(vsync_counter_cout[3]),
643 defparam vsync_counter_4_.cin_used="true";
644 defparam vsync_counter_4_.operation_mode="arithmetic";
645 defparam vsync_counter_4_.output_mode="reg_only";
646 defparam vsync_counter_4_.lut_mask="5aa0";
647 defparam vsync_counter_4_.synch_mode="on";
648 defparam vsync_counter_4_.sum_lutc_input="cin";
650 stratix_lcell vsync_counter_5_ (
651 .regout(vsync_counter_5),
652 .cout(vsync_counter_cout[5]),
654 .dataa(vsync_counter_5),
656 .datac(vsync_counter_next_1_sqmuxa),
660 .sload(un9_vsync_counterlt9_i),
662 .cin(vsync_counter_cout[4]),
667 defparam vsync_counter_5_.cin_used="true";
668 defparam vsync_counter_5_.operation_mode="arithmetic";
669 defparam vsync_counter_5_.output_mode="reg_only";
670 defparam vsync_counter_5_.lut_mask="5aa0";
671 defparam vsync_counter_5_.synch_mode="on";
672 defparam vsync_counter_5_.sum_lutc_input="cin";
674 stratix_lcell vsync_counter_6_ (
675 .regout(vsync_counter_6),
676 .cout(vsync_counter_cout[6]),
678 .dataa(vsync_counter_6),
680 .datac(vsync_counter_next_1_sqmuxa),
684 .sload(un9_vsync_counterlt9_i),
686 .cin(vsync_counter_cout[5]),
691 defparam vsync_counter_6_.cin_used="true";
692 defparam vsync_counter_6_.operation_mode="arithmetic";
693 defparam vsync_counter_6_.output_mode="reg_only";
694 defparam vsync_counter_6_.lut_mask="5aa0";
695 defparam vsync_counter_6_.synch_mode="on";
696 defparam vsync_counter_6_.sum_lutc_input="cin";
698 stratix_lcell vsync_counter_7_ (
699 .regout(vsync_counter_7),
700 .cout(vsync_counter_cout[7]),
702 .dataa(vsync_counter_7),
704 .datac(vsync_counter_next_1_sqmuxa),
708 .sload(un9_vsync_counterlt9_i),
710 .cin(vsync_counter_cout[6]),
715 defparam vsync_counter_7_.cin_used="true";
716 defparam vsync_counter_7_.operation_mode="arithmetic";
717 defparam vsync_counter_7_.output_mode="reg_only";
718 defparam vsync_counter_7_.lut_mask="5aa0";
719 defparam vsync_counter_7_.synch_mode="on";
720 defparam vsync_counter_7_.sum_lutc_input="cin";
722 stratix_lcell vsync_counter_8_ (
723 .regout(vsync_counter_8),
724 .cout(vsync_counter_cout[8]),
726 .dataa(vsync_counter_8),
728 .datac(vsync_counter_next_1_sqmuxa),
732 .sload(un9_vsync_counterlt9_i),
734 .cin(vsync_counter_cout[7]),
739 defparam vsync_counter_8_.cin_used="true";
740 defparam vsync_counter_8_.operation_mode="arithmetic";
741 defparam vsync_counter_8_.output_mode="reg_only";
742 defparam vsync_counter_8_.lut_mask="5aa0";
743 defparam vsync_counter_8_.synch_mode="on";
744 defparam vsync_counter_8_.sum_lutc_input="cin";
746 stratix_lcell vsync_counter_9_ (
747 .regout(vsync_counter_9),
749 .dataa(vsync_counter_9),
751 .datac(vsync_counter_next_1_sqmuxa),
755 .sload(un9_vsync_counterlt9_i),
757 .cin(vsync_counter_cout[8]),
762 defparam vsync_counter_9_.cin_used="true";
763 defparam vsync_counter_9_.operation_mode="normal";
764 defparam vsync_counter_9_.output_mode="reg_only";
765 defparam vsync_counter_9_.lut_mask="5a5a";
766 defparam vsync_counter_9_.synch_mode="on";
767 defparam vsync_counter_9_.sum_lutc_input="cin";
769 stratix_lcell column_counter_sig_9_ (
770 .regout(column_counter_sig_9),
772 .dataa(un2_column_counter_next_combout[9]),
773 .datab(un10_column_counter_siglto9),
777 .sclr(column_counter_next_0_sqmuxa_1_1_i),
784 defparam column_counter_sig_9_.operation_mode="normal";
785 defparam column_counter_sig_9_.output_mode="reg_only";
786 defparam column_counter_sig_9_.lut_mask="bbbb";
787 defparam column_counter_sig_9_.synch_mode="on";
788 defparam column_counter_sig_9_.sum_lutc_input="datac";
790 stratix_lcell column_counter_sig_8_ (
791 .regout(column_counter_sig_8),
793 .dataa(un2_column_counter_next_combout[8]),
794 .datab(column_counter_next_0_sqmuxa_1_1),
795 .datac(un10_column_counter_siglto9),
805 defparam column_counter_sig_8_.operation_mode="normal";
806 defparam column_counter_sig_8_.output_mode="reg_only";
807 defparam column_counter_sig_8_.lut_mask="8080";
808 defparam column_counter_sig_8_.synch_mode="off";
809 defparam column_counter_sig_8_.sum_lutc_input="datac";
811 stratix_lcell column_counter_sig_7_ (
812 .regout(column_counter_sig_7),
814 .dataa(un2_column_counter_next_combout[7]),
815 .datab(column_counter_next_0_sqmuxa_1_1),
816 .datac(un10_column_counter_siglto9),
826 defparam column_counter_sig_7_.operation_mode="normal";
827 defparam column_counter_sig_7_.output_mode="reg_only";
828 defparam column_counter_sig_7_.lut_mask="8080";
829 defparam column_counter_sig_7_.synch_mode="off";
830 defparam column_counter_sig_7_.sum_lutc_input="datac";
832 stratix_lcell column_counter_sig_6_ (
833 .regout(column_counter_sig_6),
835 .dataa(un2_column_counter_next_combout[6]),
836 .datab(un10_column_counter_siglto9),
840 .sclr(column_counter_next_0_sqmuxa_1_1_i),
847 defparam column_counter_sig_6_.operation_mode="normal";
848 defparam column_counter_sig_6_.output_mode="reg_only";
849 defparam column_counter_sig_6_.lut_mask="bbbb";
850 defparam column_counter_sig_6_.synch_mode="on";
851 defparam column_counter_sig_6_.sum_lutc_input="datac";
853 stratix_lcell column_counter_sig_5_ (
854 .regout(column_counter_sig_5),
856 .dataa(un2_column_counter_next_combout[5]),
857 .datab(un10_column_counter_siglto9),
861 .sclr(column_counter_next_0_sqmuxa_1_1_i),
868 defparam column_counter_sig_5_.operation_mode="normal";
869 defparam column_counter_sig_5_.output_mode="reg_only";
870 defparam column_counter_sig_5_.lut_mask="bbbb";
871 defparam column_counter_sig_5_.synch_mode="on";
872 defparam column_counter_sig_5_.sum_lutc_input="datac";
874 stratix_lcell column_counter_sig_4_ (
875 .regout(column_counter_sig_4),
877 .dataa(un2_column_counter_next_combout[4]),
878 .datab(un10_column_counter_siglto9),
882 .sclr(column_counter_next_0_sqmuxa_1_1_i),
889 defparam column_counter_sig_4_.operation_mode="normal";
890 defparam column_counter_sig_4_.output_mode="reg_only";
891 defparam column_counter_sig_4_.lut_mask="bbbb";
892 defparam column_counter_sig_4_.synch_mode="on";
893 defparam column_counter_sig_4_.sum_lutc_input="datac";
895 stratix_lcell column_counter_sig_3_ (
896 .regout(column_counter_sig_3),
898 .dataa(un2_column_counter_next_combout[3]),
899 .datab(un10_column_counter_siglto9),
903 .sclr(column_counter_next_0_sqmuxa_1_1_i),
910 defparam column_counter_sig_3_.operation_mode="normal";
911 defparam column_counter_sig_3_.output_mode="reg_only";
912 defparam column_counter_sig_3_.lut_mask="bbbb";
913 defparam column_counter_sig_3_.synch_mode="on";
914 defparam column_counter_sig_3_.sum_lutc_input="datac";
916 stratix_lcell column_counter_sig_2_ (
917 .regout(column_counter_sig_2),
919 .dataa(un2_column_counter_next_combout[2]),
920 .datab(un10_column_counter_siglto9),
924 .sclr(column_counter_next_0_sqmuxa_1_1_i),
931 defparam column_counter_sig_2_.operation_mode="normal";
932 defparam column_counter_sig_2_.output_mode="reg_only";
933 defparam column_counter_sig_2_.lut_mask="bbbb";
934 defparam column_counter_sig_2_.synch_mode="on";
935 defparam column_counter_sig_2_.sum_lutc_input="datac";
937 stratix_lcell column_counter_sig_1_ (
938 .regout(column_counter_sig_1),
940 .dataa(un2_column_counter_next_combout[1]),
941 .datab(un10_column_counter_siglto9),
945 .sclr(column_counter_next_0_sqmuxa_1_1_i),
952 defparam column_counter_sig_1_.operation_mode="normal";
953 defparam column_counter_sig_1_.output_mode="reg_only";
954 defparam column_counter_sig_1_.lut_mask="bbbb";
955 defparam column_counter_sig_1_.synch_mode="on";
956 defparam column_counter_sig_1_.sum_lutc_input="datac";
958 stratix_lcell column_counter_sig_0_ (
959 .regout(column_counter_sig_0),
961 .dataa(column_counter_sig_0),
962 .datab(un10_column_counter_siglto9),
966 .sclr(column_counter_next_0_sqmuxa_1_1_i),
973 defparam column_counter_sig_0_.operation_mode="normal";
974 defparam column_counter_sig_0_.output_mode="reg_only";
975 defparam column_counter_sig_0_.lut_mask="7777";
976 defparam column_counter_sig_0_.synch_mode="on";
977 defparam column_counter_sig_0_.sum_lutc_input="datac";
979 stratix_lcell hsync_state_6_ (
980 .regout(hsync_state_6),
985 .datad(un6_dly_counter_0_x),
994 defparam hsync_state_6_.operation_mode="normal";
995 defparam hsync_state_6_.output_mode="reg_only";
996 defparam hsync_state_6_.lut_mask="ff00";
997 defparam hsync_state_6_.synch_mode="off";
998 defparam hsync_state_6_.sum_lutc_input="datac";
1000 stratix_lcell vsync_state_0_ (
1001 .regout(vsync_state_0),
1003 .dataa(vsync_state_0),
1004 .datab(un6_dly_counter_0_x),
1005 .datac(vsync_state_3_iv_0_0__g0_0_a3_0),
1006 .datad(vsync_state_next_2_sqmuxa),
1015 defparam vsync_state_0_.operation_mode="normal";
1016 defparam vsync_state_0_.output_mode="reg_only";
1017 defparam vsync_state_0_.lut_mask="30ba";
1018 defparam vsync_state_0_.synch_mode="off";
1019 defparam vsync_state_0_.sum_lutc_input="datac";
1021 stratix_lcell vsync_state_1_ (
1022 .regout(vsync_state_1),
1024 .dataa(vsync_state_4),
1025 .datab(un12_vsync_counter_7),
1026 .datac(un13_vsync_counter_4),
1027 .datad(un6_dly_counter_0_x),
1036 defparam vsync_state_1_.operation_mode="normal";
1037 defparam vsync_state_1_.output_mode="reg_only";
1038 defparam vsync_state_1_.lut_mask="0080";
1039 defparam vsync_state_1_.synch_mode="off";
1040 defparam vsync_state_1_.sum_lutc_input="datac";
1042 stratix_lcell vsync_state_6_ (
1043 .combout(un6_dly_counter_0_x),
1044 .regout(vsync_state_6),
1046 .dataa(reset_pin_c),
1047 .datab(dly_counter_0),
1048 .datac(dly_counter_1),
1058 defparam vsync_state_6_.operation_mode="normal";
1059 defparam vsync_state_6_.output_mode="reg_and_comb";
1060 defparam vsync_state_6_.lut_mask="7f7f";
1061 defparam vsync_state_6_.synch_mode="off";
1062 defparam vsync_state_6_.sum_lutc_input="datac";
1064 stratix_lcell line_counter_sig_8_ (
1065 .regout(line_counter_sig_8),
1067 .dataa(un10_line_counter_siglto8),
1068 .datab(un1_line_counter_sig_combout[9]),
1072 .sclr(line_counter_next_0_sqmuxa_1_1_i),
1079 defparam line_counter_sig_8_.operation_mode="normal";
1080 defparam line_counter_sig_8_.output_mode="reg_only";
1081 defparam line_counter_sig_8_.lut_mask="dddd";
1082 defparam line_counter_sig_8_.synch_mode="on";
1083 defparam line_counter_sig_8_.sum_lutc_input="datac";
1085 stratix_lcell line_counter_sig_7_ (
1086 .regout(line_counter_sig_7),
1088 .dataa(un10_line_counter_siglto8),
1089 .datab(un1_line_counter_sig_combout[8]),
1093 .sclr(line_counter_next_0_sqmuxa_1_1_i),
1100 defparam line_counter_sig_7_.operation_mode="normal";
1101 defparam line_counter_sig_7_.output_mode="reg_only";
1102 defparam line_counter_sig_7_.lut_mask="dddd";
1103 defparam line_counter_sig_7_.synch_mode="on";
1104 defparam line_counter_sig_7_.sum_lutc_input="datac";
1106 stratix_lcell line_counter_sig_6_ (
1107 .regout(line_counter_sig_6),
1109 .dataa(un10_line_counter_siglto8),
1110 .datab(un1_line_counter_sig_combout[7]),
1114 .sclr(line_counter_next_0_sqmuxa_1_1_i),
1121 defparam line_counter_sig_6_.operation_mode="normal";
1122 defparam line_counter_sig_6_.output_mode="reg_only";
1123 defparam line_counter_sig_6_.lut_mask="dddd";
1124 defparam line_counter_sig_6_.synch_mode="on";
1125 defparam line_counter_sig_6_.sum_lutc_input="datac";
1127 stratix_lcell line_counter_sig_5_ (
1128 .regout(line_counter_sig_5),
1130 .dataa(un10_line_counter_siglto8),
1131 .datab(line_counter_next_0_sqmuxa_1_1),
1132 .datac(un1_line_counter_sig_combout[6]),
1142 defparam line_counter_sig_5_.operation_mode="normal";
1143 defparam line_counter_sig_5_.output_mode="reg_only";
1144 defparam line_counter_sig_5_.lut_mask="8080";
1145 defparam line_counter_sig_5_.synch_mode="off";
1146 defparam line_counter_sig_5_.sum_lutc_input="datac";
1148 stratix_lcell line_counter_sig_4_ (
1149 .regout(line_counter_sig_4),
1151 .dataa(un10_line_counter_siglto8),
1152 .datab(un1_line_counter_sig_combout[5]),
1156 .sclr(line_counter_next_0_sqmuxa_1_1_i),
1163 defparam line_counter_sig_4_.operation_mode="normal";
1164 defparam line_counter_sig_4_.output_mode="reg_only";
1165 defparam line_counter_sig_4_.lut_mask="dddd";
1166 defparam line_counter_sig_4_.synch_mode="on";
1167 defparam line_counter_sig_4_.sum_lutc_input="datac";
1169 stratix_lcell line_counter_sig_3_ (
1170 .regout(line_counter_sig_3),
1172 .dataa(un10_line_counter_siglto8),
1173 .datab(un1_line_counter_sig_combout[4]),
1177 .sclr(line_counter_next_0_sqmuxa_1_1_i),
1184 defparam line_counter_sig_3_.operation_mode="normal";
1185 defparam line_counter_sig_3_.output_mode="reg_only";
1186 defparam line_counter_sig_3_.lut_mask="dddd";
1187 defparam line_counter_sig_3_.synch_mode="on";
1188 defparam line_counter_sig_3_.sum_lutc_input="datac";
1190 stratix_lcell line_counter_sig_2_ (
1191 .regout(line_counter_sig_2),
1193 .dataa(un10_line_counter_siglto8),
1194 .datab(un1_line_counter_sig_combout[3]),
1198 .sclr(line_counter_next_0_sqmuxa_1_1_i),
1205 defparam line_counter_sig_2_.operation_mode="normal";
1206 defparam line_counter_sig_2_.output_mode="reg_only";
1207 defparam line_counter_sig_2_.lut_mask="dddd";
1208 defparam line_counter_sig_2_.synch_mode="on";
1209 defparam line_counter_sig_2_.sum_lutc_input="datac";
1211 stratix_lcell line_counter_sig_1_ (
1212 .regout(line_counter_sig_1),
1214 .dataa(un10_line_counter_siglto8),
1215 .datab(un1_line_counter_sig_combout[2]),
1219 .sclr(line_counter_next_0_sqmuxa_1_1_i),
1226 defparam line_counter_sig_1_.operation_mode="normal";
1227 defparam line_counter_sig_1_.output_mode="reg_only";
1228 defparam line_counter_sig_1_.lut_mask="dddd";
1229 defparam line_counter_sig_1_.synch_mode="on";
1230 defparam line_counter_sig_1_.sum_lutc_input="datac";
1232 stratix_lcell line_counter_sig_0_ (
1233 .regout(line_counter_sig_0),
1235 .dataa(un1_line_counter_sig_combout[1]),
1236 .datab(un10_line_counter_siglto8),
1240 .sclr(line_counter_next_0_sqmuxa_1_1_i),
1247 defparam line_counter_sig_0_.operation_mode="normal";
1248 defparam line_counter_sig_0_.output_mode="reg_only";
1249 defparam line_counter_sig_0_.lut_mask="bbbb";
1250 defparam line_counter_sig_0_.synch_mode="on";
1251 defparam line_counter_sig_0_.sum_lutc_input="datac";
1253 stratix_lcell v_enable_sig_Z (
1254 .regout(v_enable_sig),
1256 .dataa(hsync_state_3),
1257 .datab(hsync_state_1),
1261 .sclr(un6_dly_counter_0_x),
1263 .ena(v_enable_sig_1_0_0_0_g0_i_o4),
1268 defparam v_enable_sig_Z.operation_mode="normal";
1269 defparam v_enable_sig_Z.output_mode="reg_only";
1270 defparam v_enable_sig_Z.lut_mask="eeee";
1271 defparam v_enable_sig_Z.synch_mode="on";
1272 defparam v_enable_sig_Z.sum_lutc_input="datac";
1274 stratix_lcell h_enable_sig_Z (
1275 .regout(h_enable_sig),
1277 .dataa(vsync_state_3),
1278 .datab(vsync_state_1),
1282 .sclr(un6_dly_counter_0_x),
1284 .ena(h_enable_sig_1_0_0_0_g0_i_o4),
1289 defparam h_enable_sig_Z.operation_mode="normal";
1290 defparam h_enable_sig_Z.output_mode="reg_only";
1291 defparam h_enable_sig_Z.lut_mask="eeee";
1292 defparam h_enable_sig_Z.synch_mode="on";
1293 defparam h_enable_sig_Z.sum_lutc_input="datac";
1295 stratix_lcell h_sync_Z (
1298 .dataa(reset_pin_c),
1299 .datab(dly_counter_0),
1300 .datac(dly_counter_1),
1301 .datad(h_sync_1_0_0_0_g1),
1310 defparam h_sync_Z.operation_mode="normal";
1311 defparam h_sync_Z.output_mode="reg_only";
1312 defparam h_sync_Z.lut_mask="ff7f";
1313 defparam h_sync_Z.synch_mode="off";
1314 defparam h_sync_Z.sum_lutc_input="datac";
1316 stratix_lcell v_sync_Z (
1319 .dataa(reset_pin_c),
1320 .datab(dly_counter_0),
1321 .datac(dly_counter_1),
1322 .datad(v_sync_1_0_0_0_g1),
1331 defparam v_sync_Z.operation_mode="normal";
1332 defparam v_sync_Z.output_mode="reg_only";
1333 defparam v_sync_Z.lut_mask="ff7f";
1334 defparam v_sync_Z.synch_mode="off";
1335 defparam v_sync_Z.sum_lutc_input="datac";
1337 stratix_lcell vsync_state_5_ (
1338 .regout(vsync_state_5),
1340 .dataa(vsync_state_6),
1341 .datab(vsync_state_0),
1345 .sclr(un6_dly_counter_0_x),
1347 .ena(vsync_state_next_2_sqmuxa),
1352 defparam vsync_state_5_.operation_mode="normal";
1353 defparam vsync_state_5_.output_mode="reg_only";
1354 defparam vsync_state_5_.lut_mask="eeee";
1355 defparam vsync_state_5_.synch_mode="on";
1356 defparam vsync_state_5_.sum_lutc_input="datac";
1358 stratix_lcell vsync_state_4_ (
1359 .regout(vsync_state_4),
1361 .dataa(vsync_counter_0),
1362 .datab(vsync_counter_9),
1363 .datac(vsync_state_5),
1364 .datad(un14_vsync_counter_8),
1366 .sclr(un6_dly_counter_0_x),
1368 .ena(vsync_state_next_2_sqmuxa),
1373 defparam vsync_state_4_.operation_mode="normal";
1374 defparam vsync_state_4_.output_mode="reg_only";
1375 defparam vsync_state_4_.lut_mask="2000";
1376 defparam vsync_state_4_.synch_mode="on";
1377 defparam vsync_state_4_.sum_lutc_input="datac";
1379 stratix_lcell vsync_state_3_ (
1380 .regout(vsync_state_3),
1382 .dataa(vsync_state_1),
1387 .sclr(un6_dly_counter_0_x),
1389 .ena(vsync_state_next_2_sqmuxa),
1394 defparam vsync_state_3_.operation_mode="normal";
1395 defparam vsync_state_3_.output_mode="reg_only";
1396 defparam vsync_state_3_.lut_mask="aaaa";
1397 defparam vsync_state_3_.synch_mode="on";
1398 defparam vsync_state_3_.sum_lutc_input="datac";
1400 stratix_lcell vsync_state_2_ (
1401 .regout(vsync_state_2),
1403 .dataa(vsync_counter_0),
1404 .datab(vsync_counter_9),
1405 .datac(vsync_state_3),
1406 .datad(un14_vsync_counter_8),
1408 .sclr(un6_dly_counter_0_x),
1410 .ena(vsync_state_next_2_sqmuxa),
1415 defparam vsync_state_2_.operation_mode="normal";
1416 defparam vsync_state_2_.output_mode="reg_only";
1417 defparam vsync_state_2_.lut_mask="8000";
1418 defparam vsync_state_2_.synch_mode="on";
1419 defparam vsync_state_2_.sum_lutc_input="datac";
1421 stratix_lcell hsync_state_5_ (
1422 .regout(hsync_state_5),
1424 .dataa(hsync_state_6),
1425 .datab(hsync_state_0),
1429 .sclr(un6_dly_counter_0_x),
1431 .ena(hsync_state_3_0_0_0__g0_0),
1436 defparam hsync_state_5_.operation_mode="normal";
1437 defparam hsync_state_5_.output_mode="reg_only";
1438 defparam hsync_state_5_.lut_mask="eeee";
1439 defparam hsync_state_5_.synch_mode="on";
1440 defparam hsync_state_5_.sum_lutc_input="datac";
1442 stratix_lcell hsync_state_4_ (
1443 .regout(hsync_state_4),
1445 .dataa(hsync_state_5),
1446 .datab(un10_hsync_counter_3),
1447 .datac(un10_hsync_counter_1),
1448 .datad(un10_hsync_counter_4),
1450 .sclr(un6_dly_counter_0_x),
1452 .ena(hsync_state_3_0_0_0__g0_0),
1457 defparam hsync_state_4_.operation_mode="normal";
1458 defparam hsync_state_4_.output_mode="reg_only";
1459 defparam hsync_state_4_.lut_mask="8000";
1460 defparam hsync_state_4_.synch_mode="on";
1461 defparam hsync_state_4_.sum_lutc_input="datac";
1463 stratix_lcell hsync_state_3_ (
1464 .regout(hsync_state_3),
1466 .dataa(hsync_state_1),
1471 .sclr(un6_dly_counter_0_x),
1473 .ena(hsync_state_3_0_0_0__g0_0),
1478 defparam hsync_state_3_.operation_mode="normal";
1479 defparam hsync_state_3_.output_mode="reg_only";
1480 defparam hsync_state_3_.lut_mask="aaaa";
1481 defparam hsync_state_3_.synch_mode="on";
1482 defparam hsync_state_3_.sum_lutc_input="datac";
1484 stratix_lcell hsync_state_2_ (
1485 .regout(hsync_state_2),
1487 .dataa(hsync_state_3),
1488 .datab(un12_hsync_counter),
1492 .sclr(un6_dly_counter_0_x),
1494 .ena(hsync_state_3_0_0_0__g0_0),
1499 defparam hsync_state_2_.operation_mode="normal";
1500 defparam hsync_state_2_.output_mode="reg_only";
1501 defparam hsync_state_2_.lut_mask="8888";
1502 defparam hsync_state_2_.synch_mode="on";
1503 defparam hsync_state_2_.sum_lutc_input="datac";
1505 stratix_lcell hsync_state_1_ (
1506 .regout(hsync_state_1),
1508 .dataa(hsync_state_4),
1509 .datab(un11_hsync_counter_2),
1510 .datac(un10_hsync_counter_1),
1511 .datad(un11_hsync_counter_3),
1513 .sclr(un6_dly_counter_0_x),
1515 .ena(hsync_state_3_0_0_0__g0_0),
1520 defparam hsync_state_1_.operation_mode="normal";
1521 defparam hsync_state_1_.output_mode="reg_only";
1522 defparam hsync_state_1_.lut_mask="8000";
1523 defparam hsync_state_1_.synch_mode="on";
1524 defparam hsync_state_1_.sum_lutc_input="datac";
1526 stratix_lcell hsync_state_0_ (
1527 .regout(hsync_state_0),
1529 .dataa(hsync_state_2),
1530 .datab(un13_hsync_counter),
1534 .sclr(un6_dly_counter_0_x),
1536 .ena(hsync_state_3_0_0_0__g0_0),
1541 defparam hsync_state_0_.operation_mode="normal";
1542 defparam hsync_state_0_.output_mode="reg_only";
1543 defparam hsync_state_0_.lut_mask="8888";
1544 defparam hsync_state_0_.synch_mode="on";
1545 defparam hsync_state_0_.sum_lutc_input="datac";
1547 stratix_lcell vsync_state_next_2_sqmuxa_cZ (
1548 .combout(vsync_state_next_2_sqmuxa),
1550 .dataa(un6_dly_counter_0_x),
1551 .datab(vsync_state_next_1_sqmuxa_1),
1552 .datac(vsync_state_next_1_sqmuxa_3),
1553 .datad(un1_vsync_state_next_1_sqmuxa_0),
1562 defparam vsync_state_next_2_sqmuxa_cZ.operation_mode="normal";
1563 defparam vsync_state_next_2_sqmuxa_cZ.output_mode="comb_only";
1564 defparam vsync_state_next_2_sqmuxa_cZ.lut_mask="aaab";
1565 defparam vsync_state_next_2_sqmuxa_cZ.synch_mode="off";
1566 defparam vsync_state_next_2_sqmuxa_cZ.sum_lutc_input="datac";
1567 stratix_lcell hsync_state_3_0_0_0__g0_0_cZ (
1568 .combout(hsync_state_3_0_0_0__g0_0),
1570 .dataa(hsync_state_next_1_sqmuxa_1),
1571 .datab(hsync_state_next_1_sqmuxa_2),
1572 .datac(un6_dly_counter_0_x),
1573 .datad(un1_hsync_state_next_1_sqmuxa_0),
1582 defparam hsync_state_3_0_0_0__g0_0_cZ.operation_mode="normal";
1583 defparam hsync_state_3_0_0_0__g0_0_cZ.output_mode="comb_only";
1584 defparam hsync_state_3_0_0_0__g0_0_cZ.lut_mask="f0f1";
1585 defparam hsync_state_3_0_0_0__g0_0_cZ.synch_mode="off";
1586 defparam hsync_state_3_0_0_0__g0_0_cZ.sum_lutc_input="datac";
1588 stratix_lcell un1_hsync_state_next_1_sqmuxa_0_cZ (
1589 .combout(un1_hsync_state_next_1_sqmuxa_0),
1591 .dataa(hsync_state_2),
1592 .datab(hsync_state_3),
1593 .datac(un13_hsync_counter),
1594 .datad(un12_hsync_counter),
1603 defparam un1_hsync_state_next_1_sqmuxa_0_cZ.operation_mode="normal";
1604 defparam un1_hsync_state_next_1_sqmuxa_0_cZ.output_mode="comb_only";
1605 defparam un1_hsync_state_next_1_sqmuxa_0_cZ.lut_mask="0ace";
1606 defparam un1_hsync_state_next_1_sqmuxa_0_cZ.synch_mode="off";
1607 defparam un1_hsync_state_next_1_sqmuxa_0_cZ.sum_lutc_input="datac";
1609 stratix_lcell un1_vsync_state_next_1_sqmuxa_0_cZ (
1610 .combout(un1_vsync_state_next_1_sqmuxa_0),
1612 .dataa(vsync_state_2),
1613 .datab(un12_vsync_counter_6),
1614 .datac(un15_vsync_counter_4),
1615 .datad(vsync_state_next_1_sqmuxa_2),
1624 defparam un1_vsync_state_next_1_sqmuxa_0_cZ.operation_mode="normal";
1625 defparam un1_vsync_state_next_1_sqmuxa_0_cZ.output_mode="comb_only";
1626 defparam un1_vsync_state_next_1_sqmuxa_0_cZ.lut_mask="ff2a";
1627 defparam un1_vsync_state_next_1_sqmuxa_0_cZ.synch_mode="off";
1628 defparam un1_vsync_state_next_1_sqmuxa_0_cZ.sum_lutc_input="datac";
1630 stratix_lcell COLUMN_COUNT_next_un10_column_counter_siglto9 (
1631 .combout(un10_column_counter_siglto9),
1633 .dataa(column_counter_sig_7),
1634 .datab(column_counter_sig_8),
1635 .datac(column_counter_sig_9),
1636 .datad(un10_column_counter_siglt6),
1645 defparam COLUMN_COUNT_next_un10_column_counter_siglto9.operation_mode="normal";
1646 defparam COLUMN_COUNT_next_un10_column_counter_siglto9.output_mode="comb_only";
1647 defparam COLUMN_COUNT_next_un10_column_counter_siglto9.lut_mask="1f0f";
1648 defparam COLUMN_COUNT_next_un10_column_counter_siglto9.synch_mode="off";
1649 defparam COLUMN_COUNT_next_un10_column_counter_siglto9.sum_lutc_input="datac";
1650 stratix_lcell vsync_state_3_iv_0_0__g0_0_a3_0_cZ (
1651 .combout(vsync_state_3_iv_0_0__g0_0_a3_0),
1653 .dataa(vsync_state_2),
1654 .datab(un12_vsync_counter_6),
1655 .datac(un15_vsync_counter_4),
1665 defparam vsync_state_3_iv_0_0__g0_0_a3_0_cZ.operation_mode="normal";
1666 defparam vsync_state_3_iv_0_0__g0_0_a3_0_cZ.output_mode="comb_only";
1667 defparam vsync_state_3_iv_0_0__g0_0_a3_0_cZ.lut_mask="8080";
1668 defparam vsync_state_3_iv_0_0__g0_0_a3_0_cZ.synch_mode="off";
1669 defparam vsync_state_3_iv_0_0__g0_0_a3_0_cZ.sum_lutc_input="datac";
1671 stratix_lcell LINE_COUNT_next_un10_line_counter_siglto8 (
1672 .combout(un10_line_counter_siglto8),
1674 .dataa(line_counter_sig_6),
1675 .datab(line_counter_sig_7),
1676 .datac(line_counter_sig_8),
1677 .datad(un10_line_counter_siglto5),
1686 defparam LINE_COUNT_next_un10_line_counter_siglto8.operation_mode="normal";
1687 defparam LINE_COUNT_next_un10_line_counter_siglto8.output_mode="comb_only";
1688 defparam LINE_COUNT_next_un10_line_counter_siglto8.lut_mask="ff7f";
1689 defparam LINE_COUNT_next_un10_line_counter_siglto8.synch_mode="off";
1690 defparam LINE_COUNT_next_un10_line_counter_siglto8.sum_lutc_input="datac";
1692 stratix_lcell vsync_state_next_1_sqmuxa_1_cZ (
1693 .combout(vsync_state_next_1_sqmuxa_1),
1695 .dataa(vsync_counter_0),
1696 .datab(vsync_counter_9),
1697 .datac(vsync_state_5),
1698 .datad(un14_vsync_counter_8),
1707 defparam vsync_state_next_1_sqmuxa_1_cZ.operation_mode="normal";
1708 defparam vsync_state_next_1_sqmuxa_1_cZ.output_mode="comb_only";
1709 defparam vsync_state_next_1_sqmuxa_1_cZ.lut_mask="d0f0";
1710 defparam vsync_state_next_1_sqmuxa_1_cZ.synch_mode="off";
1711 defparam vsync_state_next_1_sqmuxa_1_cZ.sum_lutc_input="datac";
1713 stratix_lcell vsync_state_next_1_sqmuxa_2_cZ (
1714 .combout(vsync_state_next_1_sqmuxa_2),
1716 .dataa(vsync_state_4),
1717 .datab(un12_vsync_counter_7),
1718 .datac(un13_vsync_counter_4),
1728 defparam vsync_state_next_1_sqmuxa_2_cZ.operation_mode="normal";
1729 defparam vsync_state_next_1_sqmuxa_2_cZ.output_mode="comb_only";
1730 defparam vsync_state_next_1_sqmuxa_2_cZ.lut_mask="2a2a";
1731 defparam vsync_state_next_1_sqmuxa_2_cZ.synch_mode="off";
1732 defparam vsync_state_next_1_sqmuxa_2_cZ.sum_lutc_input="datac";
1734 stratix_lcell vsync_state_next_1_sqmuxa_3_cZ (
1735 .combout(vsync_state_next_1_sqmuxa_3),
1737 .dataa(vsync_counter_0),
1738 .datab(vsync_counter_9),
1739 .datac(vsync_state_3),
1740 .datad(un14_vsync_counter_8),
1749 defparam vsync_state_next_1_sqmuxa_3_cZ.operation_mode="normal";
1750 defparam vsync_state_next_1_sqmuxa_3_cZ.output_mode="comb_only";
1751 defparam vsync_state_next_1_sqmuxa_3_cZ.lut_mask="70f0";
1752 defparam vsync_state_next_1_sqmuxa_3_cZ.synch_mode="off";
1753 defparam vsync_state_next_1_sqmuxa_3_cZ.sum_lutc_input="datac";
1755 stratix_lcell G_16 (
1758 .dataa(vsync_state_0),
1759 .datab(vsync_state_6),
1760 .datac(un9_vsync_counterlt9),
1761 .datad(un6_dly_counter_0_x),
1770 defparam G_16.operation_mode="normal";
1771 defparam G_16.output_mode="comb_only";
1772 defparam G_16.lut_mask="0f1f";
1773 defparam G_16.synch_mode="off";
1774 defparam G_16.sum_lutc_input="datac";
1779 .dataa(hsync_state_0),
1780 .datab(hsync_state_6),
1781 .datac(un9_hsync_counterlt9),
1782 .datad(un6_dly_counter_0_x),
1791 defparam G_2.operation_mode="normal";
1792 defparam G_2.output_mode="comb_only";
1793 defparam G_2.lut_mask="0f1f";
1794 defparam G_2.synch_mode="off";
1795 defparam G_2.sum_lutc_input="datac";
1797 stratix_lcell hsync_state_next_1_sqmuxa_2_cZ (
1798 .combout(hsync_state_next_1_sqmuxa_2),
1800 .dataa(hsync_state_4),
1801 .datab(un11_hsync_counter_2),
1802 .datac(un10_hsync_counter_1),
1803 .datad(un11_hsync_counter_3),
1812 defparam hsync_state_next_1_sqmuxa_2_cZ.operation_mode="normal";
1813 defparam hsync_state_next_1_sqmuxa_2_cZ.output_mode="comb_only";
1814 defparam hsync_state_next_1_sqmuxa_2_cZ.lut_mask="2aaa";
1815 defparam hsync_state_next_1_sqmuxa_2_cZ.synch_mode="off";
1816 defparam hsync_state_next_1_sqmuxa_2_cZ.sum_lutc_input="datac";
1818 stratix_lcell hsync_state_next_1_sqmuxa_1_cZ (
1819 .combout(hsync_state_next_1_sqmuxa_1),
1821 .dataa(hsync_state_5),
1822 .datab(un10_hsync_counter_3),
1823 .datac(un10_hsync_counter_1),
1824 .datad(un10_hsync_counter_4),
1833 defparam hsync_state_next_1_sqmuxa_1_cZ.operation_mode="normal";
1834 defparam hsync_state_next_1_sqmuxa_1_cZ.output_mode="comb_only";
1835 defparam hsync_state_next_1_sqmuxa_1_cZ.lut_mask="2aaa";
1836 defparam hsync_state_next_1_sqmuxa_1_cZ.synch_mode="off";
1837 defparam hsync_state_next_1_sqmuxa_1_cZ.sum_lutc_input="datac";
1839 stratix_lcell VSYNC_COUNT_next_un9_vsync_counterlt9 (
1840 .combout(un9_vsync_counterlt9),
1842 .dataa(vsync_counter_4),
1843 .datab(vsync_counter_5),
1844 .datac(un9_vsync_counterlt9_5),
1845 .datad(un9_vsync_counterlt9_6),
1854 defparam VSYNC_COUNT_next_un9_vsync_counterlt9.operation_mode="normal";
1855 defparam VSYNC_COUNT_next_un9_vsync_counterlt9.output_mode="comb_only";
1856 defparam VSYNC_COUNT_next_un9_vsync_counterlt9.lut_mask="fff7";
1857 defparam VSYNC_COUNT_next_un9_vsync_counterlt9.synch_mode="off";
1858 defparam VSYNC_COUNT_next_un9_vsync_counterlt9.sum_lutc_input="datac";
1860 stratix_lcell COLUMN_COUNT_next_un10_column_counter_siglt6 (
1861 .combout(un10_column_counter_siglt6),
1863 .dataa(column_counter_sig_3),
1864 .datab(column_counter_sig_4),
1865 .datac(un10_column_counter_siglt6_3),
1866 .datad(un10_column_counter_siglt6_1),
1875 defparam COLUMN_COUNT_next_un10_column_counter_siglt6.operation_mode="normal";
1876 defparam COLUMN_COUNT_next_un10_column_counter_siglt6.output_mode="comb_only";
1877 defparam COLUMN_COUNT_next_un10_column_counter_siglt6.lut_mask="fff7";
1878 defparam COLUMN_COUNT_next_un10_column_counter_siglt6.synch_mode="off";
1879 defparam COLUMN_COUNT_next_un10_column_counter_siglt6.sum_lutc_input="datac";
1881 stratix_lcell HSYNC_FSM_next_un12_hsync_counter (
1882 .combout(un12_hsync_counter),
1884 .dataa(hsync_counter_0),
1885 .datab(hsync_counter_1),
1886 .datac(un12_hsync_counter_3),
1887 .datad(un12_hsync_counter_4),
1896 defparam HSYNC_FSM_next_un12_hsync_counter.operation_mode="normal";
1897 defparam HSYNC_FSM_next_un12_hsync_counter.output_mode="comb_only";
1898 defparam HSYNC_FSM_next_un12_hsync_counter.lut_mask="8000";
1899 defparam HSYNC_FSM_next_un12_hsync_counter.synch_mode="off";
1900 defparam HSYNC_FSM_next_un12_hsync_counter.sum_lutc_input="datac";
1902 stratix_lcell HSYNC_FSM_next_un13_hsync_counter (
1903 .combout(un13_hsync_counter),
1905 .dataa(hsync_counter_6),
1906 .datab(hsync_counter_7),
1907 .datac(un13_hsync_counter_2),
1908 .datad(un13_hsync_counter_7),
1917 defparam HSYNC_FSM_next_un13_hsync_counter.operation_mode="normal";
1918 defparam HSYNC_FSM_next_un13_hsync_counter.output_mode="comb_only";
1919 defparam HSYNC_FSM_next_un13_hsync_counter.lut_mask="1000";
1920 defparam HSYNC_FSM_next_un13_hsync_counter.synch_mode="off";
1921 defparam HSYNC_FSM_next_un13_hsync_counter.sum_lutc_input="datac";
1923 stratix_lcell HSYNC_COUNT_next_un9_hsync_counterlt9 (
1924 .combout(un9_hsync_counterlt9),
1926 .dataa(hsync_counter_4),
1927 .datab(hsync_counter_5),
1928 .datac(un9_hsync_counterlt9_3),
1929 .datad(un13_hsync_counter_7),
1938 defparam HSYNC_COUNT_next_un9_hsync_counterlt9.operation_mode="normal";
1939 defparam HSYNC_COUNT_next_un9_hsync_counterlt9.output_mode="comb_only";
1940 defparam HSYNC_COUNT_next_un9_hsync_counterlt9.lut_mask="f7ff";
1941 defparam HSYNC_COUNT_next_un9_hsync_counterlt9.synch_mode="off";
1942 defparam HSYNC_COUNT_next_un9_hsync_counterlt9.sum_lutc_input="datac";
1944 stratix_lcell LINE_COUNT_next_un10_line_counter_siglto5 (
1945 .combout(un10_line_counter_siglto5),
1947 .dataa(line_counter_sig_1),
1948 .datab(line_counter_sig_2),
1949 .datac(line_counter_sig_5),
1950 .datad(un10_line_counter_siglt4_2),
1959 defparam LINE_COUNT_next_un10_line_counter_siglto5.operation_mode="normal";
1960 defparam LINE_COUNT_next_un10_line_counter_siglto5.output_mode="comb_only";
1961 defparam LINE_COUNT_next_un10_line_counter_siglto5.lut_mask="0f07";
1962 defparam LINE_COUNT_next_un10_line_counter_siglto5.synch_mode="off";
1963 defparam LINE_COUNT_next_un10_line_counter_siglto5.sum_lutc_input="datac";
1965 stratix_lcell VSYNC_FSM_next_un13_vsync_counter_4 (
1966 .combout(un13_vsync_counter_4),
1968 .dataa(vsync_counter_0),
1969 .datab(vsync_counter_5),
1970 .datac(un13_vsync_counter_3),
1980 defparam VSYNC_FSM_next_un13_vsync_counter_4.operation_mode="normal";
1981 defparam VSYNC_FSM_next_un13_vsync_counter_4.output_mode="comb_only";
1982 defparam VSYNC_FSM_next_un13_vsync_counter_4.lut_mask="8080";
1983 defparam VSYNC_FSM_next_un13_vsync_counter_4.synch_mode="off";
1984 defparam VSYNC_FSM_next_un13_vsync_counter_4.sum_lutc_input="datac";
1986 stratix_lcell VSYNC_FSM_next_un15_vsync_counter_4 (
1987 .combout(un15_vsync_counter_4),
1989 .dataa(vsync_counter_1),
1990 .datab(vsync_counter_4),
1991 .datac(un15_vsync_counter_3),
2001 defparam VSYNC_FSM_next_un15_vsync_counter_4.operation_mode="normal";
2002 defparam VSYNC_FSM_next_un15_vsync_counter_4.output_mode="comb_only";
2003 defparam VSYNC_FSM_next_un15_vsync_counter_4.lut_mask="1010";
2004 defparam VSYNC_FSM_next_un15_vsync_counter_4.synch_mode="off";
2005 defparam VSYNC_FSM_next_un15_vsync_counter_4.sum_lutc_input="datac";
2007 stratix_lcell line_counter_next_0_sqmuxa_1_1_cZ (
2008 .combout(line_counter_next_0_sqmuxa_1_1),
2010 .dataa(reset_pin_c),
2011 .datab(dly_counter_0),
2012 .datac(dly_counter_1),
2013 .datad(vsync_state_1),
2022 defparam line_counter_next_0_sqmuxa_1_1_cZ.operation_mode="normal";
2023 defparam line_counter_next_0_sqmuxa_1_1_cZ.output_mode="comb_only";
2024 defparam line_counter_next_0_sqmuxa_1_1_cZ.lut_mask="0080";
2025 defparam line_counter_next_0_sqmuxa_1_1_cZ.synch_mode="off";
2026 defparam line_counter_next_0_sqmuxa_1_1_cZ.sum_lutc_input="datac";
2027 stratix_lcell v_sync_1_0_0_0_g1_cZ (
2028 .combout(v_sync_1_0_0_0_g1),
2030 .dataa(vsync_state_2),
2032 .datac(vsync_state_4),
2033 .datad(un1_vsync_state_2_0),
2042 defparam v_sync_1_0_0_0_g1_cZ.operation_mode="normal";
2043 defparam v_sync_1_0_0_0_g1_cZ.output_mode="comb_only";
2044 defparam v_sync_1_0_0_0_g1_cZ.lut_mask="ccd8";
2045 defparam v_sync_1_0_0_0_g1_cZ.synch_mode="off";
2046 defparam v_sync_1_0_0_0_g1_cZ.sum_lutc_input="datac";
2047 stratix_lcell h_enable_sig_1_0_0_0_g0_i_o4_cZ (
2048 .combout(h_enable_sig_1_0_0_0_g0_i_o4),
2050 .dataa(vsync_state_4),
2051 .datab(vsync_state_5),
2052 .datac(un6_dly_counter_0_x),
2062 defparam h_enable_sig_1_0_0_0_g0_i_o4_cZ.operation_mode="normal";
2063 defparam h_enable_sig_1_0_0_0_g0_i_o4_cZ.output_mode="comb_only";
2064 defparam h_enable_sig_1_0_0_0_g0_i_o4_cZ.lut_mask="f1f1";
2065 defparam h_enable_sig_1_0_0_0_g0_i_o4_cZ.synch_mode="off";
2066 defparam h_enable_sig_1_0_0_0_g0_i_o4_cZ.sum_lutc_input="datac";
2068 stratix_lcell vsync_counter_next_1_sqmuxa_cZ (
2069 .combout(vsync_counter_next_1_sqmuxa),
2071 .dataa(reset_pin_c),
2072 .datab(dly_counter_0),
2073 .datac(dly_counter_1),
2074 .datad(d_set_vsync_counter),
2083 defparam vsync_counter_next_1_sqmuxa_cZ.operation_mode="normal";
2084 defparam vsync_counter_next_1_sqmuxa_cZ.output_mode="comb_only";
2085 defparam vsync_counter_next_1_sqmuxa_cZ.lut_mask="0080";
2086 defparam vsync_counter_next_1_sqmuxa_cZ.synch_mode="off";
2087 defparam vsync_counter_next_1_sqmuxa_cZ.sum_lutc_input="datac";
2089 stratix_lcell VSYNC_FSM_next_un14_vsync_counter_8 (
2090 .combout(un14_vsync_counter_8),
2092 .dataa(un12_vsync_counter_6),
2093 .datab(un12_vsync_counter_7),
2104 defparam VSYNC_FSM_next_un14_vsync_counter_8.operation_mode="normal";
2105 defparam VSYNC_FSM_next_un14_vsync_counter_8.output_mode="comb_only";
2106 defparam VSYNC_FSM_next_un14_vsync_counter_8.lut_mask="8888";
2107 defparam VSYNC_FSM_next_un14_vsync_counter_8.synch_mode="off";
2108 defparam VSYNC_FSM_next_un14_vsync_counter_8.sum_lutc_input="datac";
2110 stratix_lcell hsync_counter_next_1_sqmuxa_cZ (
2111 .combout(hsync_counter_next_1_sqmuxa),
2113 .dataa(reset_pin_c),
2114 .datab(dly_counter_0),
2115 .datac(dly_counter_1),
2116 .datad(d_set_hsync_counter),
2125 defparam hsync_counter_next_1_sqmuxa_cZ.operation_mode="normal";
2126 defparam hsync_counter_next_1_sqmuxa_cZ.output_mode="comb_only";
2127 defparam hsync_counter_next_1_sqmuxa_cZ.lut_mask="0080";
2128 defparam hsync_counter_next_1_sqmuxa_cZ.synch_mode="off";
2129 defparam hsync_counter_next_1_sqmuxa_cZ.sum_lutc_input="datac";
2131 stratix_lcell column_counter_next_0_sqmuxa_1_1_cZ (
2132 .combout(column_counter_next_0_sqmuxa_1_1),
2134 .dataa(reset_pin_c),
2135 .datab(dly_counter_0),
2136 .datac(dly_counter_1),
2137 .datad(hsync_state_1),
2146 defparam column_counter_next_0_sqmuxa_1_1_cZ.operation_mode="normal";
2147 defparam column_counter_next_0_sqmuxa_1_1_cZ.output_mode="comb_only";
2148 defparam column_counter_next_0_sqmuxa_1_1_cZ.lut_mask="0080";
2149 defparam column_counter_next_0_sqmuxa_1_1_cZ.synch_mode="off";
2150 defparam column_counter_next_0_sqmuxa_1_1_cZ.sum_lutc_input="datac";
2151 stratix_lcell h_sync_1_0_0_0_g1_cZ (
2152 .combout(h_sync_1_0_0_0_g1),
2154 .dataa(hsync_state_2),
2156 .datac(hsync_state_4),
2157 .datad(un1_hsync_state_3_0),
2166 defparam h_sync_1_0_0_0_g1_cZ.operation_mode="normal";
2167 defparam h_sync_1_0_0_0_g1_cZ.output_mode="comb_only";
2168 defparam h_sync_1_0_0_0_g1_cZ.lut_mask="ccd8";
2169 defparam h_sync_1_0_0_0_g1_cZ.synch_mode="off";
2170 defparam h_sync_1_0_0_0_g1_cZ.sum_lutc_input="datac";
2171 stratix_lcell v_enable_sig_1_0_0_0_g0_i_o4_cZ (
2172 .combout(v_enable_sig_1_0_0_0_g0_i_o4),
2174 .dataa(hsync_state_4),
2175 .datab(hsync_state_5),
2176 .datac(un6_dly_counter_0_x),
2186 defparam v_enable_sig_1_0_0_0_g0_i_o4_cZ.operation_mode="normal";
2187 defparam v_enable_sig_1_0_0_0_g0_i_o4_cZ.output_mode="comb_only";
2188 defparam v_enable_sig_1_0_0_0_g0_i_o4_cZ.lut_mask="f1f1";
2189 defparam v_enable_sig_1_0_0_0_g0_i_o4_cZ.synch_mode="off";
2190 defparam v_enable_sig_1_0_0_0_g0_i_o4_cZ.sum_lutc_input="datac";
2192 stratix_lcell HSYNC_FSM_next_un12_hsync_counter_4 (
2193 .combout(un12_hsync_counter_4),
2195 .dataa(hsync_counter_6),
2196 .datab(hsync_counter_7),
2197 .datac(hsync_counter_8),
2198 .datad(hsync_counter_4),
2207 defparam HSYNC_FSM_next_un12_hsync_counter_4.operation_mode="normal";
2208 defparam HSYNC_FSM_next_un12_hsync_counter_4.output_mode="comb_only";
2209 defparam HSYNC_FSM_next_un12_hsync_counter_4.lut_mask="0010";
2210 defparam HSYNC_FSM_next_un12_hsync_counter_4.synch_mode="off";
2211 defparam HSYNC_FSM_next_un12_hsync_counter_4.sum_lutc_input="datac";
2213 stratix_lcell HSYNC_FSM_next_un12_hsync_counter_3 (
2214 .combout(un12_hsync_counter_3),
2216 .dataa(hsync_counter_9),
2217 .datab(hsync_counter_5),
2218 .datac(hsync_counter_2),
2219 .datad(hsync_counter_3),
2228 defparam HSYNC_FSM_next_un12_hsync_counter_3.operation_mode="normal";
2229 defparam HSYNC_FSM_next_un12_hsync_counter_3.output_mode="comb_only";
2230 defparam HSYNC_FSM_next_un12_hsync_counter_3.lut_mask="0020";
2231 defparam HSYNC_FSM_next_un12_hsync_counter_3.synch_mode="off";
2232 defparam HSYNC_FSM_next_un12_hsync_counter_3.sum_lutc_input="datac";
2234 stratix_lcell HSYNC_FSM_next_un11_hsync_counter_3 (
2235 .combout(un11_hsync_counter_3),
2237 .dataa(hsync_counter_0),
2238 .datab(hsync_counter_1),
2239 .datac(hsync_counter_3),
2240 .datad(hsync_counter_4),
2249 defparam HSYNC_FSM_next_un11_hsync_counter_3.operation_mode="normal";
2250 defparam HSYNC_FSM_next_un11_hsync_counter_3.output_mode="comb_only";
2251 defparam HSYNC_FSM_next_un11_hsync_counter_3.lut_mask="0008";
2252 defparam HSYNC_FSM_next_un11_hsync_counter_3.synch_mode="off";
2253 defparam HSYNC_FSM_next_un11_hsync_counter_3.sum_lutc_input="datac";
2255 stratix_lcell HSYNC_FSM_next_un11_hsync_counter_2 (
2256 .combout(un11_hsync_counter_2),
2258 .dataa(hsync_counter_2),
2259 .datab(hsync_counter_7),
2260 .datac(hsync_counter_6),
2270 defparam HSYNC_FSM_next_un11_hsync_counter_2.operation_mode="normal";
2271 defparam HSYNC_FSM_next_un11_hsync_counter_2.output_mode="comb_only";
2272 defparam HSYNC_FSM_next_un11_hsync_counter_2.lut_mask="0808";
2273 defparam HSYNC_FSM_next_un11_hsync_counter_2.synch_mode="off";
2274 defparam HSYNC_FSM_next_un11_hsync_counter_2.sum_lutc_input="datac";
2276 stratix_lcell HSYNC_COUNT_next_un9_hsync_counterlt9_3 (
2277 .combout(un9_hsync_counterlt9_3),
2279 .dataa(hsync_counter_6),
2280 .datab(hsync_counter_7),
2281 .datac(hsync_counter_8),
2282 .datad(hsync_counter_9),
2291 defparam HSYNC_COUNT_next_un9_hsync_counterlt9_3.operation_mode="normal";
2292 defparam HSYNC_COUNT_next_un9_hsync_counterlt9_3.output_mode="comb_only";
2293 defparam HSYNC_COUNT_next_un9_hsync_counterlt9_3.lut_mask="7fff";
2294 defparam HSYNC_COUNT_next_un9_hsync_counterlt9_3.synch_mode="off";
2295 defparam HSYNC_COUNT_next_un9_hsync_counterlt9_3.sum_lutc_input="datac";
2297 stratix_lcell HSYNC_FSM_next_un13_hsync_counter_2 (
2298 .combout(un13_hsync_counter_2),
2300 .dataa(hsync_counter_8),
2301 .datab(hsync_counter_9),
2302 .datac(hsync_counter_4),
2303 .datad(hsync_counter_5),
2312 defparam HSYNC_FSM_next_un13_hsync_counter_2.operation_mode="normal";
2313 defparam HSYNC_FSM_next_un13_hsync_counter_2.output_mode="comb_only";
2314 defparam HSYNC_FSM_next_un13_hsync_counter_2.lut_mask="0080";
2315 defparam HSYNC_FSM_next_un13_hsync_counter_2.synch_mode="off";
2316 defparam HSYNC_FSM_next_un13_hsync_counter_2.sum_lutc_input="datac";
2318 stratix_lcell VSYNC_COUNT_next_un9_vsync_counterlt9_6 (
2319 .combout(un9_vsync_counterlt9_6),
2321 .dataa(vsync_counter_2),
2322 .datab(vsync_counter_3),
2323 .datac(vsync_counter_0),
2324 .datad(vsync_counter_1),
2333 defparam VSYNC_COUNT_next_un9_vsync_counterlt9_6.operation_mode="normal";
2334 defparam VSYNC_COUNT_next_un9_vsync_counterlt9_6.output_mode="comb_only";
2335 defparam VSYNC_COUNT_next_un9_vsync_counterlt9_6.lut_mask="7fff";
2336 defparam VSYNC_COUNT_next_un9_vsync_counterlt9_6.synch_mode="off";
2337 defparam VSYNC_COUNT_next_un9_vsync_counterlt9_6.sum_lutc_input="datac";
2339 stratix_lcell VSYNC_COUNT_next_un9_vsync_counterlt9_5 (
2340 .combout(un9_vsync_counterlt9_5),
2342 .dataa(vsync_counter_8),
2343 .datab(vsync_counter_9),
2344 .datac(vsync_counter_6),
2345 .datad(vsync_counter_7),
2354 defparam VSYNC_COUNT_next_un9_vsync_counterlt9_5.operation_mode="normal";
2355 defparam VSYNC_COUNT_next_un9_vsync_counterlt9_5.output_mode="comb_only";
2356 defparam VSYNC_COUNT_next_un9_vsync_counterlt9_5.lut_mask="7fff";
2357 defparam VSYNC_COUNT_next_un9_vsync_counterlt9_5.synch_mode="off";
2358 defparam VSYNC_COUNT_next_un9_vsync_counterlt9_5.sum_lutc_input="datac";
2360 stratix_lcell VSYNC_FSM_next_un13_vsync_counter_3 (
2361 .combout(un13_vsync_counter_3),
2363 .dataa(vsync_counter_6),
2364 .datab(vsync_counter_7),
2365 .datac(vsync_counter_8),
2366 .datad(vsync_counter_9),
2375 defparam VSYNC_FSM_next_un13_vsync_counter_3.operation_mode="normal";
2376 defparam VSYNC_FSM_next_un13_vsync_counter_3.output_mode="comb_only";
2377 defparam VSYNC_FSM_next_un13_vsync_counter_3.lut_mask="0001";
2378 defparam VSYNC_FSM_next_un13_vsync_counter_3.synch_mode="off";
2379 defparam VSYNC_FSM_next_un13_vsync_counter_3.sum_lutc_input="datac";
2381 stratix_lcell VSYNC_FSM_next_un15_vsync_counter_3 (
2382 .combout(un15_vsync_counter_3),
2384 .dataa(vsync_counter_3),
2385 .datab(vsync_counter_9),
2386 .datac(vsync_counter_0),
2387 .datad(vsync_counter_2),
2396 defparam VSYNC_FSM_next_un15_vsync_counter_3.operation_mode="normal";
2397 defparam VSYNC_FSM_next_un15_vsync_counter_3.output_mode="comb_only";
2398 defparam VSYNC_FSM_next_un15_vsync_counter_3.lut_mask="0008";
2399 defparam VSYNC_FSM_next_un15_vsync_counter_3.synch_mode="off";
2400 defparam VSYNC_FSM_next_un15_vsync_counter_3.sum_lutc_input="datac";
2402 stratix_lcell HSYNC_FSM_next_un10_hsync_counter_4 (
2403 .combout(un10_hsync_counter_4),
2405 .dataa(hsync_counter_4),
2406 .datab(hsync_counter_6),
2407 .datac(hsync_counter_1),
2408 .datad(hsync_counter_3),
2417 defparam HSYNC_FSM_next_un10_hsync_counter_4.operation_mode="normal";
2418 defparam HSYNC_FSM_next_un10_hsync_counter_4.output_mode="comb_only";
2419 defparam HSYNC_FSM_next_un10_hsync_counter_4.lut_mask="8000";
2420 defparam HSYNC_FSM_next_un10_hsync_counter_4.synch_mode="off";
2421 defparam HSYNC_FSM_next_un10_hsync_counter_4.sum_lutc_input="datac";
2423 stratix_lcell HSYNC_FSM_next_un10_hsync_counter_3 (
2424 .combout(un10_hsync_counter_3),
2426 .dataa(hsync_counter_0),
2427 .datab(hsync_counter_7),
2428 .datac(hsync_counter_2),
2438 defparam HSYNC_FSM_next_un10_hsync_counter_3.operation_mode="normal";
2439 defparam HSYNC_FSM_next_un10_hsync_counter_3.output_mode="comb_only";
2440 defparam HSYNC_FSM_next_un10_hsync_counter_3.lut_mask="0101";
2441 defparam HSYNC_FSM_next_un10_hsync_counter_3.synch_mode="off";
2442 defparam HSYNC_FSM_next_un10_hsync_counter_3.sum_lutc_input="datac";
2444 stratix_lcell LINE_COUNT_next_un10_line_counter_siglt4_2 (
2445 .combout(un10_line_counter_siglt4_2),
2447 .dataa(line_counter_sig_3),
2448 .datab(line_counter_sig_4),
2449 .datac(line_counter_sig_0),
2459 defparam LINE_COUNT_next_un10_line_counter_siglt4_2.operation_mode="normal";
2460 defparam LINE_COUNT_next_un10_line_counter_siglt4_2.output_mode="comb_only";
2461 defparam LINE_COUNT_next_un10_line_counter_siglt4_2.lut_mask="7f7f";
2462 defparam LINE_COUNT_next_un10_line_counter_siglt4_2.synch_mode="off";
2463 defparam LINE_COUNT_next_un10_line_counter_siglt4_2.sum_lutc_input="datac";
2465 stratix_lcell VSYNC_FSM_next_un12_vsync_counter_6 (
2466 .combout(un12_vsync_counter_6),
2468 .dataa(vsync_counter_7),
2469 .datab(vsync_counter_8),
2470 .datac(vsync_counter_5),
2471 .datad(vsync_counter_6),
2480 defparam VSYNC_FSM_next_un12_vsync_counter_6.operation_mode="normal";
2481 defparam VSYNC_FSM_next_un12_vsync_counter_6.output_mode="comb_only";
2482 defparam VSYNC_FSM_next_un12_vsync_counter_6.lut_mask="0001";
2483 defparam VSYNC_FSM_next_un12_vsync_counter_6.synch_mode="off";
2484 defparam VSYNC_FSM_next_un12_vsync_counter_6.sum_lutc_input="datac";
2486 stratix_lcell VSYNC_FSM_next_un12_vsync_counter_7 (
2487 .combout(un12_vsync_counter_7),
2489 .dataa(vsync_counter_3),
2490 .datab(vsync_counter_4),
2491 .datac(vsync_counter_1),
2492 .datad(vsync_counter_2),
2501 defparam VSYNC_FSM_next_un12_vsync_counter_7.operation_mode="normal";
2502 defparam VSYNC_FSM_next_un12_vsync_counter_7.output_mode="comb_only";
2503 defparam VSYNC_FSM_next_un12_vsync_counter_7.lut_mask="0001";
2504 defparam VSYNC_FSM_next_un12_vsync_counter_7.synch_mode="off";
2505 defparam VSYNC_FSM_next_un12_vsync_counter_7.sum_lutc_input="datac";
2507 stratix_lcell COLUMN_COUNT_next_un10_column_counter_siglt6_1 (
2508 .combout(un10_column_counter_siglt6_1),
2510 .dataa(column_counter_sig_0),
2511 .datab(column_counter_sig_2),
2512 .datac(column_counter_sig_1),
2522 defparam COLUMN_COUNT_next_un10_column_counter_siglt6_1.operation_mode="normal";
2523 defparam COLUMN_COUNT_next_un10_column_counter_siglt6_1.output_mode="comb_only";
2524 defparam COLUMN_COUNT_next_un10_column_counter_siglt6_1.lut_mask="7f7f";
2525 defparam COLUMN_COUNT_next_un10_column_counter_siglt6_1.synch_mode="off";
2526 defparam COLUMN_COUNT_next_un10_column_counter_siglt6_1.sum_lutc_input="datac";
2528 stratix_lcell HSYNC_FSM_next_un13_hsync_counter_7 (
2529 .combout(un13_hsync_counter_7),
2531 .dataa(hsync_counter_2),
2532 .datab(hsync_counter_3),
2533 .datac(hsync_counter_0),
2534 .datad(hsync_counter_1),
2543 defparam HSYNC_FSM_next_un13_hsync_counter_7.operation_mode="normal";
2544 defparam HSYNC_FSM_next_un13_hsync_counter_7.output_mode="comb_only";
2545 defparam HSYNC_FSM_next_un13_hsync_counter_7.lut_mask="8000";
2546 defparam HSYNC_FSM_next_un13_hsync_counter_7.synch_mode="off";
2547 defparam HSYNC_FSM_next_un13_hsync_counter_7.sum_lutc_input="datac";
2549 stratix_lcell HSYNC_FSM_next_un10_hsync_counter_1 (
2550 .combout(un10_hsync_counter_1),
2552 .dataa(hsync_counter_5),
2553 .datab(hsync_counter_8),
2554 .datac(hsync_counter_9),
2564 defparam HSYNC_FSM_next_un10_hsync_counter_1.operation_mode="normal";
2565 defparam HSYNC_FSM_next_un10_hsync_counter_1.output_mode="comb_only";
2566 defparam HSYNC_FSM_next_un10_hsync_counter_1.lut_mask="0101";
2567 defparam HSYNC_FSM_next_un10_hsync_counter_1.synch_mode="off";
2568 defparam HSYNC_FSM_next_un10_hsync_counter_1.sum_lutc_input="datac";
2570 stratix_lcell un1_hsync_state_3_0_cZ (
2571 .combout(un1_hsync_state_3_0),
2573 .dataa(hsync_state_3),
2574 .datab(hsync_state_1),
2585 defparam un1_hsync_state_3_0_cZ.operation_mode="normal";
2586 defparam un1_hsync_state_3_0_cZ.output_mode="comb_only";
2587 defparam un1_hsync_state_3_0_cZ.lut_mask="eeee";
2588 defparam un1_hsync_state_3_0_cZ.synch_mode="off";
2589 defparam un1_hsync_state_3_0_cZ.sum_lutc_input="datac";
2591 stratix_lcell un1_vsync_state_2_0_cZ (
2592 .combout(un1_vsync_state_2_0),
2594 .dataa(vsync_state_3),
2595 .datab(vsync_state_1),
2606 defparam un1_vsync_state_2_0_cZ.operation_mode="normal";
2607 defparam un1_vsync_state_2_0_cZ.output_mode="comb_only";
2608 defparam un1_vsync_state_2_0_cZ.lut_mask="eeee";
2609 defparam un1_vsync_state_2_0_cZ.synch_mode="off";
2610 defparam un1_vsync_state_2_0_cZ.sum_lutc_input="datac";
2612 stratix_lcell d_set_vsync_counter_cZ (
2613 .combout(d_set_vsync_counter),
2615 .dataa(vsync_state_6),
2616 .datab(vsync_state_0),
2627 defparam d_set_vsync_counter_cZ.operation_mode="normal";
2628 defparam d_set_vsync_counter_cZ.output_mode="comb_only";
2629 defparam d_set_vsync_counter_cZ.lut_mask="eeee";
2630 defparam d_set_vsync_counter_cZ.synch_mode="off";
2631 defparam d_set_vsync_counter_cZ.sum_lutc_input="datac";
2633 stratix_lcell COLUMN_COUNT_next_un10_column_counter_siglt6_3 (
2634 .combout(un10_column_counter_siglt6_3),
2636 .dataa(column_counter_sig_6),
2637 .datab(column_counter_sig_5),
2648 defparam COLUMN_COUNT_next_un10_column_counter_siglt6_3.operation_mode="normal";
2649 defparam COLUMN_COUNT_next_un10_column_counter_siglt6_3.output_mode="comb_only";
2650 defparam COLUMN_COUNT_next_un10_column_counter_siglt6_3.lut_mask="7777";
2651 defparam COLUMN_COUNT_next_un10_column_counter_siglt6_3.synch_mode="off";
2652 defparam COLUMN_COUNT_next_un10_column_counter_siglt6_3.sum_lutc_input="datac";
2654 stratix_lcell d_set_hsync_counter_cZ (
2655 .combout(d_set_hsync_counter),
2657 .dataa(hsync_state_6),
2658 .datab(hsync_state_0),
2669 defparam d_set_hsync_counter_cZ.operation_mode="normal";
2670 defparam d_set_hsync_counter_cZ.output_mode="comb_only";
2671 defparam d_set_hsync_counter_cZ.lut_mask="eeee";
2672 defparam d_set_hsync_counter_cZ.synch_mode="off";
2673 defparam d_set_hsync_counter_cZ.sum_lutc_input="datac";
2675 stratix_lcell un1_line_counter_sig_9_ (
2676 .combout(un1_line_counter_sig_combout[9]),
2678 .dataa(line_counter_sig_7),
2679 .datab(line_counter_sig_8),
2686 .cin(un1_line_counter_sig_cout[7]),
2691 defparam un1_line_counter_sig_9_.cin_used="true";
2692 defparam un1_line_counter_sig_9_.operation_mode="normal";
2693 defparam un1_line_counter_sig_9_.output_mode="comb_only";
2694 defparam un1_line_counter_sig_9_.lut_mask="6c6c";
2695 defparam un1_line_counter_sig_9_.synch_mode="off";
2696 defparam un1_line_counter_sig_9_.sum_lutc_input="cin";
2698 stratix_lcell un1_line_counter_sig_8_ (
2699 .combout(un1_line_counter_sig_combout[8]),
2701 .dataa(line_counter_sig_7),
2709 .cin(un1_line_counter_sig_cout[6]),
2714 defparam un1_line_counter_sig_8_.cin_used="true";
2715 defparam un1_line_counter_sig_8_.operation_mode="normal";
2716 defparam un1_line_counter_sig_8_.output_mode="comb_only";
2717 defparam un1_line_counter_sig_8_.lut_mask="5a5a";
2718 defparam un1_line_counter_sig_8_.synch_mode="off";
2719 defparam un1_line_counter_sig_8_.sum_lutc_input="cin";
2721 stratix_lcell un1_line_counter_sig_7_ (
2722 .combout(un1_line_counter_sig_combout[7]),
2723 .cout(un1_line_counter_sig_cout[7]),
2725 .dataa(line_counter_sig_5),
2726 .datab(line_counter_sig_6),
2733 .cin(un1_line_counter_sig_cout[5]),
2738 defparam un1_line_counter_sig_7_.cin_used="true";
2739 defparam un1_line_counter_sig_7_.operation_mode="arithmetic";
2740 defparam un1_line_counter_sig_7_.output_mode="comb_only";
2741 defparam un1_line_counter_sig_7_.lut_mask="6c80";
2742 defparam un1_line_counter_sig_7_.synch_mode="off";
2743 defparam un1_line_counter_sig_7_.sum_lutc_input="cin";
2745 stratix_lcell un1_line_counter_sig_6_ (
2746 .combout(un1_line_counter_sig_combout[6]),
2747 .cout(un1_line_counter_sig_cout[6]),
2749 .dataa(line_counter_sig_5),
2750 .datab(line_counter_sig_6),
2757 .cin(un1_line_counter_sig_cout[4]),
2762 defparam un1_line_counter_sig_6_.cin_used="true";
2763 defparam un1_line_counter_sig_6_.operation_mode="arithmetic";
2764 defparam un1_line_counter_sig_6_.output_mode="comb_only";
2765 defparam un1_line_counter_sig_6_.lut_mask="5a80";
2766 defparam un1_line_counter_sig_6_.synch_mode="off";
2767 defparam un1_line_counter_sig_6_.sum_lutc_input="cin";
2769 stratix_lcell un1_line_counter_sig_5_ (
2770 .combout(un1_line_counter_sig_combout[5]),
2771 .cout(un1_line_counter_sig_cout[5]),
2773 .dataa(line_counter_sig_3),
2774 .datab(line_counter_sig_4),
2781 .cin(un1_line_counter_sig_cout[3]),
2786 defparam un1_line_counter_sig_5_.cin_used="true";
2787 defparam un1_line_counter_sig_5_.operation_mode="arithmetic";
2788 defparam un1_line_counter_sig_5_.output_mode="comb_only";
2789 defparam un1_line_counter_sig_5_.lut_mask="6c80";
2790 defparam un1_line_counter_sig_5_.synch_mode="off";
2791 defparam un1_line_counter_sig_5_.sum_lutc_input="cin";
2793 stratix_lcell un1_line_counter_sig_4_ (
2794 .combout(un1_line_counter_sig_combout[4]),
2795 .cout(un1_line_counter_sig_cout[4]),
2797 .dataa(line_counter_sig_3),
2798 .datab(line_counter_sig_4),
2805 .cin(un1_line_counter_sig_cout[2]),
2810 defparam un1_line_counter_sig_4_.cin_used="true";
2811 defparam un1_line_counter_sig_4_.operation_mode="arithmetic";
2812 defparam un1_line_counter_sig_4_.output_mode="comb_only";
2813 defparam un1_line_counter_sig_4_.lut_mask="5a80";
2814 defparam un1_line_counter_sig_4_.synch_mode="off";
2815 defparam un1_line_counter_sig_4_.sum_lutc_input="cin";
2817 stratix_lcell un1_line_counter_sig_3_ (
2818 .combout(un1_line_counter_sig_combout[3]),
2819 .cout(un1_line_counter_sig_cout[3]),
2821 .dataa(line_counter_sig_1),
2822 .datab(line_counter_sig_2),
2829 .cin(un1_line_counter_sig_cout[1]),
2834 defparam un1_line_counter_sig_3_.cin_used="true";
2835 defparam un1_line_counter_sig_3_.operation_mode="arithmetic";
2836 defparam un1_line_counter_sig_3_.output_mode="comb_only";
2837 defparam un1_line_counter_sig_3_.lut_mask="6c80";
2838 defparam un1_line_counter_sig_3_.synch_mode="off";
2839 defparam un1_line_counter_sig_3_.sum_lutc_input="cin";
2841 stratix_lcell un1_line_counter_sig_2_ (
2842 .combout(un1_line_counter_sig_combout[2]),
2843 .cout(un1_line_counter_sig_cout[2]),
2845 .dataa(line_counter_sig_1),
2846 .datab(line_counter_sig_2),
2853 .cin(un1_line_counter_sig_a_cout[1]),
2858 defparam un1_line_counter_sig_2_.cin_used="true";
2859 defparam un1_line_counter_sig_2_.operation_mode="arithmetic";
2860 defparam un1_line_counter_sig_2_.output_mode="comb_only";
2861 defparam un1_line_counter_sig_2_.lut_mask="5a80";
2862 defparam un1_line_counter_sig_2_.synch_mode="off";
2863 defparam un1_line_counter_sig_2_.sum_lutc_input="cin";
2865 stratix_lcell un1_line_counter_sig_a_1_ (
2866 .cout(un1_line_counter_sig_a_cout[1]),
2868 .dataa(d_set_hsync_counter),
2869 .datab(line_counter_sig_0),
2880 defparam un1_line_counter_sig_a_1_.operation_mode="arithmetic";
2881 defparam un1_line_counter_sig_a_1_.output_mode="comb_only";
2882 defparam un1_line_counter_sig_a_1_.lut_mask="0088";
2883 defparam un1_line_counter_sig_a_1_.synch_mode="off";
2884 defparam un1_line_counter_sig_a_1_.sum_lutc_input="datac";
2886 stratix_lcell un1_line_counter_sig_1_ (
2887 .combout(un1_line_counter_sig_combout[1]),
2888 .cout(un1_line_counter_sig_cout[1]),
2890 .dataa(d_set_hsync_counter),
2891 .datab(line_counter_sig_0),
2902 defparam un1_line_counter_sig_1_.operation_mode="arithmetic";
2903 defparam un1_line_counter_sig_1_.output_mode="comb_only";
2904 defparam un1_line_counter_sig_1_.lut_mask="6688";
2905 defparam un1_line_counter_sig_1_.synch_mode="off";
2906 defparam un1_line_counter_sig_1_.sum_lutc_input="datac";
2908 stratix_lcell un2_column_counter_next_9_ (
2909 .combout(un2_column_counter_next_combout[9]),
2911 .dataa(column_counter_sig_8),
2912 .datab(column_counter_sig_9),
2919 .cin(un2_column_counter_next_cout[7]),
2924 defparam un2_column_counter_next_9_.cin_used="true";
2925 defparam un2_column_counter_next_9_.operation_mode="normal";
2926 defparam un2_column_counter_next_9_.output_mode="comb_only";
2927 defparam un2_column_counter_next_9_.lut_mask="6c6c";
2928 defparam un2_column_counter_next_9_.synch_mode="off";
2929 defparam un2_column_counter_next_9_.sum_lutc_input="cin";
2931 stratix_lcell un2_column_counter_next_8_ (
2932 .combout(un2_column_counter_next_combout[8]),
2934 .dataa(column_counter_sig_8),
2942 .cin(un2_column_counter_next_cout[6]),
2947 defparam un2_column_counter_next_8_.cin_used="true";
2948 defparam un2_column_counter_next_8_.operation_mode="normal";
2949 defparam un2_column_counter_next_8_.output_mode="comb_only";
2950 defparam un2_column_counter_next_8_.lut_mask="5a5a";
2951 defparam un2_column_counter_next_8_.synch_mode="off";
2952 defparam un2_column_counter_next_8_.sum_lutc_input="cin";
2954 stratix_lcell un2_column_counter_next_7_ (
2955 .combout(un2_column_counter_next_combout[7]),
2956 .cout(un2_column_counter_next_cout[7]),
2958 .dataa(column_counter_sig_6),
2959 .datab(column_counter_sig_7),
2966 .cin(un2_column_counter_next_cout[5]),
2971 defparam un2_column_counter_next_7_.cin_used="true";
2972 defparam un2_column_counter_next_7_.operation_mode="arithmetic";
2973 defparam un2_column_counter_next_7_.output_mode="comb_only";
2974 defparam un2_column_counter_next_7_.lut_mask="6c80";
2975 defparam un2_column_counter_next_7_.synch_mode="off";
2976 defparam un2_column_counter_next_7_.sum_lutc_input="cin";
2978 stratix_lcell un2_column_counter_next_6_ (
2979 .combout(un2_column_counter_next_combout[6]),
2980 .cout(un2_column_counter_next_cout[6]),
2982 .dataa(column_counter_sig_6),
2983 .datab(column_counter_sig_7),
2990 .cin(un2_column_counter_next_cout[4]),
2995 defparam un2_column_counter_next_6_.cin_used="true";
2996 defparam un2_column_counter_next_6_.operation_mode="arithmetic";
2997 defparam un2_column_counter_next_6_.output_mode="comb_only";
2998 defparam un2_column_counter_next_6_.lut_mask="5a80";
2999 defparam un2_column_counter_next_6_.synch_mode="off";
3000 defparam un2_column_counter_next_6_.sum_lutc_input="cin";
3002 stratix_lcell un2_column_counter_next_5_ (
3003 .combout(un2_column_counter_next_combout[5]),
3004 .cout(un2_column_counter_next_cout[5]),
3006 .dataa(column_counter_sig_4),
3007 .datab(column_counter_sig_5),
3014 .cin(un2_column_counter_next_cout[3]),
3019 defparam un2_column_counter_next_5_.cin_used="true";
3020 defparam un2_column_counter_next_5_.operation_mode="arithmetic";
3021 defparam un2_column_counter_next_5_.output_mode="comb_only";
3022 defparam un2_column_counter_next_5_.lut_mask="6c80";
3023 defparam un2_column_counter_next_5_.synch_mode="off";
3024 defparam un2_column_counter_next_5_.sum_lutc_input="cin";
3026 stratix_lcell un2_column_counter_next_4_ (
3027 .combout(un2_column_counter_next_combout[4]),
3028 .cout(un2_column_counter_next_cout[4]),
3030 .dataa(column_counter_sig_4),
3031 .datab(column_counter_sig_5),
3038 .cin(un2_column_counter_next_cout[2]),
3043 defparam un2_column_counter_next_4_.cin_used="true";
3044 defparam un2_column_counter_next_4_.operation_mode="arithmetic";
3045 defparam un2_column_counter_next_4_.output_mode="comb_only";
3046 defparam un2_column_counter_next_4_.lut_mask="5a80";
3047 defparam un2_column_counter_next_4_.synch_mode="off";
3048 defparam un2_column_counter_next_4_.sum_lutc_input="cin";
3050 stratix_lcell un2_column_counter_next_3_ (
3051 .combout(un2_column_counter_next_combout[3]),
3052 .cout(un2_column_counter_next_cout[3]),
3054 .dataa(column_counter_sig_2),
3055 .datab(column_counter_sig_3),
3062 .cin(un2_column_counter_next_cout[1]),
3067 defparam un2_column_counter_next_3_.cin_used="true";
3068 defparam un2_column_counter_next_3_.operation_mode="arithmetic";
3069 defparam un2_column_counter_next_3_.output_mode="comb_only";
3070 defparam un2_column_counter_next_3_.lut_mask="6c80";
3071 defparam un2_column_counter_next_3_.synch_mode="off";
3072 defparam un2_column_counter_next_3_.sum_lutc_input="cin";
3074 stratix_lcell un2_column_counter_next_2_ (
3075 .combout(un2_column_counter_next_combout[2]),
3076 .cout(un2_column_counter_next_cout[2]),
3078 .dataa(column_counter_sig_2),
3079 .datab(column_counter_sig_3),
3086 .cin(un2_column_counter_next_cout[0]),
3091 defparam un2_column_counter_next_2_.cin_used="true";
3092 defparam un2_column_counter_next_2_.operation_mode="arithmetic";
3093 defparam un2_column_counter_next_2_.output_mode="comb_only";
3094 defparam un2_column_counter_next_2_.lut_mask="5a80";
3095 defparam un2_column_counter_next_2_.synch_mode="off";
3096 defparam un2_column_counter_next_2_.sum_lutc_input="cin";
3098 stratix_lcell un2_column_counter_next_1_ (
3099 .combout(un2_column_counter_next_combout[1]),
3100 .cout(un2_column_counter_next_cout[1]),
3102 .dataa(column_counter_sig_0),
3103 .datab(column_counter_sig_1),
3114 defparam un2_column_counter_next_1_.operation_mode="arithmetic";
3115 defparam un2_column_counter_next_1_.output_mode="comb_only";
3116 defparam un2_column_counter_next_1_.lut_mask="6688";
3117 defparam un2_column_counter_next_1_.synch_mode="off";
3118 defparam un2_column_counter_next_1_.sum_lutc_input="datac";
3120 stratix_lcell un2_column_counter_next_0_ (
3121 .cout(un2_column_counter_next_cout[0]),
3123 .dataa(column_counter_sig_0),
3124 .datab(column_counter_sig_1),
3135 defparam un2_column_counter_next_0_.operation_mode="arithmetic";
3136 defparam un2_column_counter_next_0_.output_mode="comb_only";
3137 defparam un2_column_counter_next_0_.lut_mask="5588";
3138 defparam un2_column_counter_next_0_.synch_mode="off";
3139 defparam un2_column_counter_next_0_.sum_lutc_input="datac";
3140 assign line_counter_next_0_sqmuxa_1_1_i = ~ line_counter_next_0_sqmuxa_1_1;
3141 assign column_counter_next_0_sqmuxa_1_1_i = ~ column_counter_next_0_sqmuxa_1_1;
3142 assign un9_vsync_counterlt9_i = ~ un9_vsync_counterlt9;
3143 assign G_16_i_i = ~ G_16_i;
3144 assign un9_hsync_counterlt9_i = ~ un9_hsync_counterlt9;
3145 assign G_2_i_i = ~ G_2_i;
3146 endmodule /* vga_driver */
3149 module vga_control (
3150 column_counter_sig_1,
3151 column_counter_sig_7,
3152 column_counter_sig_2,
3153 column_counter_sig_0,
3154 column_counter_sig_4,
3155 column_counter_sig_3,
3156 column_counter_sig_5,
3157 column_counter_sig_6,
3160 un10_column_counter_siglt6_1,
3162 un10_column_counter_siglt6_3,
3164 un6_dly_counter_0_x,
3169 input column_counter_sig_1 ;
3170 input column_counter_sig_7 ;
3171 input column_counter_sig_2 ;
3172 input column_counter_sig_0 ;
3173 input column_counter_sig_4 ;
3174 input column_counter_sig_3 ;
3175 input column_counter_sig_5 ;
3176 input column_counter_sig_6 ;
3177 input h_enable_sig ;
3178 input v_enable_sig ;
3179 input un10_column_counter_siglt6_1 ;
3181 input un10_column_counter_siglt6_3 ;
3183 input un6_dly_counter_0_x ;
3186 wire column_counter_sig_1 ;
3187 wire column_counter_sig_7 ;
3188 wire column_counter_sig_2 ;
3189 wire column_counter_sig_0 ;
3190 wire column_counter_sig_4 ;
3191 wire column_counter_sig_3 ;
3192 wire column_counter_sig_5 ;
3193 wire column_counter_sig_6 ;
3196 wire un10_column_counter_siglt6_1 ;
3198 wire un10_column_counter_siglt6_3 ;
3200 wire un6_dly_counter_0_x ;
3203 wire b_next_i_o3_0 ;
3204 wire b_next_i_a7_1 ;
3208 wire N_23_i_0_g0_a ;
3218 .dataa(column_counter_sig_6),
3219 .datab(b_next_i_o3_0),
3220 .datac(b_next_i_a7_1),
3221 .datad(N_6_i_0_g0_0),
3222 .aclr(un6_dly_counter_0_x),
3230 defparam b_Z.operation_mode="normal";
3231 defparam b_Z.output_mode="reg_only";
3232 defparam b_Z.lut_mask="0700";
3233 defparam b_Z.synch_mode="off";
3234 defparam b_Z.sum_lutc_input="datac";
3239 .dataa(column_counter_sig_6),
3240 .datab(un10_column_counter_siglt6_3),
3241 .datac(b_next_i_o3_0),
3242 .datad(N_4_i_0_g0_1),
3243 .aclr(un6_dly_counter_0_x),
3251 defparam r_Z.operation_mode="normal";
3252 defparam r_Z.output_mode="reg_only";
3253 defparam r_Z.lut_mask="1b00";
3254 defparam r_Z.synch_mode="off";
3255 defparam r_Z.sum_lutc_input="datac";
3260 .dataa(column_counter_sig_6),
3261 .datab(column_counter_sig_5),
3262 .datac(r_next_i_o7),
3263 .datad(N_23_i_0_g0_a),
3264 .aclr(un6_dly_counter_0_x),
3272 defparam g_Z.operation_mode="normal";
3273 defparam g_Z.output_mode="reg_only";
3274 defparam g_Z.lut_mask="0400";
3275 defparam g_Z.synch_mode="off";
3276 defparam g_Z.sum_lutc_input="datac";
3277 stratix_lcell N_23_i_0_g0_a_cZ (
3278 .combout(N_23_i_0_g0_a),
3280 .dataa(column_counter_sig_3),
3281 .datab(column_counter_sig_4),
3282 .datac(g_next_i_o3),
3283 .datad(un10_column_counter_siglt6_1),
3292 defparam N_23_i_0_g0_a_cZ.operation_mode="normal";
3293 defparam N_23_i_0_g0_a_cZ.output_mode="comb_only";
3294 defparam N_23_i_0_g0_a_cZ.lut_mask="6c6e";
3295 defparam N_23_i_0_g0_a_cZ.synch_mode="off";
3296 defparam N_23_i_0_g0_a_cZ.sum_lutc_input="datac";
3297 stratix_lcell N_4_i_0_g0_1_cZ (
3298 .combout(N_4_i_0_g0_1),
3300 .dataa(column_counter_sig_5),
3301 .datab(column_counter_sig_6),
3302 .datac(g_next_i_o3),
3303 .datad(r_next_i_o7),
3312 defparam N_4_i_0_g0_1_cZ.operation_mode="normal";
3313 defparam N_4_i_0_g0_1_cZ.output_mode="comb_only";
3314 defparam N_4_i_0_g0_1_cZ.lut_mask="00ec";
3315 defparam N_4_i_0_g0_1_cZ.synch_mode="off";
3316 defparam N_4_i_0_g0_1_cZ.sum_lutc_input="datac";
3317 stratix_lcell N_6_i_0_g0_0_cZ (
3318 .combout(N_6_i_0_g0_0),
3320 .dataa(column_counter_sig_5),
3321 .datab(column_counter_sig_6),
3322 .datac(un10_column_counter_siglt6_3),
3323 .datad(r_next_i_o7),
3332 defparam N_6_i_0_g0_0_cZ.operation_mode="normal";
3333 defparam N_6_i_0_g0_0_cZ.output_mode="comb_only";
3334 defparam N_6_i_0_g0_0_cZ.lut_mask="00ef";
3335 defparam N_6_i_0_g0_0_cZ.synch_mode="off";
3336 defparam N_6_i_0_g0_0_cZ.sum_lutc_input="datac";
3338 stratix_lcell b_next_i_a7_1_cZ (
3339 .combout(b_next_i_a7_1),
3341 .dataa(column_counter_sig_5),
3342 .datab(column_counter_sig_6),
3343 .datac(column_counter_sig_0),
3344 .datad(g_next_i_o3),
3353 defparam b_next_i_a7_1_cZ.operation_mode="normal";
3354 defparam b_next_i_a7_1_cZ.output_mode="comb_only";
3355 defparam b_next_i_a7_1_cZ.lut_mask="0001";
3356 defparam b_next_i_a7_1_cZ.synch_mode="off";
3357 defparam b_next_i_a7_1_cZ.sum_lutc_input="datac";
3359 stratix_lcell b_next_i_o3_0_cZ (
3360 .combout(b_next_i_o3_0),
3362 .dataa(column_counter_sig_3),
3363 .datab(column_counter_sig_4),
3364 .datac(column_counter_sig_2),
3365 .datad(column_counter_sig_5),
3374 defparam b_next_i_o3_0_cZ.operation_mode="normal";
3375 defparam b_next_i_o3_0_cZ.output_mode="comb_only";
3376 defparam b_next_i_o3_0_cZ.lut_mask="ff80";
3377 defparam b_next_i_o3_0_cZ.synch_mode="off";
3378 defparam b_next_i_o3_0_cZ.sum_lutc_input="datac";
3380 stratix_lcell r_next_i_o7_cZ (
3381 .combout(r_next_i_o7),
3383 .dataa(column_counter_sig_7),
3384 .datab(v_enable_sig),
3385 .datac(h_enable_sig),
3395 defparam r_next_i_o7_cZ.operation_mode="normal";
3396 defparam r_next_i_o7_cZ.output_mode="comb_only";
3397 defparam r_next_i_o7_cZ.lut_mask="bfbf";
3398 defparam r_next_i_o7_cZ.synch_mode="off";
3399 defparam r_next_i_o7_cZ.sum_lutc_input="datac";
3401 stratix_lcell g_next_i_o3_cZ (
3402 .combout(g_next_i_o3),
3404 .dataa(column_counter_sig_2),
3405 .datab(column_counter_sig_1),
3416 defparam g_next_i_o3_cZ.operation_mode="normal";
3417 defparam g_next_i_o3_cZ.output_mode="comb_only";
3418 defparam g_next_i_o3_cZ.lut_mask="eeee";
3419 defparam g_next_i_o3_cZ.synch_mode="off";
3420 defparam g_next_i_o3_cZ.sum_lutc_input="datac";
3421 endmodule /* vga_control */
3442 d_set_column_counter,
3446 d_set_hsync_counter,
3447 d_set_vsync_counter,
3470 output [13:0] seven_seg_pin ;
3473 output [9:0] d_column_counter ;
3474 output [8:0] d_line_counter ;
3475 output d_set_column_counter ;
3476 output d_set_line_counter ;
3477 output [9:0] d_hsync_counter ;
3478 output [9:0] d_vsync_counter ;
3479 output d_set_hsync_counter ;
3480 output d_set_vsync_counter ;
3486 output [0:6] d_hsync_state ;
3487 output [0:6] d_vsync_state ;
3488 output d_state_clk ;
3503 wire d_set_column_counter ;
3504 wire d_set_line_counter ;
3505 wire d_set_hsync_counter ;
3506 wire d_set_vsync_counter ;
3513 wire [1:0] dly_counter;
3514 wire [9:0] vga_driver_unit_column_counter_sig;
3515 wire [8:0] vga_driver_unit_line_counter_sig;
3516 wire [9:0] vga_driver_unit_hsync_counter;
3517 wire [9:0] vga_driver_unit_vsync_counter;
3518 wire [6:0] vga_driver_unit_hsync_state;
3519 wire [6:0] vga_driver_unit_vsync_state;
3522 wire vga_driver_unit_COLUMN_COUNT_next_un10_column_counter_siglt6_1 ;
3523 wire vga_driver_unit_COLUMN_COUNT_next_un10_column_counter_siglt6_3 ;
3524 wire DELAY_RESET_next_un6_dly_counter_0_x ;
3525 wire vga_driver_unit_h_sync ;
3526 wire vga_driver_unit_v_sync ;
3527 wire vga_driver_unit_d_set_hsync_counter ;
3528 wire vga_driver_unit_d_set_vsync_counter ;
3529 wire vga_driver_unit_h_enable_sig ;
3530 wire vga_driver_unit_v_enable_sig ;
3531 wire vga_control_unit_r ;
3532 wire vga_control_unit_g ;
3533 wire vga_control_unit_b ;
3541 stratix_lcell dly_counter_1_ (
3542 .regout(dly_counter[1]),
3544 .dataa(reset_pin_c),
3545 .datab(dly_counter[0]),
3546 .datac(dly_counter[1]),
3556 defparam dly_counter_1_.operation_mode="normal";
3557 defparam dly_counter_1_.output_mode="reg_only";
3558 defparam dly_counter_1_.lut_mask="a8a8";
3559 defparam dly_counter_1_.synch_mode="off";
3560 defparam dly_counter_1_.sum_lutc_input="datac";
3562 stratix_lcell dly_counter_0_ (
3563 .regout(dly_counter[0]),
3565 .dataa(reset_pin_c),
3566 .datab(dly_counter[0]),
3567 .datac(dly_counter[1]),
3577 defparam dly_counter_0_.operation_mode="normal";
3578 defparam dly_counter_0_.output_mode="reg_only";
3579 defparam dly_counter_0_.lut_mask="a2a2";
3580 defparam dly_counter_0_.synch_mode="off";
3581 defparam dly_counter_0_.sum_lutc_input="datac";
3583 stratix_io reset_pin_in (
3585 .combout(reset_pin_c),
3595 defparam reset_pin_in.operation_mode = "input";
3597 stratix_io clk_pin_in (
3609 defparam clk_pin_in.operation_mode = "input";
3611 stratix_io d_state_clk_out (
3612 .padio(d_state_clk),
3622 defparam d_state_clk_out.operation_mode = "output";
3624 stratix_io d_vsync_state_out_0_ (
3625 .padio(d_vsync_state[0]),
3626 .datain(vga_driver_unit_vsync_state[0]),
3635 defparam d_vsync_state_out_0_.operation_mode = "output";
3637 stratix_io d_vsync_state_out_1_ (
3638 .padio(d_vsync_state[1]),
3639 .datain(vga_driver_unit_vsync_state[1]),
3648 defparam d_vsync_state_out_1_.operation_mode = "output";
3650 stratix_io d_vsync_state_out_2_ (
3651 .padio(d_vsync_state[2]),
3652 .datain(vga_driver_unit_vsync_state[2]),
3661 defparam d_vsync_state_out_2_.operation_mode = "output";
3663 stratix_io d_vsync_state_out_3_ (
3664 .padio(d_vsync_state[3]),
3665 .datain(vga_driver_unit_vsync_state[3]),
3674 defparam d_vsync_state_out_3_.operation_mode = "output";
3676 stratix_io d_vsync_state_out_4_ (
3677 .padio(d_vsync_state[4]),
3678 .datain(vga_driver_unit_vsync_state[4]),
3687 defparam d_vsync_state_out_4_.operation_mode = "output";
3689 stratix_io d_vsync_state_out_5_ (
3690 .padio(d_vsync_state[5]),
3691 .datain(vga_driver_unit_vsync_state[5]),
3700 defparam d_vsync_state_out_5_.operation_mode = "output";
3702 stratix_io d_vsync_state_out_6_ (
3703 .padio(d_vsync_state[6]),
3704 .datain(vga_driver_unit_vsync_state[6]),
3713 defparam d_vsync_state_out_6_.operation_mode = "output";
3715 stratix_io d_hsync_state_out_0_ (
3716 .padio(d_hsync_state[0]),
3717 .datain(vga_driver_unit_hsync_state[0]),
3726 defparam d_hsync_state_out_0_.operation_mode = "output";
3728 stratix_io d_hsync_state_out_1_ (
3729 .padio(d_hsync_state[1]),
3730 .datain(vga_driver_unit_hsync_state[1]),
3739 defparam d_hsync_state_out_1_.operation_mode = "output";
3741 stratix_io d_hsync_state_out_2_ (
3742 .padio(d_hsync_state[2]),
3743 .datain(vga_driver_unit_hsync_state[2]),
3752 defparam d_hsync_state_out_2_.operation_mode = "output";
3754 stratix_io d_hsync_state_out_3_ (
3755 .padio(d_hsync_state[3]),
3756 .datain(vga_driver_unit_hsync_state[3]),
3765 defparam d_hsync_state_out_3_.operation_mode = "output";
3767 stratix_io d_hsync_state_out_4_ (
3768 .padio(d_hsync_state[4]),
3769 .datain(vga_driver_unit_hsync_state[4]),
3778 defparam d_hsync_state_out_4_.operation_mode = "output";
3780 stratix_io d_hsync_state_out_5_ (
3781 .padio(d_hsync_state[5]),
3782 .datain(vga_driver_unit_hsync_state[5]),
3791 defparam d_hsync_state_out_5_.operation_mode = "output";
3793 stratix_io d_hsync_state_out_6_ (
3794 .padio(d_hsync_state[6]),
3795 .datain(vga_driver_unit_hsync_state[6]),
3804 defparam d_hsync_state_out_6_.operation_mode = "output";
3806 stratix_io d_b_out (
3808 .datain(vga_control_unit_b),
3817 defparam d_b_out.operation_mode = "output";
3819 stratix_io d_g_out (
3821 .datain(vga_control_unit_g),
3830 defparam d_g_out.operation_mode = "output";
3832 stratix_io d_r_out (
3834 .datain(vga_control_unit_r),
3843 defparam d_r_out.operation_mode = "output";
3845 stratix_io d_v_enable_out (
3847 .datain(vga_driver_unit_v_enable_sig),
3856 defparam d_v_enable_out.operation_mode = "output";
3858 stratix_io d_h_enable_out (
3860 .datain(vga_driver_unit_h_enable_sig),
3869 defparam d_h_enable_out.operation_mode = "output";
3871 stratix_io d_set_vsync_counter_out (
3872 .padio(d_set_vsync_counter),
3873 .datain(vga_driver_unit_d_set_vsync_counter),
3882 defparam d_set_vsync_counter_out.operation_mode = "output";
3884 stratix_io d_set_hsync_counter_out (
3885 .padio(d_set_hsync_counter),
3886 .datain(vga_driver_unit_d_set_hsync_counter),
3895 defparam d_set_hsync_counter_out.operation_mode = "output";
3897 stratix_io d_vsync_counter_out_9_ (
3898 .padio(d_vsync_counter[9]),
3899 .datain(vga_driver_unit_vsync_counter[9]),
3908 defparam d_vsync_counter_out_9_.operation_mode = "output";
3910 stratix_io d_vsync_counter_out_8_ (
3911 .padio(d_vsync_counter[8]),
3912 .datain(vga_driver_unit_vsync_counter[8]),
3921 defparam d_vsync_counter_out_8_.operation_mode = "output";
3923 stratix_io d_vsync_counter_out_7_ (
3924 .padio(d_vsync_counter[7]),
3925 .datain(vga_driver_unit_vsync_counter[7]),
3934 defparam d_vsync_counter_out_7_.operation_mode = "output";
3936 stratix_io d_vsync_counter_out_6_ (
3937 .padio(d_vsync_counter[6]),
3938 .datain(vga_driver_unit_vsync_counter[6]),
3947 defparam d_vsync_counter_out_6_.operation_mode = "output";
3949 stratix_io d_vsync_counter_out_5_ (
3950 .padio(d_vsync_counter[5]),
3951 .datain(vga_driver_unit_vsync_counter[5]),
3960 defparam d_vsync_counter_out_5_.operation_mode = "output";
3962 stratix_io d_vsync_counter_out_4_ (
3963 .padio(d_vsync_counter[4]),
3964 .datain(vga_driver_unit_vsync_counter[4]),
3973 defparam d_vsync_counter_out_4_.operation_mode = "output";
3975 stratix_io d_vsync_counter_out_3_ (
3976 .padio(d_vsync_counter[3]),
3977 .datain(vga_driver_unit_vsync_counter[3]),
3986 defparam d_vsync_counter_out_3_.operation_mode = "output";
3988 stratix_io d_vsync_counter_out_2_ (
3989 .padio(d_vsync_counter[2]),
3990 .datain(vga_driver_unit_vsync_counter[2]),
3999 defparam d_vsync_counter_out_2_.operation_mode = "output";
4001 stratix_io d_vsync_counter_out_1_ (
4002 .padio(d_vsync_counter[1]),
4003 .datain(vga_driver_unit_vsync_counter[1]),
4012 defparam d_vsync_counter_out_1_.operation_mode = "output";
4014 stratix_io d_vsync_counter_out_0_ (
4015 .padio(d_vsync_counter[0]),
4016 .datain(vga_driver_unit_vsync_counter[0]),
4025 defparam d_vsync_counter_out_0_.operation_mode = "output";
4027 stratix_io d_hsync_counter_out_9_ (
4028 .padio(d_hsync_counter[9]),
4029 .datain(vga_driver_unit_hsync_counter[9]),
4038 defparam d_hsync_counter_out_9_.operation_mode = "output";
4040 stratix_io d_hsync_counter_out_8_ (
4041 .padio(d_hsync_counter[8]),
4042 .datain(vga_driver_unit_hsync_counter[8]),
4051 defparam d_hsync_counter_out_8_.operation_mode = "output";
4053 stratix_io d_hsync_counter_out_7_ (
4054 .padio(d_hsync_counter[7]),
4055 .datain(vga_driver_unit_hsync_counter[7]),
4064 defparam d_hsync_counter_out_7_.operation_mode = "output";
4066 stratix_io d_hsync_counter_out_6_ (
4067 .padio(d_hsync_counter[6]),
4068 .datain(vga_driver_unit_hsync_counter[6]),
4077 defparam d_hsync_counter_out_6_.operation_mode = "output";
4079 stratix_io d_hsync_counter_out_5_ (
4080 .padio(d_hsync_counter[5]),
4081 .datain(vga_driver_unit_hsync_counter[5]),
4090 defparam d_hsync_counter_out_5_.operation_mode = "output";
4092 stratix_io d_hsync_counter_out_4_ (
4093 .padio(d_hsync_counter[4]),
4094 .datain(vga_driver_unit_hsync_counter[4]),
4103 defparam d_hsync_counter_out_4_.operation_mode = "output";
4105 stratix_io d_hsync_counter_out_3_ (
4106 .padio(d_hsync_counter[3]),
4107 .datain(vga_driver_unit_hsync_counter[3]),
4116 defparam d_hsync_counter_out_3_.operation_mode = "output";
4118 stratix_io d_hsync_counter_out_2_ (
4119 .padio(d_hsync_counter[2]),
4120 .datain(vga_driver_unit_hsync_counter[2]),
4129 defparam d_hsync_counter_out_2_.operation_mode = "output";
4131 stratix_io d_hsync_counter_out_1_ (
4132 .padio(d_hsync_counter[1]),
4133 .datain(vga_driver_unit_hsync_counter[1]),
4142 defparam d_hsync_counter_out_1_.operation_mode = "output";
4144 stratix_io d_hsync_counter_out_0_ (
4145 .padio(d_hsync_counter[0]),
4146 .datain(vga_driver_unit_hsync_counter[0]),
4155 defparam d_hsync_counter_out_0_.operation_mode = "output";
4157 stratix_io d_set_line_counter_out (
4158 .padio(d_set_line_counter),
4159 .datain(vga_driver_unit_vsync_state[1]),
4168 defparam d_set_line_counter_out.operation_mode = "output";
4170 stratix_io d_set_column_counter_out (
4171 .padio(d_set_column_counter),
4172 .datain(vga_driver_unit_hsync_state[1]),
4181 defparam d_set_column_counter_out.operation_mode = "output";
4183 stratix_io d_line_counter_out_8_ (
4184 .padio(d_line_counter[8]),
4185 .datain(vga_driver_unit_line_counter_sig[8]),
4194 defparam d_line_counter_out_8_.operation_mode = "output";
4196 stratix_io d_line_counter_out_7_ (
4197 .padio(d_line_counter[7]),
4198 .datain(vga_driver_unit_line_counter_sig[7]),
4207 defparam d_line_counter_out_7_.operation_mode = "output";
4209 stratix_io d_line_counter_out_6_ (
4210 .padio(d_line_counter[6]),
4211 .datain(vga_driver_unit_line_counter_sig[6]),
4220 defparam d_line_counter_out_6_.operation_mode = "output";
4222 stratix_io d_line_counter_out_5_ (
4223 .padio(d_line_counter[5]),
4224 .datain(vga_driver_unit_line_counter_sig[5]),
4233 defparam d_line_counter_out_5_.operation_mode = "output";
4235 stratix_io d_line_counter_out_4_ (
4236 .padio(d_line_counter[4]),
4237 .datain(vga_driver_unit_line_counter_sig[4]),
4246 defparam d_line_counter_out_4_.operation_mode = "output";
4248 stratix_io d_line_counter_out_3_ (
4249 .padio(d_line_counter[3]),
4250 .datain(vga_driver_unit_line_counter_sig[3]),
4259 defparam d_line_counter_out_3_.operation_mode = "output";
4261 stratix_io d_line_counter_out_2_ (
4262 .padio(d_line_counter[2]),
4263 .datain(vga_driver_unit_line_counter_sig[2]),
4272 defparam d_line_counter_out_2_.operation_mode = "output";
4274 stratix_io d_line_counter_out_1_ (
4275 .padio(d_line_counter[1]),
4276 .datain(vga_driver_unit_line_counter_sig[1]),
4285 defparam d_line_counter_out_1_.operation_mode = "output";
4287 stratix_io d_line_counter_out_0_ (
4288 .padio(d_line_counter[0]),
4289 .datain(vga_driver_unit_line_counter_sig[0]),
4298 defparam d_line_counter_out_0_.operation_mode = "output";
4300 stratix_io d_column_counter_out_9_ (
4301 .padio(d_column_counter[9]),
4302 .datain(vga_driver_unit_column_counter_sig[9]),
4311 defparam d_column_counter_out_9_.operation_mode = "output";
4313 stratix_io d_column_counter_out_8_ (
4314 .padio(d_column_counter[8]),
4315 .datain(vga_driver_unit_column_counter_sig[8]),
4324 defparam d_column_counter_out_8_.operation_mode = "output";
4326 stratix_io d_column_counter_out_7_ (
4327 .padio(d_column_counter[7]),
4328 .datain(vga_driver_unit_column_counter_sig[7]),
4337 defparam d_column_counter_out_7_.operation_mode = "output";
4339 stratix_io d_column_counter_out_6_ (
4340 .padio(d_column_counter[6]),
4341 .datain(vga_driver_unit_column_counter_sig[6]),
4350 defparam d_column_counter_out_6_.operation_mode = "output";
4352 stratix_io d_column_counter_out_5_ (
4353 .padio(d_column_counter[5]),
4354 .datain(vga_driver_unit_column_counter_sig[5]),
4363 defparam d_column_counter_out_5_.operation_mode = "output";
4365 stratix_io d_column_counter_out_4_ (
4366 .padio(d_column_counter[4]),
4367 .datain(vga_driver_unit_column_counter_sig[4]),
4376 defparam d_column_counter_out_4_.operation_mode = "output";
4378 stratix_io d_column_counter_out_3_ (
4379 .padio(d_column_counter[3]),
4380 .datain(vga_driver_unit_column_counter_sig[3]),
4389 defparam d_column_counter_out_3_.operation_mode = "output";
4391 stratix_io d_column_counter_out_2_ (
4392 .padio(d_column_counter[2]),
4393 .datain(vga_driver_unit_column_counter_sig[2]),
4402 defparam d_column_counter_out_2_.operation_mode = "output";
4404 stratix_io d_column_counter_out_1_ (
4405 .padio(d_column_counter[1]),
4406 .datain(vga_driver_unit_column_counter_sig[1]),
4415 defparam d_column_counter_out_1_.operation_mode = "output";
4417 stratix_io d_column_counter_out_0_ (
4418 .padio(d_column_counter[0]),
4419 .datain(vga_driver_unit_column_counter_sig[0]),
4428 defparam d_column_counter_out_0_.operation_mode = "output";
4430 stratix_io d_vsync_out (
4432 .datain(vga_driver_unit_v_sync),
4441 defparam d_vsync_out.operation_mode = "output";
4443 stratix_io d_hsync_out (
4445 .datain(vga_driver_unit_h_sync),
4454 defparam d_hsync_out.operation_mode = "output";
4456 stratix_io seven_seg_pin_tri_13_ (
4457 .padio(seven_seg_pin[13]),
4467 defparam seven_seg_pin_tri_13_.operation_mode = "output";
4469 stratix_io seven_seg_pin_out_12_ (
4470 .padio(seven_seg_pin[12]),
4471 .datain(DELAY_RESET_next_un6_dly_counter_0_x),
4480 defparam seven_seg_pin_out_12_.operation_mode = "output";
4482 stratix_io seven_seg_pin_out_11_ (
4483 .padio(seven_seg_pin[11]),
4484 .datain(DELAY_RESET_next_un6_dly_counter_0_x),
4493 defparam seven_seg_pin_out_11_.operation_mode = "output";
4495 stratix_io seven_seg_pin_out_10_ (
4496 .padio(seven_seg_pin[10]),
4497 .datain(DELAY_RESET_next_un6_dly_counter_0_x),
4506 defparam seven_seg_pin_out_10_.operation_mode = "output";
4508 stratix_io seven_seg_pin_out_9_ (
4509 .padio(seven_seg_pin[9]),
4510 .datain(DELAY_RESET_next_un6_dly_counter_0_x),
4519 defparam seven_seg_pin_out_9_.operation_mode = "output";
4521 stratix_io seven_seg_pin_out_8_ (
4522 .padio(seven_seg_pin[8]),
4523 .datain(DELAY_RESET_next_un6_dly_counter_0_x),
4532 defparam seven_seg_pin_out_8_.operation_mode = "output";
4534 stratix_io seven_seg_pin_out_7_ (
4535 .padio(seven_seg_pin[7]),
4536 .datain(DELAY_RESET_next_un6_dly_counter_0_x),
4545 defparam seven_seg_pin_out_7_.operation_mode = "output";
4547 stratix_io seven_seg_pin_tri_6_ (
4548 .padio(seven_seg_pin[6]),
4558 defparam seven_seg_pin_tri_6_.operation_mode = "output";
4560 stratix_io seven_seg_pin_tri_5_ (
4561 .padio(seven_seg_pin[5]),
4571 defparam seven_seg_pin_tri_5_.operation_mode = "output";
4573 stratix_io seven_seg_pin_tri_4_ (
4574 .padio(seven_seg_pin[4]),
4584 defparam seven_seg_pin_tri_4_.operation_mode = "output";
4586 stratix_io seven_seg_pin_tri_3_ (
4587 .padio(seven_seg_pin[3]),
4597 defparam seven_seg_pin_tri_3_.operation_mode = "output";
4599 stratix_io seven_seg_pin_out_2_ (
4600 .padio(seven_seg_pin[2]),
4601 .datain(DELAY_RESET_next_un6_dly_counter_0_x),
4610 defparam seven_seg_pin_out_2_.operation_mode = "output";
4612 stratix_io seven_seg_pin_out_1_ (
4613 .padio(seven_seg_pin[1]),
4614 .datain(DELAY_RESET_next_un6_dly_counter_0_x),
4623 defparam seven_seg_pin_out_1_.operation_mode = "output";
4625 stratix_io seven_seg_pin_tri_0_ (
4626 .padio(seven_seg_pin[0]),
4636 defparam seven_seg_pin_tri_0_.operation_mode = "output";
4638 stratix_io vsync_pin_out (
4640 .datain(vga_driver_unit_v_sync),
4649 defparam vsync_pin_out.operation_mode = "output";
4651 stratix_io hsync_pin_out (
4653 .datain(vga_driver_unit_h_sync),
4662 defparam hsync_pin_out.operation_mode = "output";
4664 stratix_io b1_pin_out (
4666 .datain(vga_control_unit_b),
4675 defparam b1_pin_out.operation_mode = "output";
4677 stratix_io b0_pin_out (
4679 .datain(vga_control_unit_b),
4688 defparam b0_pin_out.operation_mode = "output";
4690 stratix_io g2_pin_out (
4692 .datain(vga_control_unit_g),
4701 defparam g2_pin_out.operation_mode = "output";
4703 stratix_io g1_pin_out (
4705 .datain(vga_control_unit_g),
4714 defparam g1_pin_out.operation_mode = "output";
4716 stratix_io g0_pin_out (
4718 .datain(vga_control_unit_g),
4727 defparam g0_pin_out.operation_mode = "output";
4729 stratix_io r2_pin_out (
4731 .datain(vga_control_unit_r),
4740 defparam r2_pin_out.operation_mode = "output";
4742 stratix_io r1_pin_out (
4744 .datain(vga_control_unit_r),
4753 defparam r1_pin_out.operation_mode = "output";
4755 stratix_io r0_pin_out (
4757 .datain(vga_control_unit_r),
4766 defparam r0_pin_out.operation_mode = "output";
4769 vga_driver vga_driver_unit (
4770 .line_counter_sig_0(vga_driver_unit_line_counter_sig[0]),
4771 .line_counter_sig_1(vga_driver_unit_line_counter_sig[1]),
4772 .line_counter_sig_2(vga_driver_unit_line_counter_sig[2]),
4773 .line_counter_sig_3(vga_driver_unit_line_counter_sig[3]),
4774 .line_counter_sig_4(vga_driver_unit_line_counter_sig[4]),
4775 .line_counter_sig_5(vga_driver_unit_line_counter_sig[5]),
4776 .line_counter_sig_6(vga_driver_unit_line_counter_sig[6]),
4777 .line_counter_sig_7(vga_driver_unit_line_counter_sig[7]),
4778 .line_counter_sig_8(vga_driver_unit_line_counter_sig[8]),
4779 .dly_counter_1(dly_counter[1]),
4780 .dly_counter_0(dly_counter[0]),
4781 .vsync_state_2(vga_driver_unit_vsync_state[2]),
4782 .vsync_state_5(vga_driver_unit_vsync_state[5]),
4783 .vsync_state_3(vga_driver_unit_vsync_state[3]),
4784 .vsync_state_6(vga_driver_unit_vsync_state[6]),
4785 .vsync_state_4(vga_driver_unit_vsync_state[4]),
4786 .vsync_state_1(vga_driver_unit_vsync_state[1]),
4787 .vsync_state_0(vga_driver_unit_vsync_state[0]),
4788 .hsync_state_2(vga_driver_unit_hsync_state[2]),
4789 .hsync_state_4(vga_driver_unit_hsync_state[4]),
4790 .hsync_state_0(vga_driver_unit_hsync_state[0]),
4791 .hsync_state_5(vga_driver_unit_hsync_state[5]),
4792 .hsync_state_1(vga_driver_unit_hsync_state[1]),
4793 .hsync_state_3(vga_driver_unit_hsync_state[3]),
4794 .hsync_state_6(vga_driver_unit_hsync_state[6]),
4795 .column_counter_sig_0(vga_driver_unit_column_counter_sig[0]),
4796 .column_counter_sig_1(vga_driver_unit_column_counter_sig[1]),
4797 .column_counter_sig_2(vga_driver_unit_column_counter_sig[2]),
4798 .column_counter_sig_3(vga_driver_unit_column_counter_sig[3]),
4799 .column_counter_sig_4(vga_driver_unit_column_counter_sig[4]),
4800 .column_counter_sig_5(vga_driver_unit_column_counter_sig[5]),
4801 .column_counter_sig_6(vga_driver_unit_column_counter_sig[6]),
4802 .column_counter_sig_7(vga_driver_unit_column_counter_sig[7]),
4803 .column_counter_sig_8(vga_driver_unit_column_counter_sig[8]),
4804 .column_counter_sig_9(vga_driver_unit_column_counter_sig[9]),
4805 .vsync_counter_9(vga_driver_unit_vsync_counter[9]),
4806 .vsync_counter_8(vga_driver_unit_vsync_counter[8]),
4807 .vsync_counter_7(vga_driver_unit_vsync_counter[7]),
4808 .vsync_counter_6(vga_driver_unit_vsync_counter[6]),
4809 .vsync_counter_5(vga_driver_unit_vsync_counter[5]),
4810 .vsync_counter_4(vga_driver_unit_vsync_counter[4]),
4811 .vsync_counter_3(vga_driver_unit_vsync_counter[3]),
4812 .vsync_counter_2(vga_driver_unit_vsync_counter[2]),
4813 .vsync_counter_1(vga_driver_unit_vsync_counter[1]),
4814 .vsync_counter_0(vga_driver_unit_vsync_counter[0]),
4815 .hsync_counter_9(vga_driver_unit_hsync_counter[9]),
4816 .hsync_counter_8(vga_driver_unit_hsync_counter[8]),
4817 .hsync_counter_7(vga_driver_unit_hsync_counter[7]),
4818 .hsync_counter_6(vga_driver_unit_hsync_counter[6]),
4819 .hsync_counter_5(vga_driver_unit_hsync_counter[5]),
4820 .hsync_counter_4(vga_driver_unit_hsync_counter[4]),
4821 .hsync_counter_3(vga_driver_unit_hsync_counter[3]),
4822 .hsync_counter_2(vga_driver_unit_hsync_counter[2]),
4823 .hsync_counter_1(vga_driver_unit_hsync_counter[1]),
4824 .hsync_counter_0(vga_driver_unit_hsync_counter[0]),
4825 .d_set_vsync_counter(vga_driver_unit_d_set_vsync_counter),
4826 .un10_column_counter_siglt6_1(vga_driver_unit_COLUMN_COUNT_next_un10_column_counter_siglt6_1),
4827 .un10_column_counter_siglt6_3(vga_driver_unit_COLUMN_COUNT_next_un10_column_counter_siglt6_3),
4828 .v_sync(vga_driver_unit_v_sync),
4829 .h_sync(vga_driver_unit_h_sync),
4830 .h_enable_sig(vga_driver_unit_h_enable_sig),
4831 .v_enable_sig(vga_driver_unit_v_enable_sig),
4832 .reset_pin_c(reset_pin_c),
4833 .un6_dly_counter_0_x(DELAY_RESET_next_un6_dly_counter_0_x),
4834 .d_set_hsync_counter(vga_driver_unit_d_set_hsync_counter),
4838 vga_control vga_control_unit (
4839 .column_counter_sig_1(vga_driver_unit_column_counter_sig[3]),
4840 .column_counter_sig_7(vga_driver_unit_column_counter_sig[9]),
4841 .column_counter_sig_2(vga_driver_unit_column_counter_sig[4]),
4842 .column_counter_sig_0(vga_driver_unit_column_counter_sig[2]),
4843 .column_counter_sig_4(vga_driver_unit_column_counter_sig[6]),
4844 .column_counter_sig_3(vga_driver_unit_column_counter_sig[5]),
4845 .column_counter_sig_5(vga_driver_unit_column_counter_sig[7]),
4846 .column_counter_sig_6(vga_driver_unit_column_counter_sig[8]),
4847 .h_enable_sig(vga_driver_unit_h_enable_sig),
4848 .v_enable_sig(vga_driver_unit_v_enable_sig),
4849 .un10_column_counter_siglt6_1(vga_driver_unit_COLUMN_COUNT_next_un10_column_counter_siglt6_1),
4850 .g(vga_control_unit_g),
4851 .un10_column_counter_siglt6_3(vga_driver_unit_COLUMN_COUNT_next_un10_column_counter_siglt6_3),
4852 .r(vga_control_unit_r),
4853 .un6_dly_counter_0_x(DELAY_RESET_next_un6_dly_counter_0_x),
4855 .b(vga_control_unit_b)