Initial support for coreboot.

Add new option for targetting a coreboot payload.
When in coreboot mode, configure out those parts of the code that wont
    work on real hardware.
Don't include cmos.h in files that don't need it.

diff --git a/src/apm.c b/src/apm.c
index 1d8ceef0c99017179cd1b1cc7ff6e50b2583756a..f7646c95561dfb520d1a91e5dfc977138454e20d 100644 (file)
--- a/src/apm.c
+++ b/src/apm.c
@@ -14,6 +14,11 @@
 static void
 out_str(const char *str_cs)
 {
+    if (CONFIG_COREBOOT) {
+        BX_INFO("APM request '%s'\n", str_cs);
+        return;
+    }
+
     u8 *s = (u8*)str_cs;
     for (;;) {
         u8 c = GET_VAR(CS, *s);

diff --git a/src/ata.c b/src/ata.c
index 438f1e7e638fb227f500e858b0bd31981f811856..e319cf18080031a908970c90210b6e8d5e25f016 100644 (file)
--- a/src/ata.c
+++ b/src/ata.c
@@ -645,11 +645,25 @@ fill_fdpt(int driveid)
 static u8
 get_translation(int driveid)
 {
-    u8 channel = driveid / 2;
-    u8 translation = inb_cmos(CMOS_BIOS_DISKTRANSFLAG + channel/2);
-    translation >>= 2 * (driveid % 4);
-    translation &= 0x03;
-    return translation;
+    if (! CONFIG_COREBOOT) {
+        // Emulators pass in the translation info via nvram.
+        u8 channel = driveid / 2;
+        u8 translation = inb_cmos(CMOS_BIOS_DISKTRANSFLAG + channel/2);
+        translation >>= 2 * (driveid % 4);
+        translation &= 0x03;
+        return translation;
+    }
+
+    // On COREBOOT, use a heuristic to determine translation type.
+    u16 heads = GET_EBDA(ata.devices[driveid].pchs.heads);
+    u16 cylinders = GET_EBDA(ata.devices[driveid].pchs.cylinders);
+    u16 spt = GET_EBDA(ata.devices[driveid].pchs.spt);
+
+    if (cylinders <= 1024 && heads <= 16 && spt <= 63)
+        return ATA_TRANSLATION_NONE;
+    if (cylinders * heads <= 131072)
+        return ATA_TRANSLATION_LARGE;
+    return ATA_TRANSLATION_LBA;
 }
 
 static void

diff --git a/src/config.h b/src/config.h
index c7ec67e7120e0cca0466d732ce28668e8a20a100..4ae23dcfd8863fb0dbb835a0fd1c183ecc9433eb 100644 (file)
--- a/src/config.h
+++ b/src/config.h
@@ -13,6 +13,9 @@
 #define CONFIG_APPNAME "Bochs"
 #endif
 
+// Configure as a payload coreboot payload.
+#define CONFIG_COREBOOT 0
+
 #define CONFIG_DEBUG_SERIAL 0
 
 #define CONFIG_FLOPPY_SUPPORT 1

diff --git a/src/disk.c b/src/disk.c
index 152b811eb47f09a6db5988262301d06929509641..00eec8158a97ca4935281bf17ccf455ef07ab3ef 100644 (file)
--- a/src/disk.c
+++ b/src/disk.c
@@ -8,7 +8,6 @@
 #include "disk.h" // floppy_13
 #include "biosvar.h" // struct bregs
 #include "config.h" // CONFIG_*
-#include "cmos.h" // inb_cmos
 #include "util.h" // debug_enter
 #include "ata.h" // ATA_*
 

diff --git a/src/post.c b/src/post.c
index 1464572884ed1af9e6448ed61f4e67e9bca64d29..a6f7c3d6c565953acc541a01def8576e8d53fa08 100644 (file)
--- a/src/post.c
+++ b/src/post.c
@@ -80,14 +80,21 @@ init_ebda()
 static void
 ram_probe(void)
 {
-    u32 rs = (inb_cmos(CMOS_MEM_EXTMEM2_LOW)
+    u32 rs;
+    if (CONFIG_COREBOOT) {
+        // XXX - just hardcode for now.
+        rs = 128*1024*1024;
+    } else {
+        // On emulators, get memory size from nvram.
+        rs = (inb_cmos(CMOS_MEM_EXTMEM2_LOW)
               | (inb_cmos(CMOS_MEM_EXTMEM2_HIGH) << 8)) * 65536;
-    if (rs)
-        rs += 16 * 1024 * 1024;
-    else
-        rs = ((inb_cmos(CMOS_MEM_EXTMEM_LOW)
-               | (inb_cmos(CMOS_MEM_EXTMEM_HIGH) << 8)) * 1024
-              + 1 * 1024 * 1024);
+        if (rs)
+            rs += 16 * 1024 * 1024;
+        else
+            rs = ((inb_cmos(CMOS_MEM_EXTMEM_LOW)
+                   | (inb_cmos(CMOS_MEM_EXTMEM_HIGH) << 8)) * 1024
+                  + 1 * 1024 * 1024);
+    }
 
     SET_EBDA(ram_size, rs);
     BX_INFO("ram_size=0x%08x\n", rs);
@@ -131,10 +138,17 @@ init_boot_vectors()
 
     ebda->ipl.count = ip - ebda->ipl.table;
     ebda->ipl.sequence = 0xffff;
-    ebda->ipl.bootorder = (inb_cmos(CMOS_BIOS_BOOTFLAG2)
-                           | ((inb_cmos(CMOS_BIOS_BOOTFLAG1) & 0xf0) << 4));
-    if (!(inb_cmos(CMOS_BIOS_BOOTFLAG1) & 1))
+    if (CONFIG_COREBOOT) {
+        // XXX - hardcode defaults for coreboot.
+        ebda->ipl.bootorder = 0x00000231;
         ebda->ipl.checkfloppysig = 1;
+    } else {
+        // On emulators, get boot order from nvram.
+        ebda->ipl.bootorder = (inb_cmos(CMOS_BIOS_BOOTFLAG2)
+                               | ((inb_cmos(CMOS_BIOS_BOOTFLAG1) & 0xf0) << 4));
+        if (!(inb_cmos(CMOS_BIOS_BOOTFLAG1) & 1))
+            ebda->ipl.checkfloppysig = 1;
+    }
 }
 
 static void

diff --git a/src/rombios32.c b/src/rombios32.c
index 4db3465f49a28d1b497914327c6a7314330c2b2f..fde32a9526b2dcb70fc12b573d7043303bf185f6 100644 (file)
--- a/src/rombios32.c
+++ b/src/rombios32.c
@@ -18,7 +18,6 @@
 //  Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301 USA
 
 #include "util.h" // BX_INFO
-#include "cmos.h" // inb_cmos
 #include "pci.h" // PCIDevice
 #include "types.h" // u32
 #include "config.h" // CONFIG_*
@@ -1668,6 +1667,10 @@ void smbios_init(void)
 
 void rombios32_init(void)
 {
+    if (CONFIG_COREBOOT)
+        // XXX - not supported on coreboot yet.
+        return;
+
     BX_INFO("Starting rombios32\n");
 
 #if (CONFIG_USE_EBDA_TABLES == 1)

diff --git a/src/system.c b/src/system.c
index 68fbf54a0ef696a487fc7e98fc36dcea8824bef9..72c07356f7e1884fca67a9420c6785afb4597b0f 100644 (file)
--- a/src/system.c
+++ b/src/system.c
@@ -8,7 +8,6 @@
 #include "util.h" // irq_restore
 #include "biosvar.h" // BIOS_CONFIG_TABLE
 #include "ioport.h" // inb
-#include "cmos.h" // inb_cmos
 
 #define E820_RAM          1
 #define E820_RESERVED     2