Declare output sections with explicit start address - don't rely on LD
using '.' for the start of the section. Make addresses that are
absolute by using the ABSOLUTE() function.
Discard .eh_frame - new gcc has this on by default.
Also, don't use '-d' - instead use FORCE_COMMON_ALLOCATION.
$(OUT)rom32.o: $(OUT)ccode32.o $(OUT)rombios32.lds
@echo " Linking (no relocs) $@"
- $(Q)$(LD) -r -d -T $(OUT)rombios32.lds $< -o $@
+ $(Q)$(LD) -r -T $(OUT)rombios32.lds $< -o $@
$(OUT)romlayout.lds: $(OUT)romlayout16.o
@echo " Building layout information $@"
*(.text16)
final_code16_end = . ;
}
- /DISCARD/ : { *(.discard*) }
+ /DISCARD/ : { *(.discard*) *(.eh_frame) }
}
OUTPUT_ARCH("i386")
SECTIONS
{
- . = ( _code32_code32_end - BUILD_BIOS_ADDR ) ;
- . = ALIGN(16) ;
- code16_start = . ;
- .text16 : {
+ .text16 ALIGN(_code32_code32_end - _code32_code32_start, 16) : {
+ code16_start = ABSOLUTE(.) ;
// The actual placement of the 16bit sections is determined by the
// script tools/layoutrom.py
#include "../out/romlayout.lds"
+ code16_end = ABSOLUTE(.) ;
}
- code16_end = . ;
// Discard regular data sections to force a link error if
// 16bit code attempts to access data not marked with VAR16.
OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386")
OUTPUT_ARCH("i386")
+FORCE_COMMON_ALLOCATION
SECTIONS
{
- . = BUILD_BIOS_ADDR ;
- code32_start = . ;
- .text : {
+ .text BUILD_BIOS_ADDR : {
+ code32_start = ABSOLUTE(.) ;
*(.text)
code32_rodata = . ;
*(.rodata*)
*(.data)
*(.bss)
*(COMMON)
+ code32_end = ABSOLUTE(.) ;
}
- code32_end = . ;
}