Register int02 handler (nmi); disable NMI by default.

Rename handle_nmi to handle_02 to be more consistent with other handlers.
Actually register handle_02.
Don't panic in nmi handler - just log by default.
Set the disable nmi bit when accessing the cmos index register.

diff --git a/src/cmos.h b/src/cmos.h
index aa8bcae556f87004b978633248c217e7d298c175..e4b64623316814732daeab07ba1dc2635335ac45 100644 (file)
--- a/src/cmos.h
+++ b/src/cmos.h
@@ -56,6 +56,7 @@
 static inline u8
 inb_cmos(u8 reg)
 {
+    reg |= NMI_DISABLE_BIT;
     outb(reg, PORT_CMOS_INDEX);
     return inb(PORT_CMOS_DATA);
 }
@@ -63,6 +64,7 @@ inb_cmos(u8 reg)
 static inline void
 outb_cmos(u8 val, u8 reg)
 {
+    reg |= NMI_DISABLE_BIT;
     outb(reg, PORT_CMOS_INDEX);
     outb(val, PORT_CMOS_DATA);
 }

diff --git a/src/config.h b/src/config.h
index 56e5302652b1fdc64f46647fd6d4810e735a0ddc..a882afc5e54516d108f84294b6094990a4951f1c 100644 (file)
--- a/src/config.h
+++ b/src/config.h
@@ -130,7 +130,7 @@
 // Debugging levels.  If non-zero and CONFIG_DEBUG_LEVEL is greater
 // than the specified value, then the corresponding irq handler will
 // report every enter event.
-#define DEBUG_ISR_nmi 1
+#define DEBUG_ISR_02 1
 #define DEBUG_HDL_05 1
 #define DEBUG_ISR_08 20
 #define DEBUG_ISR_09 9

diff --git a/src/ioport.h b/src/ioport.h
index 97546a6207ad42fc8784cc306ec4746b0c2aab08..220f7f28c77c4301eafc2ec8e694c4a61581f0a0 100644 (file)
--- a/src/ioport.h
+++ b/src/ioport.h
@@ -51,6 +51,9 @@
 // PORT_A20 bitdefs
 #define A20_ENABLE_BIT 0x02
 
+// PORT_CMOS_INDEX nmi disable bit
+#define NMI_DISABLE_BIT 0x80
+
 #ifndef __ASSEMBLY__
 
 #include "types.h" // u8

diff --git a/src/misc.c b/src/misc.c
index 6548249fec7a787e9cf01f2f2bc004b6a34e045d..bece61e6006a0f1c63b978a249c39a0a262da992 100644 (file)
--- a/src/misc.c
+++ b/src/misc.c
@@ -54,11 +54,11 @@ handle_10(struct bregs *regs)
     // dont do anything, since the VGA BIOS handles int10h requests
 }
 
+// NMI handler
 void VISIBLE16
-handle_nmi()
+handle_02()
 {
-    debug_isr(DEBUG_ISR_nmi);
-    panic("NMI Handler called\n");
+    debug_isr(DEBUG_ISR_02);
 }
 
 void

diff --git a/src/post.c b/src/post.c
index f681f01291fa0d7d7cdc8556fce35075f64b315c..73cd7988733d12ac0fa8cbc2398e97ab018713db 100644 (file)
--- a/src/post.c
+++ b/src/post.c
@@ -47,6 +47,7 @@ init_ivt()
         set_irq(i, entry_hwpic2);
 
     // Initialize software handlers.
+    set_irq(0x02, entry_02);
     set_irq(0x10, entry_10);
     set_irq(0x11, entry_11_official);
     set_irq(0x12, entry_12_official);

diff --git a/src/romlayout.S b/src/romlayout.S
index e5e82e4b6840a40291fbadede74f1cc66b77e32d..6d7fdd9faeacd73873f5f0be0900f2c73dd782fc 100644 (file)
--- a/src/romlayout.S
+++ b/src/romlayout.S
@@ -139,7 +139,7 @@ entry_post:
         cld
 
         // Check for restart indicator.
-        movl $CMOS_RESET_CODE, %eax
+        movl $CMOS_RESET_CODE|NMI_DISABLE_BIT, %eax
         outb %al, $PORT_CMOS_INDEX
         inb $PORT_CMOS_DATA, %al
         cmpb $0x0, %al
@@ -154,7 +154,7 @@ entry_post:
         movl %eax, %ebx
 
         // Clear shutdown status register.
-        movl $CMOS_RESET_CODE, %eax
+        movl $CMOS_RESET_CODE|NMI_DISABLE_BIT, %eax
         outb %al, $PORT_CMOS_INDEX
         xorl %eax, %eax
         outb %al, $PORT_CMOS_DATA
@@ -193,6 +193,11 @@ transition32:
         lidtw %cs:pmode_IDT_info
         lgdtw %cs:rombios32_gdt_48
 
+        // Disable nmi
+        movl $CMOS_RESET_CODE|NMI_DISABLE_BIT, %eax
+        outb %al, $PORT_CMOS_INDEX
+        inb $PORT_CMOS_DATA, %al
+
         // Enable protected mode
         movl %cr0, %eax
         orl $CR0_PE, %eax
@@ -495,7 +500,7 @@ entry_post_official:
         jmp entry_post
 
         ORG 0xe2c3
-        IRQ_ENTRY nmi
+        IRQ_ENTRY 02
 
         ORG 0xe3fe
         .global entry_13_official