Use defines for PCI ids.

This is based on a patch that was committed to bochs bios.

diff --git a/src/acpi.c b/src/acpi.c
index 7dd4224207cd4a89f84938660e3d0fd173aece5c..f37f583d72ed1f9e716ec275d634a297fcb4db5a 100644 (file)
--- a/src/acpi.c
+++ b/src/acpi.c
@@ -279,7 +279,8 @@ void acpi_bios_init(void)
 
     // This code is hardcoded for PIIX4 Power Management device.
     PCIDevice d;
-    int ret = pci_find_device(0x8086, 0x7113, 0, &d);
+    int ret = pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3
+                              , 0, &d);
     if (ret)
         // Device not found
         return;

diff --git a/src/pci.h b/src/pci.h
index 1179911b395384db242571351ca46b03da746bbd..2b05738cf4eda166aab3c36449b4c3afbe4850fd 100644 (file)
--- a/src/pci.h
+++ b/src/pci.h
@@ -62,6 +62,15 @@ void create_pirtable();
 #define PCI_MIN_GNT            0x3e    /* 8 bits */
 #define PCI_MAX_LAT            0x3f    /* 8 bits */
 
+#define PCI_VENDOR_ID_INTEL             0x8086
+#define PCI_VENDOR_ID_IBM               0x1014
+#define PCI_VENDOR_ID_APPLE             0x106b
+
+#define PCI_DEVICE_ID_INTEL_82441       0x1237
+#define PCI_DEVICE_ID_INTEL_82371SB_0   0x7000
+#define PCI_DEVICE_ID_INTEL_82371SB_1   0x7010
+#define PCI_DEVICE_ID_INTEL_82371AB_3   0x7113
+
 
 /****************************************************************
  * PIR table

diff --git a/src/pciinit.c b/src/pciinit.c
index 92ae2d0bd4fbb7175b77164b392f579d973c0f88..6e4045b248af9a23b8cbc0904709fe364864705f 100644 (file)
--- a/src/pciinit.c
+++ b/src/pciinit.c
@@ -16,8 +16,6 @@
 #define PCI_ROM_SLOT 6
 #define PCI_NUM_REGIONS 7
 
-#define PCI_DEVICES_MAX 64
-
 static u32 pci_bios_io_addr;
 static u32 pci_bios_mem_addr;
 static u32 pci_bios_bigmem_addr;
@@ -68,7 +66,8 @@ static void pci_bios_init_bridges(PCIDevice d)
     vendor_id = pci_config_readw(d, PCI_VENDOR_ID);
     device_id = pci_config_readw(d, PCI_DEVICE_ID);
 
-    if (vendor_id == 0x8086 && device_id == 0x7000) {
+    if (vendor_id == PCI_VENDOR_ID_INTEL
+        && device_id == PCI_DEVICE_ID_INTEL_82371SB_0) {
         int i, irq;
         u8 elcr[2];
 
@@ -103,7 +102,8 @@ static void pci_bios_init_device(PCIDevice d)
             d.bus, d.devfn, vendor_id, device_id);
     switch(class) {
     case 0x0101:
-        if (vendor_id == 0x8086 && device_id == 0x7010) {
+        if (vendor_id == PCI_VENDOR_ID_INTEL
+            && device_id == PCI_DEVICE_ID_INTEL_82371SB_1) {
             /* PIIX3 IDE */
             pci_config_writew(d, 0x40, 0x8000); // enable IDE0
             pci_config_writew(d, 0x42, 0x8000); // enable IDE1
@@ -124,7 +124,7 @@ static void pci_bios_init_device(PCIDevice d)
         break;
     case 0x0800:
         /* PIC */
-        if (vendor_id == 0x1014) {
+        if (vendor_id == PCI_VENDOR_ID_IBM) {
             /* IBM */
             if (device_id == 0x0046 || device_id == 0xFFFF) {
                 /* MPIC & MPIC2 */
@@ -133,7 +133,7 @@ static void pci_bios_init_device(PCIDevice d)
         }
         break;
     case 0xff00:
-        if (vendor_id == 0x0106b &&
+        if (vendor_id == PCI_VENDOR_ID_APPLE &&
             (device_id == 0x0017 || device_id == 0x0022)) {
             /* macio bridge */
             pci_set_io_region_addr(d, 0, 0x80800000);
@@ -176,7 +176,8 @@ static void pci_bios_init_device(PCIDevice d)
         pci_config_writeb(d, PCI_INTERRUPT_LINE, pic_irq);
     }
 
-    if (vendor_id == 0x8086 && device_id == 0x7113) {
+    if (vendor_id == PCI_VENDOR_ID_INTEL
+        && device_id == PCI_DEVICE_ID_INTEL_82371AB_3) {
         /* PIIX4 Power Management device (for ACPI) */
         u32 pm_io_base = BUILD_PM_IO_BASE;
         pci_config_writel(d, 0x40, pm_io_base | 1);

diff --git a/src/shadow.c b/src/shadow.c
index 730dc53cc77189066c378d3ad2eedb0e307a3d6f..cb2fadf03e4c271dee24374664485dcb2731f378 100644 (file)
--- a/src/shadow.c
+++ b/src/shadow.c
@@ -39,7 +39,8 @@ make_bios_writable()
 
     // Locate chip controlling ram shadowing.
     PCIDevice d;
-    int ret = pci_find_device(0x8086, 0x1237, 0, &d);
+    int ret = pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441
+                              , 0, &d);
     if (ret) {
         dprintf(1, "Unable to unlock ram - bridge not found\n");
         return;
@@ -75,7 +76,8 @@ make_bios_readonly()
     dprintf(3, "locking shadow ram\n");
 
     PCIDevice d;
-    int ret = pci_find_device(0x8086, 0x1237, 0, &d);
+    int ret = pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441
+                              , 0, &d);
     if (ret) {
         dprintf(1, "Unable to lock ram - bridge not found\n");
         return;

diff --git a/src/smm.c b/src/smm.c
index 6f5fbb151d54fbf5214071910e8edfd24ff7b9f0..5d014671fc111f3e8433eabdcb48f58d4a3620dc 100644 (file)
--- a/src/smm.c
+++ b/src/smm.c
@@ -81,11 +81,13 @@ smm_init()
 
     // This code is hardcoded for PIIX4 Power Management device.
     PCIDevice i440_pcidev, d;
-    int ret = pci_find_device(0x8086, 0x7113, 0, &d);
+    int ret = pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82371AB_3
+                              , 0, &d);
     if (ret)
         // Device not found
         return;
-    ret = pci_find_device(0x8086, 0x1237, 0, &i440_pcidev);
+    ret = pci_find_device(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82441
+                          , 0, &i440_pcidev);
     if (ret)
         return;