Layout fixed area using linker instead of assembler.

The fixed offset requirements of the 16bit code can be done using
    multiple sections and a linker script.  Using the linker allows
    for more flexibility.
Also, have the 16bit code generate sections for every function and
    variable definition.

diff --git a/Makefile b/Makefile
index 13ef54ba0bafd2065b66e97734f23b1f198952d9..424dd0bb5dee1120a894a3938b9cd9e7da4aed24 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -31,6 +31,7 @@ COMMONCFLAGS += $(call cc-option,$(CC),-fno-stack-protector-all,)
 override CFLAGS = $(COMMONCFLAGS) -g -DMODE16=0
 CFLAGS16INC = $(COMMONCFLAGS) -DMODE16=1 -fno-jump-tables -fno-defer-pop \
               $(call cc-option,$(CC),--param large-stack-frame=4,)
+CFLAGS16INC += -ffunction-sections -fdata-sections
 CFLAGS16 = $(CFLAGS16INC) -g
 
 TABLETMP=$(addprefix $(OUT), $(patsubst %.c,%.16.s,$(TABLESRC)))
@@ -44,6 +45,7 @@ Q=@
 endif
 
 OBJCOPY=objcopy
+OBJDUMP=objdump
 NM=nm
 STRIP=strip
 
@@ -103,6 +105,12 @@ $(OUT)rom32.o: $(OUT)ccode32.o $(OUT)rombios32.lds
        @echo "  Linking (no relocs) $@"
        $(Q)$(LD) -r -d -T $(OUT)rombios32.lds $< -o $@
 
+$(OUT)romlayout.lds: $(OUT)romlayout16.o
+       @echo "  Building layout information $@"
+       $(Q)$(OBJDUMP) -h $< | ./tools/layoutrom.py > $@
+
+$(OUT)rombios16.lds: $(OUT)romlayout.lds
+
 $(OUT)rom16.o: $(OUT)romlayout16.o $(OUT)rom32.o $(OUT)rombios16.lds
        @echo "  Linking (16bit) $@"
        $(Q)$(OBJCOPY) --prefix-symbols=_code32_ $(OUT)rom32.o $(OUT)rom32.rename.o

diff --git a/src/config.h b/src/config.h
index 435019f0f416f6a52d5b7e48644edf74dd1a2b8f..8c4b2f0293408f8bb181d03e8be68434259fa83d 100644 (file)
--- a/src/config.h
+++ b/src/config.h
@@ -105,9 +105,6 @@
 #define BUILD_SMM_ADDR            0xa8000
 #define BUILD_SMM_SIZE            0x8000
 
-// Start of fixed addresses in 0xf0000 segment.
-#define BUILD_START_FIXED       0xe050
-
 // Important real-mode segments
 #define SEG_IVT      0x0000
 #define SEG_BDA      0x0040

diff --git a/src/rombios.lds.S b/src/rombios.lds.S
index 56bf6436cb074ea2c3ac9bfae47188d769209b71..c17d0f059db966d4db0685d90eef2a61d36f20f6 100644 (file)
--- a/src/rombios.lds.S
+++ b/src/rombios.lds.S
@@ -17,10 +17,6 @@ SECTIONS
                 . = code16_start ;
                 final_code16_start = . ;
                 *(.text16)
-
-                . = code16_fixed_start ;
-                final_code16_fixed_start = . ;
-                *(.text16.fixed.addr)
                 }
-        /DISCARD/ : { *(.discard.var16) }
+        /DISCARD/ : { *(.discard*) }
 }

diff --git a/src/rombios16.lds.S b/src/rombios16.lds.S
index b2d7eccb70db1f4345856c6caaef4c2a20774006..074d5f1d5c754b6274325c4875df0cdc3e6be866 100644 (file)
--- a/src/rombios16.lds.S
+++ b/src/rombios16.lds.S
@@ -13,23 +13,15 @@ SECTIONS
         . = ( _code32_code32_end - BUILD_BIOS_ADDR ) ;
         code16_start = . ;
         .text16 : {
-                *(.text)
-                code16_rodata = . ;
-                *(.rodata*)
-                *(.data.var16)
-                }
-        freespace1_start = . ;
-        code16_end = . ;
 
-        . = BUILD_START_FIXED ;
-        code16_fixed_start = . ;
-        freespace1_end = . ;
-        .text16.fixed.addr : {
-                *(.text.fixed.addr)
+// The actual placement of the 16bit sections is determined by the
+// script tools/layoutrom.py
+#include "../out/romlayout.lds"
+
                 }
-        code16_fixed_end = . ;
+        code16_end = . ;
 
         // Discard regular data sections to force a link error if
         // 16bit code attempts to access data not marked with VAR16.
-        /DISCARD/ : { *(.data) *(.bss) *(COMMON) }
+        /DISCARD/ : { *(.text*) *(.rodata*) *(.data*) *(.bss*) *(COMMON) }
 }

diff --git a/src/romlayout.S b/src/romlayout.S
index 7fd7f3e9329571682c5ea79ff3863901c610d986..4db9dfeeda732384b8c4ec6310c53302b408d106 100644 (file)
--- a/src/romlayout.S
+++ b/src/romlayout.S
@@ -114,8 +114,7 @@
 
         // Specify a location in the fixed part of bios area.
         .macro ORG addr
-        .section .text.fixed.addr
-        .org \addr - BUILD_START_FIXED
+        .section .fixedaddr.\addr
         .endm
 
 

diff --git a/src/types.h b/src/types.h
index 74d9e71b652380f3e079ff7e5259a06c44057331..5bf7634c2e3809a6c4ae3fd03df4933f0e1cc9f5 100644 (file)
--- a/src/types.h
+++ b/src/types.h
@@ -29,11 +29,11 @@ union u64_u32_u {
 // Notes a function as externally visible in the 32bit code chunk.
 # define VISIBLE32
 // Designate a variable as (only) visible to 16bit code.
-# define VAR16 __attribute__((section(".data.var16")))
+# define VAR16 __attribute__((section(".data16." __FILE__ "." __stringify(__LINE__))))
 // Designate a variable as visible to both 32bit and 16bit code.
 # define VAR16_32 VAR16 __VISIBLE
 // Designate top-level assembler as 16bit only.
-# define ASM16(code) asm(code)
+# define ASM16(code) asm(".section .text.asm." __FILE__ "." __stringify(__LINE__) "\n\t" code)
 #else
 # define VISIBLE16
 # define VISIBLE32 __VISIBLE

diff --git a/tools/checkrom.py b/tools/checkrom.py
index 7ba4d0de391d12c4fe30b91c7969ae3dd0310467..6b5f1e9f26d34df5a8ed88d6e65d2a9f397f9e66 100755 (executable)
--- a/tools/checkrom.py
+++ b/tools/checkrom.py
@@ -19,22 +19,19 @@ def main():
 
     c16s = syms['code16_start'] + 0xf0000
     c32s = syms['final_code16_start']
-    f16s = syms['code16_fixed_start'] + 0xf0000
-    f32s = syms['final_code16_fixed_start']
-    if c16s != c32s or f16s != f32s:
-        print ("Error!  16bit code moved during linking"
-               " (0x%x vs 0x%x, 0x%x vs 0x%x)" % (
-                c32s, c16s, f16s, f32s))
+    if c16s != c32s:
+        print "Error!  16bit code moved during linking (0x%x vs 0x%x)" % (
+            c32s, c16s)
         sys.exit(1)
 
-    size16 = syms['code16_end'] - syms['code16_start']
+    sizefree = syms['freespace1_end'] - syms['freespace1_start']
+    size16 = syms['code16_end'] - syms['code16_start'] - sizefree
     size32 = syms['code32_end'] - syms['code32_start']
     totalc = size16+size32
-    sizefree = syms['freespace1_end'] - syms['freespace1_start']
     tablefree = syms['freespace2_end'] - syms['freespace2_start']
-    print "16bit C-code size: %d" % size16
-    print "32bit C-code size: %d" % size32
-    print "Total C-code size: %d  Free space: %d  Percent used: %.1f%%" % (
+    print "16bit size: %d" % size16
+    print "32bit size: %d" % size32
+    print "Total size: %d  Free space: %d  Percent used: %.1f%%" % (
         totalc, sizefree
         , (totalc / float(size16+size32+sizefree)) * 100.0)
     print "BIOS table space:  %d" % tablefree

diff --git a/tools/layoutrom.py b/tools/layoutrom.py
new file mode 100755 (executable)
index 0000000..f1fe0e1
--- /dev/null
+++ b/tools/layoutrom.py
@@ -0,0 +1,68 @@
+#!/usr/bin/env python
+# Script to arrange sections to ensure fixed offsets.
+#
+# Copyright (C) 2008  Kevin O'Connor <kevin@koconnor.net>
+#
+# This file may be distributed under the terms of the GNU GPLv3 license.
+
+import sys
+
+def main():
+    # Read in section names and sizes
+
+    # sections = [(idx, name, size, align), ...]
+    sections = []
+    for line in sys.stdin.readlines():
+        try:
+            idx, name, size, vma, lma, fileoff, align = line.split()
+            if align[:3] != '2**':
+                continue
+            sections.append((
+                int(idx), name, int(size, 16), int(align[3:])))
+        except:
+            pass
+
+    # fixedsections = [(addr, sectioninfo), ...]
+    fixedsections = []
+    textsections = []
+    rodatasections = []
+    datasections = []
+
+    # Find desired sections.
+    for section in sections:
+        name = section[1]
+        if name[:11] == '.fixedaddr.':
+            addr = int(name[11:], 16)
+            fixedsections.append((addr, section))
+        if name[:6] == '.text.':
+            textsections.append(section)
+        if name[:17] == '.rodata.__func__.' or name == '.rodata.str1.1':
+            rodatasections.append(section)
+        if name[:8] == '.data16.':
+            datasections.append(section)
+
+    # Write regular sections
+    for section in textsections:
+        name = section[1]
+        sys.stdout.write("*(%s)\n" % (name,))
+    sys.stdout.write("code16_rodata = . ;\n")
+    for section in rodatasections:
+        name = section[1]
+        sys.stdout.write("*(%s)\n" % (name,))
+    for section in datasections:
+        name = section[1]
+        sys.stdout.write("*(%s)\n" % (name,))
+
+    # Write fixed sections
+    sys.stdout.write("freespace1_start = . ;\n")
+    first = 1
+    for addr, section in fixedsections:
+        name = section[1]
+        sys.stdout.write(". = ( 0x%x - code16_start ) ;\n" % (addr,))
+        if first:
+            first = 0
+            sys.stdout.write("freespace1_end = . ;\n")
+        sys.stdout.write("*(%s)\n" % (name,))
+
+if __name__ == '__main__':
+    main()