Omitting "void" leads to a K&R style declaration which was not intended.
/dev/null 2>&1`"; then echo "$(2)"; else echo "$(3)"; fi ;)
# Default compiler flags
-COMMONCFLAGS = -Wall -Os -MD -m32 -march=i386 -mregparm=3 \
- -mpreferred-stack-boundary=2 -mrtd -freg-struct-return \
- -ffreestanding -fomit-frame-pointer \
- -fno-delete-null-pointer-checks -Wno-strict-aliasing \
- -ffunction-sections -fdata-sections -fno-common \
- -minline-all-stringops
+COMMONCFLAGS = -Os -MD -Wall -Wold-style-definition -Wno-strict-aliasing \
+ -m32 -march=i386 -mregparm=3 -mpreferred-stack-boundary=2 \
+ -mrtd -minline-all-stringops \
+ -freg-struct-return -ffreestanding -fomit-frame-pointer \
+ -fno-delete-null-pointer-checks \
+ -ffunction-sections -fdata-sections -fno-common
COMMONCFLAGS += $(call cc-option,$(CC),-nopie,)
COMMONCFLAGS += $(call cc-option,$(CC),-fno-stack-protector,)
COMMONCFLAGS += $(call cc-option,$(CC),-fno-stack-protector-all,)
}
u32
-find_resume_vector()
+find_resume_vector(void)
{
dprintf(4, "rsdp=%p\n", RsdpAddr);
if (!RsdpAddr || RsdpAddr->signature != RSDP_SIGNATURE)
#include "types.h" // u32
void acpi_bios_init(void);
-u32 find_resume_vector();
+u32 find_resume_vector(void);
#define RSDP_SIGNATURE 0x2052545020445352LL // "RSD PTR "
}
// Assembler entry points defined in romlayout.S
-extern void apm16protected_entry();
-extern void apm32protected_entry();
+extern void apm16protected_entry(void);
+extern void apm32protected_entry(void);
// APM 16 bit protected mode interface connect
static void
// Locate and init ata controllers.
static void
-ata_init()
+ata_init(void)
{
// Scan PCI bus for ATA adapters
int count=0, pcicount=0;
}
void
-ata_setup()
+ata_setup(void)
{
if (!CONFIG_ATA)
return;
int cdrom_read(struct disk_op_s *op);
int ata_cmd_packet(struct drive_s *drive_g, u8 *cmdbuf, u8 cmdlen
, u32 length, void *buf_fl);
-void ata_setup();
+void ata_setup(void);
int process_ata_op(struct disk_op_s *op);
int process_atapi_op(struct disk_op_s *op);
void describe_ata(struct drive_s *drive_g);
FLATPTR_TO_SEG(BUILD_LOWRAM_END - EBDA_SIZE_START*1024)
// Accessor functions
-static inline u16 get_ebda_seg() {
+static inline u16 get_ebda_seg(void) {
return GET_BDA(ebda_seg);
}
static inline struct extended_bios_data_area_s *
-get_ebda_ptr()
+get_ebda_ptr(void)
{
ASSERT32FLAT();
return MAKE_FLATPTR(get_ebda_seg(), 0);
return 0;
}
#endif
-static inline u16 get_global_seg() {
+static inline u16 get_global_seg(void) {
return GET_SEG(GLOBAL_SEGREG);
}
#define GET_GLOBAL(var) \
}
struct drive_s *
-allocDrive()
+allocDrive(void)
{
int driveid = Drives.drivecount;
if (driveid >= ARRAY_SIZE(Drives.drives))
****************************************************************/
void
-drive_setup()
+drive_setup(void)
{
memset(&Drives, 0, sizeof(Drives));
memset(&Drives.idmap, 0xff, sizeof(Drives.idmap));
****************************************************************/
void
-boot_setup()
+boot_setup(void)
{
if (! CONFIG_BOOT)
return;
// Show IPL option menu.
static void
-interactive_bootmenu()
+interactive_bootmenu(void)
{
if (! CONFIG_BOOTMENU || ! qemu_cfg_show_boot_menu())
return;
// Prepare for boot - show menu and run bcvs.
void
-boot_prep()
+boot_prep(void)
{
if (! CONFIG_BOOT)
return;
// Boot Failure recovery: try the next device.
void VISIBLE32FLAT
-handle_18()
+handle_18(void)
{
debug_serial_setup();
debug_enter(NULL, DEBUG_HDL_18);
// INT 19h Boot Load Service Entry Point
void VISIBLE32FLAT
-handle_19()
+handle_19(void)
{
debug_serial_setup();
debug_enter(NULL, DEBUG_HDL_19);
// boot.c
extern struct ipl_s IPL;
-void boot_setup();
+void boot_setup(void);
void add_bev(u16 seg, u16 bev, u16 desc);
void add_bcv(u16 seg, u16 ip, u16 desc);
struct drive_s;
void add_bcv_internal(struct drive_s *drive_g);
-void boot_prep();
+void boot_prep(void);
#endif // __BOOT_H
struct drive_s *cdemu_drive VAR16VISIBLE;
void
-cdemu_setup()
+cdemu_setup(void)
{
if (!CONFIG_CDROM_EMU)
return;
u32 cpu_khz VAR16VISIBLE;
static void
-calibrate_tsc()
+calibrate_tsc(void)
{
// Setup "timer2"
u8 orig = inb(PORT_PS2_CTRLB);
****************************************************************/
static int
-rtc_updating()
+rtc_updating(void)
{
// This function checks to see if the update-in-progress bit
// is set in CMOS Status Register A. If not, it returns 0.
}
static void
-pit_setup()
+pit_setup(void)
{
// timer0: binary count, 16bit count, mode 2
outb(PM_SEL_TIMER0|PM_ACCESS_WORD|PM_MODE2|PM_CNT_BINARY, PORT_PIT_MODE);
}
static void
-init_rtc()
+init_rtc(void)
{
outb_cmos(0x26, CMOS_STATUS_A); // 32,768Khz src, 976.5625us updates
u8 regB = inb_cmos(CMOS_STATUS_B);
}
void
-timer_setup()
+timer_setup(void)
{
dprintf(3, "init timer\n");
calibrate_tsc();
// INT 08h System Timer ISR Entry Point
void VISIBLE16
-handle_08()
+handle_08(void)
{
debug_isr(DEBUG_ISR_08);
****************************************************************/
void
-useRTC()
+useRTC(void)
{
u16 ebda_seg = get_ebda_seg();
int count = GET_EBDA2(ebda_seg, RTCusers);
}
void
-releaseRTC()
+releaseRTC(void)
{
u16 ebda_seg = get_ebda_seg();
int count = GET_EBDA2(ebda_seg, RTCusers);
}
static void
-clear_usertimer()
+clear_usertimer(void)
{
if (!(GET_BDA(rtc_wait_flag) & RWS_WAIT_PENDING))
return;
// int70h: IRQ8 - CMOS RTC
void VISIBLE16
-handle_70()
+handle_70(void)
{
debug_isr(DEBUG_ISR_70);
// Populate max ram and e820 map info by scanning for a coreboot table.
static void
-coreboot_fill_map()
+coreboot_fill_map(void)
{
dprintf(3, "Attempting to find coreboot table\n");
}
void
-coreboot_copy_biostable()
+coreboot_copy_biostable(void)
{
struct cb_memory *cbm = CBMemTable;
if (! CONFIG_COREBOOT || !cbm)
static struct cbfs_header *CBHDR;
static void
-cbfs_setup()
+cbfs_setup(void)
{
if (! CONFIG_COREBOOT_FLASH)
return;
// Return the first file in the CBFS archive
static struct cbfs_file *
-cbfs_getfirst()
+cbfs_getfirst(void)
{
if (! CBHDR)
return NULL;
// record completion in BIOS task complete flag
void VISIBLE16
-handle_76()
+handle_76(void)
{
debug_isr(DEBUG_ISR_76);
SET_BDA(disk_interrupt_flag, 0xff);
// block.c
extern struct drives_s Drives;
struct drive_s *getDrive(u8 exttype, u8 extdriveoffset);
-struct drive_s *allocDrive();
+struct drive_s *allocDrive(void);
void setup_translation(struct drive_s *drive_g);
void map_floppy_drive(struct drive_s *drive_g);
void map_hd_drive(struct drive_s *drive_g);
void describe_drive(struct drive_s *drive_g);
int process_op(struct disk_op_s *op);
int send_disk_op(struct disk_op_s *op);
-void drive_setup();
+void drive_setup(void);
// floppy.c
extern struct floppy_ext_dbt_s diskette_param_table2;
-void floppy_setup();
+void floppy_setup(void);
struct drive_s *addFloppy(int floppyid, int ftype, int driver);
void describe_floppy(struct drive_s *drive_g);
int find_floppy_type(u32 size);
int process_floppy_op(struct disk_op_s *op);
-void floppy_tick();
+void floppy_tick(void);
// cdrom.c
extern struct drive_s *cdemu_drive;
int process_cdemu_op(struct disk_op_s *op);
-void cdemu_setup();
+void cdemu_setup(void);
void cdemu_134b(struct bregs *regs);
int cdrom_boot(int cdid);
// ramdisk.c
void describe_ramdisk(struct drive_s *drive_g);
-void ramdisk_setup();
+void ramdisk_setup(void);
int process_ramdisk_op(struct disk_op_s *op);
#endif // disk.h
// Macros for automatically choosing the appropriate memory size
// access method.
-extern void __force_link_error__unknown_type();
+extern void __force_link_error__unknown_type(void);
#define __GET_VAR(prefix, seg, var) ({ \
typeof(var) __val; \
}
void
-floppy_setup()
+floppy_setup(void)
{
if (! CONFIG_FLOPPY)
return;
****************************************************************/
static void
-floppy_reset_controller()
+floppy_reset_controller(void)
{
// Reset controller
u8 val8 = inb(PORT_FD_DOR);
}
static int
-wait_floppy_irq()
+wait_floppy_irq(void)
{
ASSERT16();
u8 v;
// INT 0Eh Diskette Hardware ISR Entry Point
void VISIBLE16
-handle_0e()
+handle_0e(void)
{
debug_isr(DEBUG_ISR_0e);
if (! CONFIG_FLOPPY)
// Called from int08 handler.
void
-floppy_tick()
+floppy_tick(void)
{
if (! CONFIG_FLOPPY)
return;
#define KF2_101KBD (1<<4)
void
-kbd_setup()
+kbd_setup(void)
{
dprintf(3, "init keyboard\n");
u16 x = offsetof(struct bios_data_area_s, kbd_buf);
}
static void
-set_leds()
+set_leds(void)
{
u8 shift_flags = (GET_BDA(kbd_flag0) >> 4) & 0x07;
u8 kbd_led = GET_BDA(kbd_led);
// Show the current e820_list.
static void
-dump_map()
+dump_map(void)
{
dprintf(1, "e820 map has %d items:\n", e820_count);
int i;
// Prep for memmap stuff - init bios table locations.
void
-memmap_setup()
+memmap_setup(void)
{
e820_count = 0;
}
// Report on final memory locations.
void
-memmap_finalize()
+memmap_finalize(void)
{
dump_map();
}
};
void add_e820(u64 start, u64 size, u32 type);
-void memmap_setup();
-void memmap_finalize();
+void memmap_setup(void);
+void memmap_finalize(void);
struct e820entry *find_high_area(u32 size);
// A typical OS page size
// NMI handler
void VISIBLE16
-handle_02()
+handle_02(void)
{
debug_isr(DEBUG_ISR_02);
}
void
-mathcp_setup()
+mathcp_setup(void)
{
dprintf(3, "math cp init\n");
// 80x87 coprocessor installed
// INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
void VISIBLE16
-handle_75()
+handle_75(void)
{
debug_isr(DEBUG_ISR_75);
#include "ps2port.h" // aux_command
void
-mouse_setup()
+mouse_setup(void)
{
if (! CONFIG_MOUSE)
return;
// Return the memory position up to which roms may be located.
static inline u32
-max_rom()
+max_rom(void)
{
extern u8 code32flat_start[];
if ((u32)code32flat_start > BUILD_BIOS_ADDR)
****************************************************************/
void
-optionrom_setup()
+optionrom_setup(void)
{
if (! CONFIG_OPTIONROMS)
return;
// Call into vga code to turn on console.
void
-vga_setup()
+vga_setup(void)
{
VGAbdf = -1;
RomEnd = BUILD_ROM_START;
}
void
-s3_resume_vga_init()
+s3_resume_vga_init(void)
{
if (!CONFIG_S3_RESUME_VGA_INIT)
return;
#define DEBUG_TIMEOUT 100000
void
-debug_serial_setup()
+debug_serial_setup(void)
{
if (!CONFIG_DEBUG_SERIAL)
return;
// Make sure all serial port writes have been completely sent.
static void
-debug_serial_flush()
+debug_serial_flush(void)
{
if (!CONFIG_DEBUG_SERIAL)
return;
// Find a vga device with legacy address decoding enabled.
int
-pci_find_vga()
+pci_find_vga(void)
{
int bdf = 0x0000, max = 0x0100;
for (;;) {
u8 pci_config_readb(u16 bdf, u32 addr);
void pci_config_maskw(u16 bdf, u32 addr, u16 off, u16 on);
-int pci_find_vga();
+int pci_find_vga(void);
int pci_find_device(u16 vendid, u16 devid);
int pci_find_class(u16 classid);
; BDF=pci_next(BDF+1, &MAX))
// pirtable.c
-void create_pirtable();
+void create_pirtable(void);
/****************************************************************
#include "pci_regs.h" // PCI_VENDOR_ID
// romlayout.S
-extern void bios32_entry();
-extern void pcibios32_entry();
+extern void bios32_entry(void);
+extern void pcibios32_entry(void);
#define RET_FUNC_NOT_SUPPORTED 0x81
#define RET_BAD_VENDOR_ID 0x83
#include "config.h" // CONFIG_*
void
-pic_setup()
+pic_setup(void)
{
dprintf(3, "init pic\n");
// Send ICW1 (select OCW1 + will send ICW4)
#define PIC2_IRQ14 (1<<6)
static inline void
-eoi_pic1()
+eoi_pic1(void)
{
// Send eoi (select OCW2 + eoi)
outb(0x20, PORT_PIC1_CMD);
}
static inline void
-eoi_pic2()
+eoi_pic2(void)
{
// Send eoi (select OCW2 + eoi)
outb(0x20, PORT_PIC2_CMD);
}
static inline u8
-get_pic1_isr()
+get_pic1_isr(void)
{
// 0x0b == select OCW1 + read ISR
outb(0x0b, PORT_PIC1_CMD);
}
static inline u8
-get_pic2_isr()
+get_pic2_isr(void)
{
// 0x0b == select OCW1 + read ISR
outb(0x0b, PORT_PIC2_CMD);
__enable_hwirq(irq, func); \
} while (0)
-void pic_setup();
+void pic_setup(void);
#endif // pic.h
#endif // CONFIG_PIRTABLE && !CONFIG_COREBOOT
void
-create_pirtable()
+create_pirtable(void)
{
if (! CONFIG_PIRTABLE)
return;
// Report the status of all the zones.
static void
-dumpZones()
+dumpZones(void)
{
int i;
for (i=0; i<ARRAY_SIZE(Zones); i++) {
}
void
-malloc_setup()
+malloc_setup(void)
{
ASSERT32FLAT();
dprintf(3, "malloc setup\n");
}
void
-malloc_finalize()
+malloc_finalize(void)
{
dprintf(3, "malloc finalize\n");
}
// romlayout.S
-extern void entry_pmm();
+extern void entry_pmm(void);
void
-pmm_setup()
+pmm_setup(void)
{
if (! CONFIG_PMM)
return;
}
void
-pmm_finalize()
+pmm_finalize(void)
{
if (! CONFIG_PMM)
return;
}
u16
-get_pnp_offset()
+get_pnp_offset(void)
{
if (! CONFIG_PNPBIOS)
return (u32)pnp_string + 1 - BUILD_BIOS_ADDR;
}
// romlayout.S
-extern void entry_pnp_real();
-extern void entry_pnp_prot();
+extern void entry_pnp_real(void);
+extern void entry_pnp_prot(void);
void
-pnp_setup()
+pnp_setup(void)
{
if (! CONFIG_PNPBIOS)
return;
} while (0)
static void
-init_ivt()
+init_ivt(void)
{
dprintf(3, "init ivt\n");
}
static void
-init_bda()
+init_bda(void)
{
dprintf(3, "init bda\n");
// Main setup code.
static void
-post()
+post(void)
{
// Detect and init ram.
init_ivt();
// 32-bit entry point.
void VISIBLE32FLAT
-_start()
+_start(void)
{
init_dma();
****************************************************************/
static void
-process_ps2irq()
+process_ps2irq(void)
{
u8 status = inb(PORT_PS2_STATUS);
if (!(status & I8042_STR_OBF)) {
// INT74h : PS/2 mouse hardware interrupt
void VISIBLE16
-handle_74()
+handle_74(void)
{
if (! CONFIG_PS2PORT)
return;
// INT09h : Keyboard Hardware Service Entry Point
void VISIBLE16
-handle_09()
+handle_09(void)
{
if (! CONFIG_PS2PORT)
return;
****************************************************************/
static void
-keyboard_init()
+keyboard_init(void *data)
{
/* flush incoming keys */
int ret = i8042_flush();
}
void
-ps2port_setup()
+ps2port_setup(void)
{
if (! CONFIG_PS2PORT)
return;
int i8042_command(int command, u8 *param);
int kbd_command(int command, u8 *param);
int aux_command(int command, u8 *param);
-void ps2port_setup();
+void ps2port_setup(void);
#endif // ps2port.h
}
void
-ramdisk_setup()
+ramdisk_setup(void)
{
if (!CONFIG_COREBOOT_FLASH || !CONFIG_FLASH_FLOPPY)
return;
// Reset DMA controller
void
-init_dma()
+init_dma(void)
{
// first reset the DMA controllers
outb(0, PORT_DMA1_MASTER_CLEAR);
#if MODESEGMENT == 0
void VISIBLE32FLAT
-s3_resume()
+s3_resume(void)
{
if (!CONFIG_S3_RESUME)
panic("S3 resume support not compiled in.\n");
}
void
-serial_setup()
+serial_setup(void)
{
if (! CONFIG_SERIAL)
return;
}
void
-lpt_setup()
+lpt_setup(void)
{
if (! CONFIG_LPT)
return;
// Make the 0xc0000-0x100000 area read/writable.
void
-make_bios_writable()
+make_bios_writable(void)
{
if (CONFIG_COREBOOT)
return;
// Make the BIOS code segment area (0xf0000) read-only.
void
-make_bios_readonly()
+make_bios_readonly(void)
{
if (CONFIG_COREBOOT)
return;
extern u8 smm_code_start, smm_code_end;
void
-smm_init()
+smm_init(void)
{
if (CONFIG_COREBOOT)
// SMM only supported on emulators.
u32 CountCPUs VAR16VISIBLE;
u32 MaxCountCPUs VAR16VISIBLE;
-extern void smp_ap_boot_code();
+extern void smp_ap_boot_code(void);
ASM16(
" .global smp_ap_boot_code\n"
"smp_ap_boot_code:\n"
#include "util.h" // dprintf
#include "bregs.h" // CR0_PE
-static inline u32 getcr0() {
+static inline u32 getcr0(void) {
u32 cr0;
asm("movl %%cr0, %0" : "=r"(cr0));
return cr0;
int VAR16VISIBLE CanPreempt;
void
-thread_setup()
+thread_setup(void)
{
MainThread.next = &MainThread;
MainThread.stackpos = NULL;
// Return the 'struct thread_info' for the currently running thread.
struct thread_info *
-getCurThread()
+getCurThread(void)
{
u32 esp = getesp();
if (esp <= BUILD_STACK_ADDR)
// Briefly permit irqs to occur.
void
-yield()
+yield(void)
{
if (MODESEGMENT || !CONFIG_THREADS) {
// Just directly check irqs.
// Wait for all threads (other than the main thread) to complete.
void
-wait_threads()
+wait_threads(void)
{
ASSERT32FLAT();
if (! CONFIG_THREADS)
// Turn on RTC irqs and arrange for them to check the 32bit threads.
void
-start_preempt()
+start_preempt(void)
{
if (! CONFIG_THREADS || ! CONFIG_THREAD_OPTIONROMS)
return;
// Turn off RTC irqs / stop checking for thread execution.
void
-finish_preempt()
+finish_preempt(void)
{
if (! CONFIG_THREADS || ! CONFIG_THREAD_OPTIONROMS)
return;
dprintf(1, "Done preempt - %d checks\n", PreemptCount);
}
-extern void yield_preempt();
+extern void yield_preempt(void);
#if MODESEGMENT == 0
// Try to execute 32bit threads.
void VISIBLE32FLAT
-yield_preempt()
+yield_preempt(void)
{
PreemptCount++;
switch_next(&MainThread);
// 16bit code that checks if threads are pending and executes them if so.
void
-check_preempt()
+check_preempt(void)
{
if (! CONFIG_THREADS || ! CONFIG_THREAD_OPTIONROMS
|| !GET_GLOBAL(CanPreempt)
#define UNIQSEC __FILE__ "." __stringify(__LINE__)
#define __noreturn __attribute__((noreturn))
-extern void __force_link_error__only_in_32bit_flat() __noreturn;
-extern void __force_link_error__only_in_32bit_segmented() __noreturn;
-extern void __force_link_error__only_in_16bit() __noreturn;
+extern void __force_link_error__only_in_32bit_flat(void) __noreturn;
+extern void __force_link_error__only_in_32bit_segmented(void) __noreturn;
+extern void __force_link_error__only_in_16bit(void) __noreturn;
#define __ASM(code) asm(".section .text.asm." UNIQSEC "\n\t" code)
}
void
-usb_keyboard_setup()
+usb_keyboard_setup(void)
{
if (! CONFIG_USB_KEYBOARD)
return;
}
void
-usb_check_key()
+usb_check_key(void)
{
if (! CONFIG_USB_KEYBOARD)
return;
struct usb_interface_descriptor;
int usb_keyboard_init(u32 endp, struct usb_interface_descriptor *iface
, int imax);
-void usb_keyboard_setup();
-void usb_check_key();
+void usb_keyboard_setup(void);
+void usb_check_key(void);
/****************************************************************
}
void
-usb_setup()
+usb_setup(void)
{
if (! CONFIG_USB)
return;
#define USB_MAXADDR 127
// usb.c
-void usb_setup();
+void usb_setup(void);
int configure_usb_device(struct usb_s *cntl, int lowspeed);
struct usb_ctrlrequest;
int send_default_control(u32 endp, const struct usb_ctrlrequest *req
);
void
-check_irqs()
+check_irqs(void)
{
if (MODE16) {
asm volatile(
// See if a keystroke is pending in the keyboard buffer.
static int
-check_for_keystroke()
+check_for_keystroke(void)
{
struct bregs br;
memset(&br, 0, sizeof(br));
// Return a keystroke - waiting forever if necessary.
static int
-get_raw_keystroke()
+get_raw_keystroke(void)
{
struct bregs br;
memset(&br, 0, sizeof(br));
return word;
}
-static inline u32 getesp() {
+static inline u32 getesp(void) {
u32 esp;
asm("movl %%esp, %0" : "=rm"(esp));
return esp;
extern void irq_trampoline_ ##nr (); \
__call16_int((callregs), (u32)&irq_trampoline_ ##nr ); \
} while (0)
-void check_irqs();
+void check_irqs(void);
u8 checksum_far(u16 buf_seg, void *buf_far, u32 len);
u8 checksum(void *buf, u32 len);
size_t strlen(const char *s);
// stacks.c
inline u32 stack_hop(u32 eax, u32 edx, u32 ecx, void *func);
extern struct thread_info MainThread;
-void thread_setup();
-struct thread_info *getCurThread();
-void yield();
+void thread_setup(void);
+struct thread_info *getCurThread(void);
+void yield(void);
void run_thread(void (*func)(void*), void *data);
-void wait_threads();
-void start_preempt();
-void finish_preempt();
-void check_preempt();
+void wait_threads(void);
+void start_preempt(void);
+void finish_preempt(void);
+void check_preempt(void);
// output.c
-void debug_serial_setup();
+void debug_serial_setup(void);
void panic(const char *fmt, ...)
__attribute__ ((format (printf, 1, 2))) __noreturn;
void printf(const char *fmt, ...)
void hexdump(const void *d, int len);
// kbd.c
-void kbd_setup();
+void kbd_setup(void);
void handle_15c2(struct bregs *regs);
void process_key(u8 key);
// mouse.c
-void mouse_setup();
+void mouse_setup(void);
void process_mouse(u8 data);
// system.c
extern u32 RamSize;
extern u64 RamSizeOver4G;
-void mathcp_setup();
+void mathcp_setup(void);
// serial.c
-void serial_setup();
-void lpt_setup();
+void serial_setup(void);
+void lpt_setup(void);
// clock.c
static inline int check_time(u64 end) {
return (s64)(rdtscll() - end) > 0;
}
-void timer_setup();
+void timer_setup(void);
void ndelay(u32 count);
void udelay(u32 count);
void mdelay(u32 count);
u64 calc_future_tsc_usec(u32 usecs);
void handle_1583(struct bregs *regs);
void handle_1586(struct bregs *regs);
-void useRTC();
-void releaseRTC();
+void useRTC(void);
+void releaseRTC(void);
// apm.c
void handle_1553(struct bregs *regs);
void bios32_setup(void);
// shadow.c
-void make_bios_writable();
-void make_bios_readonly();
+void make_bios_writable(void);
+void make_bios_readonly(void);
// pciinit.c
void pci_setup(void);
// smm.c
-void smm_init();
+void smm_init(void);
// smp.c
extern u32 CountCPUs;
int cbfs_copy_optionrom(void *dst, u32 maxlen, u32 vendev);
void cbfs_run_payload(struct cbfs_file *file);
-void coreboot_copy_biostable();
-void coreboot_setup();
+void coreboot_copy_biostable(void);
+void coreboot_setup(void);
// vgahooks.c
extern int VGAbdf;
-void handle_155f();
+void handle_155f(struct bregs *regs);
void vgahook_setup(const char *vendor, const char *part);
// optionroms.c
void call_bcv(u16 seg, u16 ip);
-void optionrom_setup();
-void vga_setup();
-void s3_resume_vga_init();
+void optionrom_setup(void);
+void vga_setup(void);
+void s3_resume_vga_init(void);
extern u32 RomEnd;
// resume.c
-void init_dma();
+void init_dma(void);
// pnpbios.c
#define PNP_SIGNATURE 0x506e5024 // $PnP
-u16 get_pnp_offset();
-void pnp_setup();
+u16 get_pnp_offset(void);
+void pnp_setup(void);
// pmm.c
extern struct zone_s ZoneLow, ZoneHigh, ZoneFSeg, ZoneTmpLow, ZoneTmpHigh;
-void malloc_setup();
-void malloc_finalize();
+void malloc_setup(void);
+void malloc_finalize(void);
void *pmm_malloc(struct zone_s *zone, u32 handle, u32 size, u32 align);
int pmm_free(void *data);
-void pmm_setup();
-void pmm_finalize();
+void pmm_setup(void);
+void pmm_finalize(void);
#define PMM_DEFAULT_HANDLE 0xFFFFFFFF
// Minimum alignment of malloc'd memory
#define MALLOC_MIN_ALIGN 16
void mtrr_setup(void);
// romlayout.S
-void reset_vector() __noreturn;
+void reset_vector(void) __noreturn;
// misc.c
extern u8 BiosChecksum;
}
static int
-getAMDRamSpeed()
+getAMDRamSpeed(void)
{
int bdf = pci_find_device(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MEMCTL);
if (bdf < 0)
}
static u16
-cirrus_get_crtc()
+cirrus_get_crtc(void)
{
if (inb(VGAREG_READ_MISC_OUTPUT) & 1)
return VGAREG_VGA_CRTC_ADDRESS;
}
static int
-cirrus_check()
+cirrus_check(void)
{
outw(0x9206, VGAREG_SEQU_ADDRESS);
return inb(VGAREG_SEQU_DATA) == 0x12;
}
void
-cirrus_init()
+cirrus_init(void)
{
dprintf(1, "cirrus init\n");
if (! cirrus_check())
****************************************************************/
static void
-init_bios_area()
+init_bios_area(void)
{
// init detected hardware BIOS Area
// set 80x25 color (not clear from RBIL but usual)
****************************************************************/
void
-vgahw_screen_disable()
+vgahw_screen_disable(void)
{
inb(VGAREG_ACTL_RESET);
outb(0x00, VGAREG_ACTL_ADDRESS);
}
void
-vgahw_screen_enable()
+vgahw_screen_enable(void)
{
inb(VGAREG_ACTL_RESET);
outb(0x20, VGAREG_ACTL_ADDRESS);
}
u8
-vgahw_get_overscan_border_color()
+vgahw_get_overscan_border_color(void)
{
inb(VGAREG_ACTL_RESET);
outb(0x11, VGAREG_ACTL_ADDRESS);
}
u8
-vgahw_get_pel_mask()
+vgahw_get_pel_mask(void)
{
return inb(VGAREG_PEL_MASK);
}
}
void
-get_font_access()
+get_font_access(void)
{
outw(0x0100, VGAREG_SEQU_ADDRESS);
outw(0x0402, VGAREG_SEQU_ADDRESS);
}
void
-release_font_access()
+release_font_access(void)
{
outw(0x0100, VGAREG_SEQU_ADDRESS);
outw(0x0302, VGAREG_SEQU_ADDRESS);
****************************************************************/
static u16
-get_crtc()
+get_crtc(void)
{
return GET_BDA(crtc_address);
}
// Get vertical display end
u16
-vgahw_get_vde()
+vgahw_get_vde(void)
{
u16 crtc_addr = get_crtc();
outb(0x12, crtc_addr);
}
void
-vgahw_init()
+vgahw_init(void)
{
// switch to color mode and enable CPU access 480 lines
outb(0xc3, VGAREG_WRITE_MISC_OUTPUT);
, u16 start, u8 destflags, u8 fontsize);
// vgaio.c
-void vgahw_screen_disable();
-void vgahw_screen_enable();
+void vgahw_screen_disable(void);
+void vgahw_screen_enable(void);
void vgahw_set_border_color(u8 color);
void vgahw_set_overscan_border_color(u8 color);
-u8 vgahw_get_overscan_border_color();
+u8 vgahw_get_overscan_border_color(void);
void vgahw_set_palette(u8 palid);
void vgahw_set_single_palette_reg(u8 reg, u8 val);
u8 vgahw_get_single_palette_reg(u8 reg);
void vgahw_set_dac_regs(u16 seg, u8 *data_far, u8 start, int count);
void vgahw_get_dac_regs(u16 seg, u8 *data_far, u8 start, int count);
void vgahw_set_pel_mask(u8 val);
-u8 vgahw_get_pel_mask();
+u8 vgahw_get_pel_mask(void);
void vgahw_save_dac_state(u16 seg, struct saveDACcolors *info);
void vgahw_restore_dac_state(u16 seg, struct saveDACcolors *info);
void vgahw_sequ_write(u8 index, u8 value);
void vgahw_grdc_write(u8 index, u8 value);
void vgahw_set_text_block_specifier(u8 spec);
-void get_font_access();
-void release_font_access();
+void get_font_access(void);
+void release_font_access(void);
void vgahw_set_cursor_shape(u8 start, u8 end);
void vgahw_set_active_page(u16 address);
void vgahw_set_cursor_pos(u16 address);
void vgahw_set_scan_lines(u8 lines);
-u16 vgahw_get_vde();
+u16 vgahw_get_vde(void);
void vgahw_save_state(u16 seg, struct saveVideoHardware *info);
void vgahw_restore_state(u16 seg, struct saveVideoHardware *info);
void vgahw_set_mode(struct VideoParam_s *vparam_g);
void vgahw_enable_video_addressing(u8 disable);
-void vgahw_init();
+void vgahw_init(void);
// clext.c
void cirrus_set_video_mode(u8 mode);
-void cirrus_init();
+void cirrus_init(void);
// vbe.c -- not implemented yet.
#define VBE_DISPI_DISABLED 0x00
void dispi_set_enable(int enable);
-void vbe_init();
-int vbe_has_vbe_display();
+void vbe_init(void);
+int vbe_has_vbe_display(void);
#endif // vgatables.h