2 #include "types.h" // u8
9 #define VGAREG_ACTL_ADDRESS 0x3c0
10 #define VGAREG_ACTL_WRITE_DATA 0x3c0
11 #define VGAREG_ACTL_READ_DATA 0x3c1
13 #define VGAREG_INPUT_STATUS 0x3c2
14 #define VGAREG_WRITE_MISC_OUTPUT 0x3c2
15 #define VGAREG_VIDEO_ENABLE 0x3c3
16 #define VGAREG_SEQU_ADDRESS 0x3c4
17 #define VGAREG_SEQU_DATA 0x3c5
19 #define VGAREG_PEL_MASK 0x3c6
20 #define VGAREG_DAC_STATE 0x3c7
21 #define VGAREG_DAC_READ_ADDRESS 0x3c7
22 #define VGAREG_DAC_WRITE_ADDRESS 0x3c8
23 #define VGAREG_DAC_DATA 0x3c9
25 #define VGAREG_READ_FEATURE_CTL 0x3ca
26 #define VGAREG_READ_MISC_OUTPUT 0x3cc
28 #define VGAREG_GRDC_ADDRESS 0x3ce
29 #define VGAREG_GRDC_DATA 0x3cf
31 #define VGAREG_MDA_CRTC_ADDRESS 0x3b4
32 #define VGAREG_MDA_CRTC_DATA 0x3b5
33 #define VGAREG_VGA_CRTC_ADDRESS 0x3d4
34 #define VGAREG_VGA_CRTC_DATA 0x3d5
36 #define VGAREG_MDA_WRITE_FEATURE_CTL 0x3ba
37 #define VGAREG_VGA_WRITE_FEATURE_CTL 0x3da
38 #define VGAREG_ACTL_RESET 0x3da
40 #define VGAREG_MDA_MODECTL 0x3b8
41 #define VGAREG_CGA_MODECTL 0x3d8
42 #define VGAREG_CGA_PALETTE 0x3d9
45 #define VGAMEM_GRAPH 0xA000
46 #define VGAMEM_CTEXT 0xB800
47 #define VGAMEM_MTEXT 0xB000
51 * Tables of default values for each mode
76 #define SCREEN_SIZE(x,y) (((x*y*2)|0x00ff)+1)
77 #define SCREEN_MEM_START(x,y,p) ((((x*y*2)|0x00ff)+1)*p)
78 #define SCREEN_IO_START(x,y,p) ((((x*y)|0x00ff)+1)*p)
81 extern u16 video_save_pointer_table[];
85 u8 class; /* TEXT, GRAPH */
86 u8 memmodel; /* CTEXT,MTEXT,CGA,PL1,PL2,PL4,P8,P15,P16,P24,P32 */
90 u8 dacmodel; /* 0 1 2 3 */
93 extern struct vgamodes_s vga_modes[];
96 #define DAC_MAX_MODEL 3
98 extern u8 line_to_vpti[];
101 /* standard BIOS Video Parameter Table */
102 struct VideoParamTableEntry_s {
114 extern struct VideoParamTableEntry_s video_param_table[];
115 extern u8 palette0[];
116 extern u8 palette1[];
117 extern u8 palette2[];
118 extern u8 palette3[];
119 extern u8 static_functionality[];
122 extern u8 vgafont8[];
123 extern u8 vgafont14[];
124 extern u8 vgafont16[];
125 extern u8 vgafont14alt[];
126 extern u8 vgafont16alt[];
129 void biosfn_set_single_palette_reg(u8 reg, u8 val);
130 u8 biosfn_get_single_palette_reg(u8 reg);
133 void cirrus_set_video_mode(u8 mode);