1 // VGA bios implementation
3 // Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2001-2008 the LGPL VGABios developers Team
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
10 // * review correctness of converted asm by comparing with RBIL
12 // * convert vbe/clext code
14 #include "bregs.h" // struct bregs
15 #include "biosvar.h" // GET_BDA
16 #include "util.h" // memset
17 #include "vgabios.h" // find_vga_entry
18 #include "optionroms.h" // struct pci_data
19 #include "config.h" // CONFIG_*
20 #include "vbe.h" // struct vbe_info
21 #include "geodelx.h" // geodelx_init
22 #include "bochsvga.h" // bochsvga_init
25 #define DEBUG_VGA_POST 1
26 #define DEBUG_VGA_10 3
29 /****************************************************************
31 ****************************************************************/
32 #if CONFIG_VGA_PCI == 1
33 struct pci_data rom_pci_data VAR16VISIBLE = {
34 .signature = PCI_ROM_SIGNATURE,
35 .vendor = CONFIG_VGA_VID,
36 .device = CONFIG_VGA_DID,
40 .type = PCIROM_CODETYPE_X86,
45 /****************************************************************
47 ****************************************************************/
50 call16_vgaint(u32 eax, u32 ebx)
62 perform_gray_scale_summing(u16 start, u16 count)
64 vgahw_screen_disable();
66 for (i = start; i < start+count; i++) {
68 vgahw_get_dac_regs(GET_SEG(SS), rgb, i, 1);
70 // intensity = ( 0.3 * Red ) + ( 0.59 * Green ) + ( 0.11 * Blue )
71 u16 intensity = ((77 * rgb[0] + 151 * rgb[1] + 28 * rgb[2]) + 0x80) >> 8;
75 vgahw_set_dac_regs(GET_SEG(SS), rgb, i, 1);
77 vgahw_screen_enable();
81 set_cursor_shape(u8 start, u8 end)
86 u16 curs = (start << 8) + end;
87 SET_BDA(cursor_type, curs);
89 u8 modeset_ctl = GET_BDA(modeset_ctl);
90 u16 cheight = GET_BDA(char_height);
91 if ((modeset_ctl & 0x01) && (cheight > 8) && (end < 8) && (start < 0x20)) {
92 if (end != (start + 1))
93 start = ((start + 1) * cheight / 8) - 1;
95 start = ((end + 1) * cheight / 8) - 2;
96 end = ((end + 1) * cheight / 8) - 1;
98 vgahw_set_cursor_shape(start, end);
102 get_cursor_shape(u8 page)
106 // FIXME should handle VGA 14/16 lines
107 return GET_BDA(cursor_type);
111 set_cursor_pos(struct cursorpos cp)
113 // Should not happen...
118 SET_BDA(cursor_pos[cp.page], (cp.y << 8) | cp.x);
120 // Set the hardware cursor
121 u8 current = GET_BDA(video_page);
122 if (cp.page != current)
125 // Get the dimensions
126 u16 nbcols = GET_BDA(video_cols);
127 u16 nbrows = GET_BDA(video_rows) + 1;
129 // Calculate the address knowing nbcols nbrows and page num
130 u16 address = (SCREEN_IO_START(nbcols, nbrows, cp.page)
131 + cp.x + cp.y * nbcols);
133 vgahw_set_cursor_pos(address);
136 static struct cursorpos
137 get_cursor_pos(u8 page)
140 // special case - use current page
141 page = GET_BDA(video_page);
143 struct cursorpos cp = { 0, 0, 0xfe };
146 // FIXME should handle VGA 14/16 lines
147 u16 xy = GET_BDA(cursor_pos[page]);
148 struct cursorpos cp = {xy, xy>>8, page};
153 set_active_page(u8 page)
159 struct vgamode_s *vmode_g = find_vga_entry(GET_BDA(video_mode));
163 // Get pos curs pos for the right page
164 struct cursorpos cp = get_cursor_pos(page);
167 if (GET_GLOBAL(vmode_g->memmodel) & TEXT) {
168 // Get the dimensions
169 u16 nbcols = GET_BDA(video_cols);
170 u16 nbrows = GET_BDA(video_rows) + 1;
172 // Calculate the address knowing nbcols nbrows and page num
173 address = SCREEN_MEM_START(nbcols, nbrows, page);
174 SET_BDA(video_pagestart, address);
177 address = SCREEN_IO_START(nbcols, nbrows, page);
179 address = page * GET_GLOBAL(vmode_g->slength);
182 vgahw_set_active_page(address);
184 // And change the BIOS page
185 SET_BDA(video_page, page);
187 dprintf(1, "Set active page %02x address %04x\n", page, address);
189 // Display the cursor, now the page is active
194 set_scan_lines(u8 lines)
196 vgahw_set_scan_lines(lines);
198 set_cursor_shape(0x06, 0x07);
200 set_cursor_shape(lines - 4, lines - 3);
201 SET_BDA(char_height, lines);
202 u16 vde = vgahw_get_vde();
203 u8 rows = vde / lines;
204 SET_BDA(video_rows, rows - 1);
205 u16 cols = GET_BDA(video_cols);
206 SET_BDA(video_pagesize, rows * cols * 2);
210 /****************************************************************
212 ****************************************************************/
214 // Scroll the screen one line. This function is designed to be called
215 // tail-recursive to reduce stack usage.
217 scroll_one(u16 nbrows, u16 nbcols, u8 page)
219 struct cursorpos ul = {0, 0, page};
220 struct cursorpos lr = {nbcols-1, nbrows-1, page};
221 vgafb_scroll(1, -1, ul, lr);
224 // Write a character to the screen at a given position. Implement
225 // special characters and scroll the screen if necessary.
227 write_teletype(struct cursorpos *pcp, struct carattr ca)
229 struct cursorpos cp = *pcp;
231 // Get the dimensions
232 u16 nbrows = GET_BDA(video_rows) + 1;
233 u16 nbcols = GET_BDA(video_cols);
251 struct carattr dummyca = {' ', ca.attr, ca.use_attr};
252 vgafb_write_char(cp, dummyca);
254 } while (cp.x < nbcols && cp.x % 8);
257 vgafb_write_char(cp, ca);
261 // Do we need to wrap ?
262 if (cp.x == nbcols) {
266 // Do we need to scroll ?
274 scroll_one(nbrows, nbcols, cp.page);
277 // Write out a buffer of alternating characters and attributes.
279 write_attr_string(struct cursorpos *pcp, u16 count, u16 seg, u8 *offset_far)
282 u8 car = GET_FARVAR(seg, *offset_far);
284 u8 attr = GET_FARVAR(seg, *offset_far);
287 struct carattr ca = {car, attr, 1};
288 write_teletype(pcp, ca);
292 // Write out a buffer of characters.
294 write_string(struct cursorpos *pcp, u8 attr, u16 count, u16 seg, u8 *offset_far)
297 u8 car = GET_FARVAR(seg, *offset_far);
300 struct carattr ca = {car, attr, 1};
301 write_teletype(pcp, ca);
306 /****************************************************************
307 * Save and restore bda state
308 ****************************************************************/
311 save_bda_state(u16 seg, struct saveBDAstate *info)
313 SET_FARVAR(seg, info->video_mode, GET_BDA(video_mode));
314 SET_FARVAR(seg, info->video_cols, GET_BDA(video_cols));
315 SET_FARVAR(seg, info->video_pagesize, GET_BDA(video_pagesize));
316 SET_FARVAR(seg, info->crtc_address, GET_BDA(crtc_address));
317 SET_FARVAR(seg, info->video_rows, GET_BDA(video_rows));
318 SET_FARVAR(seg, info->char_height, GET_BDA(char_height));
319 SET_FARVAR(seg, info->video_ctl, GET_BDA(video_ctl));
320 SET_FARVAR(seg, info->video_switches, GET_BDA(video_switches));
321 SET_FARVAR(seg, info->modeset_ctl, GET_BDA(modeset_ctl));
322 SET_FARVAR(seg, info->cursor_type, GET_BDA(cursor_type));
325 SET_FARVAR(seg, info->cursor_pos[i], GET_BDA(cursor_pos[i]));
326 SET_FARVAR(seg, info->video_pagestart, GET_BDA(video_pagestart));
327 SET_FARVAR(seg, info->video_page, GET_BDA(video_page));
329 SET_FARVAR(seg, info->font0, GET_IVT(0x1f));
330 SET_FARVAR(seg, info->font1, GET_IVT(0x43));
334 restore_bda_state(u16 seg, struct saveBDAstate *info)
336 SET_BDA(video_mode, GET_FARVAR(seg, info->video_mode));
337 SET_BDA(video_cols, GET_FARVAR(seg, info->video_cols));
338 SET_BDA(video_pagesize, GET_FARVAR(seg, info->video_pagesize));
339 SET_BDA(crtc_address, GET_FARVAR(seg, info->crtc_address));
340 SET_BDA(video_rows, GET_FARVAR(seg, info->video_rows));
341 SET_BDA(char_height, GET_FARVAR(seg, info->char_height));
342 SET_BDA(video_ctl, GET_FARVAR(seg, info->video_ctl));
343 SET_BDA(video_switches, GET_FARVAR(seg, info->video_switches));
344 SET_BDA(modeset_ctl, GET_FARVAR(seg, info->modeset_ctl));
345 SET_BDA(cursor_type, GET_FARVAR(seg, info->cursor_type));
347 for (i = 0; i < 8; i++)
348 SET_BDA(cursor_pos[i], GET_FARVAR(seg, info->cursor_pos[i]));
349 SET_BDA(video_pagestart, GET_FARVAR(seg, info->video_pagestart));
350 SET_BDA(video_page, GET_FARVAR(seg, info->video_page));
352 SET_IVT(0x1f, GET_FARVAR(seg, info->font0));
353 SET_IVT(0x43, GET_FARVAR(seg, info->font1));
357 /****************************************************************
359 ****************************************************************/
363 vga_set_mode(u8 mode, u8 noclearmem)
365 // find the entry in the video modes
366 struct vgamode_s *vmode_g = find_vga_entry(mode);
367 dprintf(1, "mode search %02x found %p\n", mode, vmode_g);
371 // Read the bios mode set control
372 u8 modeset_ctl = GET_BDA(modeset_ctl);
374 // Then we know the number of lines
377 // if palette loading (bit 3 of modeset ctl = 0)
378 if ((modeset_ctl & 0x08) == 0) { // Set the PEL mask
379 vgahw_set_pel_mask(GET_GLOBAL(vmode_g->pelmask));
381 // From which palette
382 u8 *palette_g = GET_GLOBAL(vmode_g->dac);
383 u16 palsize = GET_GLOBAL(vmode_g->dacsize) / 3;
385 // Always 256*3 values
386 vgahw_set_dac_regs(get_global_seg(), palette_g, 0, palsize);
388 for (i = palsize; i < 0x0100; i++) {
389 static u8 rgb[3] VAR16;
390 vgahw_set_dac_regs(get_global_seg(), rgb, i, 1);
393 if ((modeset_ctl & 0x02) == 0x02)
394 perform_gray_scale_summing(0x00, 0x100);
397 vgahw_set_mode(vmode_g);
399 if (noclearmem == 0x00)
400 clear_screen(vmode_g);
402 // Set CRTC address VGA or MDA
403 u16 crtc_addr = VGAREG_VGA_CRTC_ADDRESS;
404 if (GET_GLOBAL(vmode_g->memmodel) == MTEXT)
405 crtc_addr = VGAREG_MDA_CRTC_ADDRESS;
408 u16 cheight = GET_GLOBAL(vmode_g->cheight);
409 SET_BDA(video_mode, mode);
410 SET_BDA(video_cols, GET_GLOBAL(vmode_g->twidth));
411 SET_BDA(video_pagesize, GET_GLOBAL(vmode_g->slength));
412 SET_BDA(crtc_address, crtc_addr);
413 SET_BDA(video_rows, GET_GLOBAL(vmode_g->theight)-1);
414 SET_BDA(char_height, cheight);
415 SET_BDA(video_ctl, (0x60 | noclearmem));
416 SET_BDA(video_switches, 0xF9);
417 SET_BDA(modeset_ctl, GET_BDA(modeset_ctl) & 0x7f);
419 // FIXME We nearly have the good tables. to be reworked
420 SET_BDA(dcc_index, 0x08); // 8 is VGA should be ok for now
421 SET_BDA(video_savetable
422 , SEGOFF(get_global_seg(), (u32)&video_save_pointer_table));
425 SET_BDA(video_msr, 0x00); // Unavailable on vanilla vga, but...
426 SET_BDA(video_pal, 0x00); // Unavailable on vanilla vga, but...
429 if (GET_GLOBAL(vmode_g->memmodel) & TEXT)
430 set_cursor_shape(0x06, 0x07);
431 // Set cursor pos for page 0..7
433 for (i = 0; i < 8; i++) {
434 struct cursorpos cp = {0, 0, i};
439 set_active_page(0x00);
441 // Write the fonts in memory
442 if (GET_GLOBAL(vmode_g->memmodel) & TEXT) {
443 call16_vgaint(0x1104, 0);
444 call16_vgaint(0x1103, 0);
446 // Set the ints 0x1F and 0x43
447 SET_IVT(0x1f, SEGOFF(get_global_seg(), (u32)&vgafont8[128 * 8]));
451 SET_IVT(0x43, SEGOFF(get_global_seg(), (u32)vgafont8));
454 SET_IVT(0x43, SEGOFF(get_global_seg(), (u32)vgafont14));
457 SET_IVT(0x43, SEGOFF(get_global_seg(), (u32)vgafont16));
463 handle_1000(struct bregs *regs)
465 u8 noclearmem = regs->al & 0x80;
466 u8 mode = regs->al & 0x7f;
476 if (CONFIG_VGA_CIRRUS) {
477 int ret = cirrus_set_video_mode(mode, noclearmem);
482 if (bochsvga_enabled())
483 bochsvga_hires_enable(0);
485 vga_set_mode(mode, noclearmem);
489 handle_1001(struct bregs *regs)
491 set_cursor_shape(regs->ch, regs->cl);
495 handle_1002(struct bregs *regs)
497 struct cursorpos cp = {regs->dl, regs->dh, regs->bh};
502 handle_1003(struct bregs *regs)
504 regs->cx = get_cursor_shape(regs->bh);
505 struct cursorpos cp = get_cursor_pos(regs->bh);
510 // Read light pen pos (unimplemented)
512 handle_1004(struct bregs *regs)
515 regs->ax = regs->bx = regs->cx = regs->dx = 0;
519 handle_1005(struct bregs *regs)
521 set_active_page(regs->al);
525 verify_scroll(struct bregs *regs, int dir)
527 u8 page = GET_BDA(video_page);
528 struct cursorpos ul = {regs->cl, regs->ch, page};
529 struct cursorpos lr = {regs->dl, regs->dh, page};
531 u16 nbrows = GET_BDA(video_rows) + 1;
534 u16 nbcols = GET_BDA(video_cols);
538 if (ul.x > lr.x || ul.y > lr.y)
541 u16 nblines = regs->al;
542 if (!nblines || nblines > lr.y - ul.y + 1)
543 nblines = lr.y - ul.y + 1;
545 vgafb_scroll(dir * nblines, regs->bh, ul, lr);
549 handle_1006(struct bregs *regs)
551 verify_scroll(regs, 1);
555 handle_1007(struct bregs *regs)
557 verify_scroll(regs, -1);
561 handle_1008(struct bregs *regs)
563 struct carattr ca = vgafb_read_char(get_cursor_pos(regs->bh));
569 write_chars(u8 page, struct carattr ca, u16 count)
571 struct cursorpos cp = get_cursor_pos(page);
573 vgafb_write_char(cp, ca);
579 handle_1009(struct bregs *regs)
581 struct carattr ca = {regs->al, regs->bl, 1};
582 write_chars(regs->bh, ca, regs->cx);
586 handle_100a(struct bregs *regs)
588 struct carattr ca = {regs->al, regs->bl, 0};
589 write_chars(regs->bh, ca, regs->cx);
594 handle_100b00(struct bregs *regs)
596 vgahw_set_border_color(regs->bl);
600 handle_100b01(struct bregs *regs)
602 vgahw_set_palette(regs->bl);
606 handle_100bXX(struct bregs *regs)
612 handle_100b(struct bregs *regs)
615 case 0x00: handle_100b00(regs); break;
616 case 0x01: handle_100b01(regs); break;
617 default: handle_100bXX(regs); break;
623 handle_100c(struct bregs *regs)
625 // XXX - page (regs->bh) is unused
626 vgafb_write_pixel(regs->al, regs->cx, regs->dx);
630 handle_100d(struct bregs *regs)
632 // XXX - page (regs->bh) is unused
633 regs->al = vgafb_read_pixel(regs->cx, regs->dx);
637 handle_100e(struct bregs *regs)
639 // Ralf Brown Interrupt list is WRONG on bh(page)
640 // We do output only on the current page !
641 struct carattr ca = {regs->al, regs->bl, 0};
642 struct cursorpos cp = get_cursor_pos(0xff);
643 write_teletype(&cp, ca);
648 handle_100f(struct bregs *regs)
650 regs->bh = GET_BDA(video_page);
651 regs->al = GET_BDA(video_mode) | (GET_BDA(video_ctl) & 0x80);
652 regs->ah = GET_BDA(video_cols);
657 handle_101000(struct bregs *regs)
661 vgahw_set_single_palette_reg(regs->bl, regs->bh);
665 handle_101001(struct bregs *regs)
667 vgahw_set_overscan_border_color(regs->bh);
671 handle_101002(struct bregs *regs)
673 vgahw_set_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
677 handle_101003(struct bregs *regs)
679 vgahw_toggle_intensity(regs->bl);
683 handle_101007(struct bregs *regs)
687 regs->bh = vgahw_get_single_palette_reg(regs->bl);
691 handle_101008(struct bregs *regs)
693 regs->bh = vgahw_get_overscan_border_color();
697 handle_101009(struct bregs *regs)
699 vgahw_get_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
703 handle_101010(struct bregs *regs)
705 u8 rgb[3] = {regs->dh, regs->ch, regs->cl};
706 vgahw_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
710 handle_101012(struct bregs *regs)
712 vgahw_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
716 handle_101013(struct bregs *regs)
718 vgahw_select_video_dac_color_page(regs->bl, regs->bh);
722 handle_101015(struct bregs *regs)
725 vgahw_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
732 handle_101017(struct bregs *regs)
734 vgahw_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
738 handle_101018(struct bregs *regs)
740 vgahw_set_pel_mask(regs->bl);
744 handle_101019(struct bregs *regs)
746 regs->bl = vgahw_get_pel_mask();
750 handle_10101a(struct bregs *regs)
752 vgahw_read_video_dac_state(®s->bl, ®s->bh);
756 handle_10101b(struct bregs *regs)
758 perform_gray_scale_summing(regs->bx, regs->cx);
762 handle_1010XX(struct bregs *regs)
768 handle_1010(struct bregs *regs)
771 case 0x00: handle_101000(regs); break;
772 case 0x01: handle_101001(regs); break;
773 case 0x02: handle_101002(regs); break;
774 case 0x03: handle_101003(regs); break;
775 case 0x07: handle_101007(regs); break;
776 case 0x08: handle_101008(regs); break;
777 case 0x09: handle_101009(regs); break;
778 case 0x10: handle_101010(regs); break;
779 case 0x12: handle_101012(regs); break;
780 case 0x13: handle_101013(regs); break;
781 case 0x15: handle_101015(regs); break;
782 case 0x17: handle_101017(regs); break;
783 case 0x18: handle_101018(regs); break;
784 case 0x19: handle_101019(regs); break;
785 case 0x1a: handle_10101a(regs); break;
786 case 0x1b: handle_10101b(regs); break;
787 default: handle_1010XX(regs); break;
793 handle_101100(struct bregs *regs)
795 vgafb_load_font(regs->es, (void*)(regs->bp+0), regs->cx
796 , regs->dx, regs->bl, regs->bh);
800 handle_101101(struct bregs *regs)
802 vgafb_load_font(get_global_seg(), vgafont14, 0x100, 0, regs->bl, 14);
806 handle_101102(struct bregs *regs)
808 vgafb_load_font(get_global_seg(), vgafont8, 0x100, 0, regs->bl, 8);
812 handle_101103(struct bregs *regs)
814 vgahw_set_text_block_specifier(regs->bl);
818 handle_101104(struct bregs *regs)
820 vgafb_load_font(get_global_seg(), vgafont16, 0x100, 0, regs->bl, 16);
824 handle_101110(struct bregs *regs)
826 vgafb_load_font(regs->es, (void*)(regs->bp+0), regs->cx
827 , regs->dx, regs->bl, regs->bh);
828 set_scan_lines(regs->bh);
832 handle_101111(struct bregs *regs)
834 vgafb_load_font(get_global_seg(), vgafont14, 0x100, 0, regs->bl, 14);
839 handle_101112(struct bregs *regs)
841 vgafb_load_font(get_global_seg(), vgafont8, 0x100, 0, regs->bl, 8);
846 handle_101114(struct bregs *regs)
848 vgafb_load_font(get_global_seg(), vgafont16, 0x100, 0, regs->bl, 16);
853 handle_101130(struct bregs *regs)
857 struct segoff_s so = GET_IVT(0x1f);
859 regs->bp = so.offset;
863 struct segoff_s so = GET_IVT(0x43);
865 regs->bp = so.offset;
869 regs->es = get_global_seg();
870 regs->bp = (u32)vgafont14;
873 regs->es = get_global_seg();
874 regs->bp = (u32)vgafont8;
877 regs->es = get_global_seg();
878 regs->bp = (u32)vgafont8 + 128 * 8;
881 regs->es = get_global_seg();
882 regs->bp = (u32)vgafont14alt;
885 regs->es = get_global_seg();
886 regs->bp = (u32)vgafont16;
889 regs->es = get_global_seg();
890 regs->bp = (u32)vgafont16alt;
893 dprintf(1, "Get font info BH(%02x) was discarded\n", regs->bh);
896 // Set byte/char of on screen font
897 regs->cx = GET_BDA(char_height) & 0xff;
899 // Set Highest char row
900 regs->dx = GET_BDA(video_rows);
904 handle_1011XX(struct bregs *regs)
910 handle_1011(struct bregs *regs)
913 case 0x00: handle_101100(regs); break;
914 case 0x01: handle_101101(regs); break;
915 case 0x02: handle_101102(regs); break;
916 case 0x03: handle_101103(regs); break;
917 case 0x04: handle_101104(regs); break;
918 case 0x10: handle_101110(regs); break;
919 case 0x11: handle_101111(regs); break;
920 case 0x12: handle_101112(regs); break;
921 case 0x14: handle_101114(regs); break;
922 case 0x30: handle_101130(regs); break;
923 default: handle_1011XX(regs); break;
929 handle_101210(struct bregs *regs)
931 u16 crtc_addr = GET_BDA(crtc_address);
932 if (crtc_addr == VGAREG_MDA_CRTC_ADDRESS)
936 regs->cx = GET_BDA(video_switches) & 0x0f;
940 handle_101230(struct bregs *regs)
942 u8 mctl = GET_BDA(modeset_ctl);
943 u8 vswt = GET_BDA(video_switches);
947 mctl = (mctl & ~0x10) | 0x80;
948 vswt = (vswt & ~0x0f) | 0x08;
953 vswt = (vswt & ~0x0f) | 0x09;
957 mctl = (mctl & ~0x80) | 0x10;
958 vswt = (vswt & ~0x0f) | 0x09;
961 dprintf(1, "Select vert res (%02x) was discarded\n", regs->al);
964 SET_BDA(modeset_ctl, mctl);
965 SET_BDA(video_switches, vswt);
970 handle_101231(struct bregs *regs)
972 u8 v = (regs->al & 0x01) << 3;
973 u8 mctl = GET_BDA(video_ctl) & ~0x08;
974 SET_BDA(video_ctl, mctl | v);
979 handle_101232(struct bregs *regs)
981 vgahw_enable_video_addressing(regs->al);
986 handle_101233(struct bregs *regs)
988 u8 v = ((regs->al << 1) & 0x02) ^ 0x02;
989 u8 v2 = GET_BDA(modeset_ctl) & ~0x02;
990 SET_BDA(modeset_ctl, v | v2);
995 handle_101234(struct bregs *regs)
997 u8 v = (regs->al & 0x01) ^ 0x01;
998 u8 v2 = GET_BDA(modeset_ctl) & ~0x01;
999 SET_BDA(modeset_ctl, v | v2);
1004 handle_101235(struct bregs *regs)
1011 handle_101236(struct bregs *regs)
1018 handle_1012XX(struct bregs *regs)
1024 handle_1012(struct bregs *regs)
1027 case 0x10: handle_101210(regs); break;
1028 case 0x30: handle_101230(regs); break;
1029 case 0x31: handle_101231(regs); break;
1030 case 0x32: handle_101232(regs); break;
1031 case 0x33: handle_101233(regs); break;
1032 case 0x34: handle_101234(regs); break;
1033 case 0x35: handle_101235(regs); break;
1034 case 0x36: handle_101236(regs); break;
1035 default: handle_1012XX(regs); break;
1038 // XXX - cirrus has 1280, 1281, 1282, 1285, 129a, 12a0, 12a1, 12a2, 12ae
1043 static void noinline
1044 handle_1013(struct bregs *regs)
1046 struct cursorpos cp = {regs->dl, regs->dh, regs->bh};
1047 // if row=0xff special case : use current cursor position
1049 cp = get_cursor_pos(cp.page);
1052 write_attr_string(&cp, regs->cx, regs->es, (void*)(regs->bp + 0));
1054 write_string(&cp, regs->bl, regs->cx, regs->es, (void*)(regs->bp + 0));
1062 handle_101a00(struct bregs *regs)
1064 regs->bx = GET_BDA(dcc_index);
1069 handle_101a01(struct bregs *regs)
1071 SET_BDA(dcc_index, regs->bl);
1072 dprintf(1, "Alternate Display code (%02x) was discarded\n", regs->bh);
1077 handle_101aXX(struct bregs *regs)
1083 handle_101a(struct bregs *regs)
1086 case 0x00: handle_101a00(regs); break;
1087 case 0x01: handle_101a01(regs); break;
1088 default: handle_101aXX(regs); break;
1094 struct segoff_s static_functionality;
1114 handle_101b(struct bregs *regs)
1117 struct funcInfo *info = (void*)(regs->di+0);
1118 memset_far(seg, info, 0, sizeof(*info));
1119 // Address of static functionality table
1120 SET_FARVAR(seg, info->static_functionality
1121 , SEGOFF(get_global_seg(), (u32)static_functionality));
1123 // Hard coded copy from BIOS area. Should it be cleaner ?
1124 memcpy_far(seg, info->bda_0x49, SEG_BDA, (void*)0x49
1125 , sizeof(info->bda_0x49));
1126 memcpy_far(seg, info->bda_0x84, SEG_BDA, (void*)0x84
1127 , sizeof(info->bda_0x84));
1129 SET_FARVAR(seg, info->dcc_index, GET_BDA(dcc_index));
1130 SET_FARVAR(seg, info->colors, 16);
1131 SET_FARVAR(seg, info->pages, 8);
1132 SET_FARVAR(seg, info->scan_lines, 2);
1133 SET_FARVAR(seg, info->video_mem, 3);
1139 handle_101c00(struct bregs *regs)
1141 u16 flags = regs->cx;
1144 size += sizeof(struct saveVideoHardware);
1146 size += sizeof(struct saveBDAstate);
1148 size += sizeof(struct saveDACcolors);
1154 handle_101c01(struct bregs *regs)
1156 u16 flags = regs->cx;
1158 void *data = (void*)(regs->bx+0);
1160 vgahw_save_state(seg, data);
1161 data += sizeof(struct saveVideoHardware);
1164 save_bda_state(seg, data);
1165 data += sizeof(struct saveBDAstate);
1168 vgahw_save_dac_state(seg, data);
1173 handle_101c02(struct bregs *regs)
1175 u16 flags = regs->cx;
1177 void *data = (void*)(regs->bx+0);
1179 vgahw_restore_state(seg, data);
1180 data += sizeof(struct saveVideoHardware);
1183 restore_bda_state(seg, data);
1184 data += sizeof(struct saveBDAstate);
1187 vgahw_restore_dac_state(seg, data);
1192 handle_101cXX(struct bregs *regs)
1198 handle_101c(struct bregs *regs)
1201 case 0x00: handle_101c00(regs); break;
1202 case 0x01: handle_101c01(regs); break;
1203 case 0x02: handle_101c02(regs); break;
1204 default: handle_101cXX(regs); break;
1209 handle_104f00(struct bregs *regs)
1212 struct vbe_info *info = (void*)(regs->di+0);
1214 if (GET_FARVAR(seg, info->signature) == VBE2_SIGNATURE) {
1215 dprintf(4, "Get VBE Controller: VBE2 Signature found\n");
1216 } else if (GET_FARVAR(seg, info->signature) == VESA_SIGNATURE) {
1217 dprintf(4, "Get VBE Controller: VESA Signature found\n");
1219 dprintf(4, "Get VBE Controller: Invalid Signature\n");
1222 memset_far(seg, info, 0, sizeof(*info));
1224 SET_FARVAR(seg, info->signature, VESA_SIGNATURE);
1226 SET_FARVAR(seg, info->version, 0x0200);
1228 SET_FARVAR(seg, info->oem_string,
1229 SEGOFF(get_global_seg(), (u32)VBE_OEM_STRING));
1230 SET_FARVAR(seg, info->capabilities, 0x1); /* 8BIT DAC */
1232 /* We generate our mode list in the reserved field of the info block */
1233 SET_FARVAR(seg, info->video_mode, SEGOFF(seg, regs->di + 34));
1235 /* Total memory (in 64 blocks) */
1236 SET_FARVAR(seg, info->total_memory, bochsvga_total_mem());
1238 SET_FARVAR(seg, info->oem_vendor_string,
1239 SEGOFF(get_global_seg(), (u32)VBE_VENDOR_STRING));
1240 SET_FARVAR(seg, info->oem_product_string,
1241 SEGOFF(get_global_seg(), (u32)VBE_PRODUCT_STRING));
1242 SET_FARVAR(seg, info->oem_revision_string,
1243 SEGOFF(get_global_seg(), (u32)VBE_REVISION_STRING));
1245 /* Fill list of modes */
1246 bochsvga_list_modes(seg, regs->di + 32);
1248 regs->al = regs->ah; /* 0x4F, Function supported */
1249 regs->ah = 0x0; /* 0x0, Function call successful */
1253 handle_104f01(struct bregs *regs)
1256 struct vbe_mode_info *info = (void*)(regs->di+0);
1257 u16 mode = regs->cx;
1258 struct vbe_modeinfo modeinfo;
1261 dprintf(1, "VBE mode info request: %x\n", mode);
1263 rc = bochsvga_mode_info(mode, &modeinfo);
1265 dprintf(1, "VBE mode %x not found\n", mode);
1270 u16 mode_attr = VBE_MODE_ATTRIBUTE_SUPPORTED |
1271 VBE_MODE_ATTRIBUTE_EXTENDED_INFORMATION_AVAILABLE |
1272 VBE_MODE_ATTRIBUTE_COLOR_MODE |
1273 VBE_MODE_ATTRIBUTE_GRAPHICS_MODE;
1274 if (modeinfo.depth == 4)
1275 mode_attr |= VBE_MODE_ATTRIBUTE_TTY_BIOS_SUPPORT;
1277 mode_attr |= VBE_MODE_ATTRIBUTE_LINEAR_FRAME_BUFFER_MODE;
1278 SET_FARVAR(seg, info->mode_attributes, mode_attr);
1279 SET_FARVAR(seg, info->winA_attributes,
1280 VBE_WINDOW_ATTRIBUTE_RELOCATABLE |
1281 VBE_WINDOW_ATTRIBUTE_READABLE |
1282 VBE_WINDOW_ATTRIBUTE_WRITEABLE);
1283 SET_FARVAR(seg, info->winB_attributes, 0);
1284 SET_FARVAR(seg, info->win_granularity, 64); /* Bank size 64K */
1285 SET_FARVAR(seg, info->win_size, 64); /* Bank size 64K */
1286 SET_FARVAR(seg, info->winA_seg, 0xA000);
1287 SET_FARVAR(seg, info->winB_seg, 0x0);
1288 SET_FARVAR(seg, info->win_func_ptr.segoff, 0x0);
1289 SET_FARVAR(seg, info->bytes_per_scanline, modeinfo.linesize);
1290 SET_FARVAR(seg, info->xres, modeinfo.width);
1291 SET_FARVAR(seg, info->yres, modeinfo.height);
1292 SET_FARVAR(seg, info->xcharsize, 8);
1293 SET_FARVAR(seg, info->ycharsize, 16);
1294 if (modeinfo.depth == 4)
1295 SET_FARVAR(seg, info->planes, 4);
1297 SET_FARVAR(seg, info->planes, 1);
1298 SET_FARVAR(seg, info->bits_per_pixel, modeinfo.depth);
1299 SET_FARVAR(seg, info->banks,
1300 (modeinfo.linesize * modeinfo.height + 65535) / 65536);
1301 if (modeinfo.depth == 4)
1302 SET_FARVAR(seg, info->mem_model, VBE_MEMORYMODEL_PLANAR);
1303 else if (modeinfo.depth == 8)
1304 SET_FARVAR(seg, info->mem_model, VBE_MEMORYMODEL_PACKED_PIXEL);
1306 SET_FARVAR(seg, info->mem_model, VBE_MEMORYMODEL_DIRECT_COLOR);
1307 SET_FARVAR(seg, info->bank_size, 0);
1308 u32 pages = modeinfo.vram_size / (modeinfo.height * modeinfo.linesize);
1309 if (modeinfo.depth == 4)
1310 SET_FARVAR(seg, info->pages, (pages / 4) - 1);
1312 SET_FARVAR(seg, info->pages, pages - 1);
1313 SET_FARVAR(seg, info->reserved0, 1);
1315 u8 r_size, r_pos, g_size, g_pos, b_size, b_pos, a_size, a_pos;
1317 switch (modeinfo.depth) {
1318 case 15: r_size = 5; r_pos = 10; g_size = 5; g_pos = 5;
1319 b_size = 5; b_pos = 0; a_size = 1; a_pos = 15; break;
1320 case 16: r_size = 5; r_pos = 11; g_size = 6; g_pos = 5;
1321 b_size = 5; b_pos = 0; a_size = 0; a_pos = 0; break;
1322 case 24: r_size = 8; r_pos = 16; g_size = 8; g_pos = 8;
1323 b_size = 8; b_pos = 0; a_size = 0; a_pos = 0; break;
1324 case 32: r_size = 8; r_pos = 16; g_size = 8; g_pos = 8;
1325 b_size = 8; b_pos = 0; a_size = 8; a_pos = 24; break;
1326 default: r_size = 0; r_pos = 0; g_size = 0; g_pos = 0;
1327 b_size = 0; b_pos = 0; a_size = 0; a_pos = 0; break;
1330 SET_FARVAR(seg, info->red_size, r_size);
1331 SET_FARVAR(seg, info->red_pos, r_pos);
1332 SET_FARVAR(seg, info->green_size, g_size);
1333 SET_FARVAR(seg, info->green_pos, g_pos);
1334 SET_FARVAR(seg, info->blue_size, b_size);
1335 SET_FARVAR(seg, info->blue_pos, b_pos);
1336 SET_FARVAR(seg, info->alpha_size, a_size);
1337 SET_FARVAR(seg, info->alpha_pos, a_pos);
1339 if (modeinfo.depth == 32)
1340 SET_FARVAR(seg, info->directcolor_info,
1341 VBE_DIRECTCOLOR_RESERVED_BITS_AVAILABLE);
1343 SET_FARVAR(seg, info->directcolor_info, 0);
1345 if (modeinfo.depth > 4)
1346 SET_FARVAR(seg, info->phys_base, modeinfo.phys_base);
1348 SET_FARVAR(seg, info->phys_base, 0);
1350 SET_FARVAR(seg, info->reserved1, 0);
1351 SET_FARVAR(seg, info->reserved2, 0);
1352 SET_FARVAR(seg, info->linear_bytes_per_scanline, modeinfo.linesize);
1353 SET_FARVAR(seg, info->bank_pages, 0);
1354 SET_FARVAR(seg, info->linear_pages, 0);
1355 SET_FARVAR(seg, info->linear_red_size, r_size);
1356 SET_FARVAR(seg, info->linear_red_pos, r_pos);
1357 SET_FARVAR(seg, info->linear_green_size, g_size);
1358 SET_FARVAR(seg, info->linear_green_pos, g_pos);
1359 SET_FARVAR(seg, info->linear_blue_size, b_size);
1360 SET_FARVAR(seg, info->linear_blue_pos, b_pos);
1361 SET_FARVAR(seg, info->linear_alpha_size, a_size);
1362 SET_FARVAR(seg, info->linear_alpha_pos, a_pos);
1363 SET_FARVAR(seg, info->pixclock_max, 0);
1365 regs->al = regs->ah; /* 0x4F, Function supported */
1366 regs->ah = 0x0; /* 0x0, Function call successful */
1370 handle_104f02(struct bregs *regs)
1372 //u16 seg = regs->es;
1373 //struct vbe_crtc_info *crtc_info = (void*)(regs->di+0);
1374 u16 mode = regs->bx;
1375 struct vbe_modeinfo modeinfo;
1378 dprintf(1, "VBE mode set: %x\n", mode);
1380 if (mode < 0x100) { /* VGA */
1381 dprintf(1, "set VGA mode %x\n", mode);
1383 bochsvga_hires_enable(0);
1384 vga_set_mode(mode, 0);
1386 rc = bochsvga_mode_info(mode & 0x1ff, &modeinfo);
1388 dprintf(1, "VBE mode %x not found\n", mode & 0x1ff);
1392 bochsvga_hires_enable(1);
1393 bochsvga_set_mode(mode & 0x1ff, &modeinfo);
1395 if (mode & 0x4000) {
1396 /* Linear frame buffer */
1399 if (!(mode & 0x8000)) {
1400 bochsvga_clear_scr();
1404 regs->al = regs->ah; /* 0x4F, Function supported */
1405 regs->ah = 0x0; /* 0x0, Function call successful */
1409 handle_104f03(struct bregs *regs)
1411 if (!bochsvga_hires_enabled()) {
1412 regs->bx = GET_BDA(video_mode);
1414 regs->bx = bochsvga_curr_mode();
1417 dprintf(1, "VBE current mode=%x\n", regs->bx);
1419 regs->al = regs->ah; /* 0x4F, Function supported */
1420 regs->ah = 0x0; /* 0x0, Function call successful */
1424 handle_104f04(struct bregs *regs)
1426 debug_enter(regs, DEBUG_VGA_10);
1431 handle_104f05(struct bregs *regs)
1433 debug_enter(regs, DEBUG_VGA_10);
1438 handle_104f06(struct bregs *regs)
1440 debug_enter(regs, DEBUG_VGA_10);
1445 handle_104f07(struct bregs *regs)
1447 debug_enter(regs, DEBUG_VGA_10);
1452 handle_104f08(struct bregs *regs)
1454 debug_enter(regs, DEBUG_VGA_10);
1459 handle_104f0a(struct bregs *regs)
1461 debug_enter(regs, DEBUG_VGA_10);
1466 handle_104fXX(struct bregs *regs)
1473 handle_104f(struct bregs *regs)
1475 if (!bochsvga_enabled()) {
1476 handle_104fXX(regs);
1481 case 0x00: handle_104f00(regs); break;
1482 case 0x01: handle_104f01(regs); break;
1483 case 0x02: handle_104f02(regs); break;
1484 case 0x03: handle_104f03(regs); break;
1485 case 0x04: handle_104f04(regs); break;
1486 case 0x05: handle_104f05(regs); break;
1487 case 0x06: handle_104f06(regs); break;
1488 case 0x07: handle_104f07(regs); break;
1489 case 0x08: handle_104f08(regs); break;
1490 case 0x0a: handle_104f0a(regs); break;
1491 default: handle_104fXX(regs); break;
1497 handle_10XX(struct bregs *regs)
1502 // INT 10h Video Support Service Entry Point
1504 handle_10(struct bregs *regs)
1506 debug_enter(regs, DEBUG_VGA_10);
1508 case 0x00: handle_1000(regs); break;
1509 case 0x01: handle_1001(regs); break;
1510 case 0x02: handle_1002(regs); break;
1511 case 0x03: handle_1003(regs); break;
1512 case 0x04: handle_1004(regs); break;
1513 case 0x05: handle_1005(regs); break;
1514 case 0x06: handle_1006(regs); break;
1515 case 0x07: handle_1007(regs); break;
1516 case 0x08: handle_1008(regs); break;
1517 case 0x09: handle_1009(regs); break;
1518 case 0x0a: handle_100a(regs); break;
1519 case 0x0b: handle_100b(regs); break;
1520 case 0x0c: handle_100c(regs); break;
1521 case 0x0d: handle_100d(regs); break;
1522 case 0x0e: handle_100e(regs); break;
1523 case 0x0f: handle_100f(regs); break;
1524 case 0x10: handle_1010(regs); break;
1525 case 0x11: handle_1011(regs); break;
1526 case 0x12: handle_1012(regs); break;
1527 case 0x13: handle_1013(regs); break;
1528 case 0x1a: handle_101a(regs); break;
1529 case 0x1b: handle_101b(regs); break;
1530 case 0x1c: handle_101c(regs); break;
1531 case 0x4f: handle_104f(regs); break;
1532 default: handle_10XX(regs); break;
1537 /****************************************************************
1539 ****************************************************************/
1542 init_bios_area(void)
1544 // init detected hardware BIOS Area
1545 // set 80x25 color (not clear from RBIL but usual)
1546 u16 eqf = GET_BDA(equipment_list_flags);
1547 SET_BDA(equipment_list_flags, (eqf & 0xffcf) | 0x20);
1549 // Just for the first int10 find its children
1551 // the default char height
1552 SET_BDA(char_height, 0x10);
1555 SET_BDA(video_ctl, 0x60);
1557 // Set the basic screen we have
1558 SET_BDA(video_switches, 0xf9);
1560 // Set the basic modeset options
1561 SET_BDA(modeset_ctl, 0x51);
1563 // Set the default MSR
1564 SET_BDA(video_msr, 0x09);
1568 vga_post(struct bregs *regs)
1570 debug_enter(regs, DEBUG_VGA_POST);
1574 if (CONFIG_VGA_GEODELX)
1579 bochsvga_init(regs->ah, regs->al);
1581 extern void entry_10(void);
1582 SET_IVT(0x10, SEGOFF(get_global_seg(), (u32)entry_10));
1584 if (CONFIG_VGA_CIRRUS)
1587 // XXX - clear screen and display info
1589 build_video_param();
1592 extern u8 _rom_header_size, _rom_header_checksum;
1593 SET_VGA(_rom_header_checksum, 0);
1594 u8 sum = -checksum_far(get_global_seg(), 0, _rom_header_size * 512);
1595 SET_VGA(_rom_header_checksum, sum);