1 // VGA bios implementation
3 // Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2001-2008 the LGPL VGABios developers Team
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
10 // * review correctness of converted asm by comparing with RBIL
11 // * refactor redundant code into sub-functions
12 // * See if there is a method to the in/out stuff that can be encapsulated.
13 // * remove "biosfn" prefixes
14 // * verify all funcs static
16 // * convert vbe/clext code
18 #include "bregs.h" // struct bregs
19 #include "biosvar.h" // GET_BDA
20 #include "util.h" // memset
21 #include "vgatables.h" // find_vga_entry
25 #define CONFIG_CIRRUS 0
28 #define DEBUG_VGA_POST 1
29 #define DEBUG_VGA_10 3
31 #define SET_VGA(var, val) SET_FARVAR(get_global_seg(), (var), (val))
34 call16_vgaint(u32 eax, u32 ebx)
46 biosfn_perform_gray_scale_summing(u16 start, u16 count)
48 vgahw_screen_disable();
50 for (i = start; i < start+count; i++) {
52 vgahw_get_dac_regs(GET_SEG(SS), rgb, i, 1);
54 // intensity = ( 0.3 * Red ) + ( 0.59 * Green ) + ( 0.11 * Blue )
55 u16 intensity = ((77 * rgb[0] + 151 * rgb[1] + 28 * rgb[2]) + 0x80) >> 8;
59 vgahw_set_dac_regs(GET_SEG(SS), rgb, i, 1);
61 vgahw_screen_enable();
65 biosfn_set_cursor_shape(u8 CH, u8 CL)
70 u16 curs = (CH << 8) + CL;
71 SET_BDA(cursor_type, curs);
73 u8 modeset_ctl = GET_BDA(modeset_ctl);
74 u16 cheight = GET_BDA(char_height);
75 if ((modeset_ctl & 0x01) && (cheight > 8) && (CL < 8) && (CH < 0x20)) {
77 CH = ((CH + 1) * cheight / 8) - 1;
79 CH = ((CL + 1) * cheight / 8) - 2;
80 CL = ((CL + 1) * cheight / 8) - 1;
82 vgahw_set_cursor_shape(CH, CL);
86 biosfn_get_cursor_shape(u8 page)
90 // FIXME should handle VGA 14/16 lines
91 return GET_BDA(cursor_type);
95 set_cursor_pos(struct cursorpos cp)
97 // Should not happen...
102 SET_BDA(cursor_pos[cp.page], (cp.y << 8) | cp.x);
104 // Set the hardware cursor
105 u8 current = GET_BDA(video_page);
106 if (cp.page != current)
109 // Get the dimensions
110 u16 nbcols = GET_BDA(video_cols);
111 u16 nbrows = GET_BDA(video_rows) + 1;
113 // Calculate the address knowing nbcols nbrows and page num
114 u16 address = (SCREEN_IO_START(nbcols, nbrows, cp.page)
115 + cp.x + cp.y * nbcols);
117 vgahw_set_cursor_pos(address);
120 static struct cursorpos
121 get_cursor_pos(u8 page)
124 // special case - use current page
125 page = GET_BDA(video_page);
127 struct cursorpos cp = { 0, 0, 0xfe };
130 // FIXME should handle VGA 14/16 lines
131 u16 xy = GET_BDA(cursor_pos[page]);
132 struct cursorpos cp = {xy, xy>>8, page};
137 biosfn_set_active_page(u8 page)
143 struct vgamode_s *vmode_g = find_vga_entry(GET_BDA(video_mode));
147 // Get pos curs pos for the right page
148 struct cursorpos cp = get_cursor_pos(page);
151 if (GET_GLOBAL(vmode_g->memmodel) & TEXT) {
152 // Get the dimensions
153 u16 nbcols = GET_BDA(video_cols);
154 u16 nbrows = GET_BDA(video_rows) + 1;
156 // Calculate the address knowing nbcols nbrows and page num
157 address = SCREEN_MEM_START(nbcols, nbrows, page);
158 SET_BDA(video_pagestart, address);
161 address = SCREEN_IO_START(nbcols, nbrows, page);
163 struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam);
164 address = page * GET_GLOBAL(vparam_g->slength);
167 vgahw_set_active_page(address);
169 // And change the BIOS page
170 SET_BDA(video_page, page);
172 dprintf(1, "Set active page %02x address %04x\n", page, address);
174 // Display the cursor, now the page is active
178 static struct cursorpos
179 write_teletype(struct cursorpos cp, struct carattr ca)
181 // Get the dimensions
182 u16 nbrows = GET_BDA(video_rows) + 1;
183 u16 nbcols = GET_BDA(video_cols);
201 struct carattr dummyca = {' ', ca.attr, ca.use_attr};
202 vgafb_write_char(cp, dummyca);
204 } while (cp.x < nbcols && cp.x % 8);
207 vgafb_write_char(cp, ca);
211 // Do we need to wrap ?
212 if (cp.x == nbcols) {
216 // Do we need to scroll ?
217 if (cp.y == nbrows) {
218 struct cursorpos ul = {0, 0, cp.page};
219 struct cursorpos lr = {nbcols-1, nbrows-1, cp.page};
220 vgafb_scroll(1, -1, ul, lr);
228 write_string(struct cursorpos cp, u8 flag, u8 attr, u16 count,
229 u16 seg, u8 *offset_far)
232 u8 car = GET_FARVAR(seg, *offset_far);
235 attr = GET_FARVAR(seg, *offset_far);
239 struct carattr ca = {car, attr, 1};
240 cp = write_teletype(cp, ca);
248 set_scan_lines(u8 lines)
250 vgahw_set_scan_lines(lines);
252 biosfn_set_cursor_shape(0x06, 0x07);
254 biosfn_set_cursor_shape(lines - 4, lines - 3);
255 SET_BDA(char_height, lines);
256 u16 vde = vgahw_get_vde();
257 u8 rows = vde / lines;
258 SET_BDA(video_rows, rows - 1);
259 u16 cols = GET_BDA(video_cols);
260 SET_BDA(video_pagesize, rows * cols * 2);
264 biosfn_save_bda_state(u16 seg, struct saveBDAstate *info)
266 SET_FARVAR(seg, info->video_mode, GET_BDA(video_mode));
267 SET_FARVAR(seg, info->video_cols, GET_BDA(video_cols));
268 SET_FARVAR(seg, info->video_pagesize, GET_BDA(video_pagesize));
269 SET_FARVAR(seg, info->crtc_address, GET_BDA(crtc_address));
270 SET_FARVAR(seg, info->video_rows, GET_BDA(video_rows));
271 SET_FARVAR(seg, info->char_height, GET_BDA(char_height));
272 SET_FARVAR(seg, info->video_ctl, GET_BDA(video_ctl));
273 SET_FARVAR(seg, info->video_switches, GET_BDA(video_switches));
274 SET_FARVAR(seg, info->modeset_ctl, GET_BDA(modeset_ctl));
275 SET_FARVAR(seg, info->cursor_type, GET_BDA(cursor_type));
278 SET_FARVAR(seg, info->cursor_pos[i], GET_BDA(cursor_pos[i]));
279 SET_FARVAR(seg, info->video_pagestart, GET_BDA(video_pagestart));
280 SET_FARVAR(seg, info->video_page, GET_BDA(video_page));
282 SET_FARVAR(seg, *(u32*)&info->font0_off, GET_IVT(0x1f).segoff);
283 SET_FARVAR(seg, *(u32*)&info->font1_off, GET_IVT(0x43).segoff);
287 biosfn_restore_bda_state(u16 seg, struct saveBDAstate *info)
289 SET_BDA(video_mode, GET_FARVAR(seg, info->video_mode));
290 SET_BDA(video_cols, GET_FARVAR(seg, info->video_cols));
291 SET_BDA(video_pagesize, GET_FARVAR(seg, info->video_pagesize));
292 SET_BDA(crtc_address, GET_FARVAR(seg, info->crtc_address));
293 SET_BDA(video_rows, GET_FARVAR(seg, info->video_rows));
294 SET_BDA(char_height, GET_FARVAR(seg, info->char_height));
295 SET_BDA(video_ctl, GET_FARVAR(seg, info->video_ctl));
296 SET_BDA(video_switches, GET_FARVAR(seg, info->video_switches));
297 SET_BDA(modeset_ctl, GET_FARVAR(seg, info->modeset_ctl));
298 SET_BDA(cursor_type, GET_FARVAR(seg, info->cursor_type));
300 for (i = 0; i < 8; i++)
301 SET_BDA(cursor_pos[i], GET_FARVAR(seg, info->cursor_pos[i]));
302 SET_BDA(video_pagestart, GET_FARVAR(seg, info->video_pagestart));
303 SET_BDA(video_page, GET_FARVAR(seg, info->video_page));
305 SET_IVT(0x1f, GET_FARVAR(seg, info->font0_seg)
306 , GET_FARVAR(seg, info->font0_off));
307 SET_IVT(0x43, GET_FARVAR(seg, info->font1_seg)
308 , GET_FARVAR(seg, info->font1_off));
312 /****************************************************************
314 ****************************************************************/
318 handle_1000(struct bregs *regs)
320 u8 noclearmem = regs->al & 0x80;
321 u8 mode = regs->al & 0x7f;
332 cirrus_set_video_mode(mode);
335 if (vbe_has_vbe_display())
336 dispi_set_enable(VBE_DISPI_DISABLED);
338 // find the entry in the video modes
339 struct vgamode_s *vmode_g = find_vga_entry(mode);
340 dprintf(1, "mode search %02x found %p\n", mode, vmode_g);
344 // Read the bios mode set control
345 u8 modeset_ctl = GET_BDA(modeset_ctl);
347 // Then we know the number of lines
350 // if palette loading (bit 3 of modeset ctl = 0)
351 if ((modeset_ctl & 0x08) == 0) { // Set the PEL mask
352 vgahw_set_pel_mask(GET_GLOBAL(vmode_g->pelmask));
354 // From which palette
355 u8 *palette_g = GET_GLOBAL(vmode_g->dac);
356 u16 palsize = GET_GLOBAL(vmode_g->dacsize) / 3;
358 // Always 256*3 values
359 vgahw_set_dac_regs(get_global_seg(), palette_g, 0, palsize);
361 for (i = palsize; i < 0x0100; i++) {
362 static u8 rgb[3] VAR16;
363 vgahw_set_dac_regs(get_global_seg(), rgb, i, 1);
366 if ((modeset_ctl & 0x02) == 0x02)
367 biosfn_perform_gray_scale_summing(0x00, 0x100);
370 struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam);
371 vgahw_set_mode(vparam_g);
373 if (noclearmem == 0x00)
374 clear_screen(vmode_g);
376 // Set CRTC address VGA or MDA
377 u16 crtc_addr = VGAREG_VGA_CRTC_ADDRESS;
378 if (GET_GLOBAL(vmode_g->memmodel) == MTEXT)
379 crtc_addr = VGAREG_MDA_CRTC_ADDRESS;
382 u16 cheight = GET_GLOBAL(vparam_g->cheight);
383 SET_BDA(video_mode, mode);
384 SET_BDA(video_cols, GET_GLOBAL(vparam_g->twidth));
385 SET_BDA(video_pagesize, GET_GLOBAL(vparam_g->slength));
386 SET_BDA(crtc_address, crtc_addr);
387 SET_BDA(video_rows, GET_GLOBAL(vparam_g->theightm1));
388 SET_BDA(char_height, cheight);
389 SET_BDA(video_ctl, (0x60 | noclearmem));
390 SET_BDA(video_switches, 0xF9);
391 SET_BDA(modeset_ctl, GET_BDA(modeset_ctl) & 0x7f);
393 // FIXME We nearly have the good tables. to be reworked
394 SET_BDA(dcc_index, 0x08); // 8 is VGA should be ok for now
395 SET_BDA(video_savetable_ptr, (u32)video_save_pointer_table);
396 SET_BDA(video_savetable_seg, get_global_seg());
399 SET_BDA(video_msr, 0x00); // Unavailable on vanilla vga, but...
400 SET_BDA(video_pal, 0x00); // Unavailable on vanilla vga, but...
403 if (GET_GLOBAL(vmode_g->memmodel) & TEXT)
404 biosfn_set_cursor_shape(0x06, 0x07);
405 // Set cursor pos for page 0..7
407 for (i = 0; i < 8; i++) {
408 struct cursorpos cp = {0, 0, i};
413 biosfn_set_active_page(0x00);
415 // Write the fonts in memory
416 if (GET_GLOBAL(vmode_g->memmodel) & TEXT) {
417 call16_vgaint(0x1104, 0);
418 call16_vgaint(0x1103, 0);
420 // Set the ints 0x1F and 0x43
421 SET_IVT(0x1f, get_global_seg(), (u32)&vgafont8[128 * 8]);
425 SET_IVT(0x43, get_global_seg(), (u32)vgafont8);
428 SET_IVT(0x43, get_global_seg(), (u32)vgafont14);
431 SET_IVT(0x43, get_global_seg(), (u32)vgafont16);
437 handle_1001(struct bregs *regs)
439 biosfn_set_cursor_shape(regs->ch, regs->cl);
443 handle_1002(struct bregs *regs)
445 struct cursorpos cp = {regs->dl, regs->dh, regs->bh};
450 handle_1003(struct bregs *regs)
452 regs->cx = biosfn_get_cursor_shape(regs->bh);
453 struct cursorpos cp = get_cursor_pos(regs->bh);
458 // Read light pen pos (unimplemented)
460 handle_1004(struct bregs *regs)
463 regs->ax = regs->bx = regs->cx = regs->dx = 0;
467 handle_1005(struct bregs *regs)
469 biosfn_set_active_page(regs->al);
473 verify_scroll(struct bregs *regs, int dir)
475 u8 page = GET_BDA(video_page);
476 struct cursorpos ul = {regs->cl, regs->ch, page};
477 struct cursorpos lr = {regs->dl, regs->dh, page};
479 u16 nbrows = GET_BDA(video_rows) + 1;
482 u16 nbcols = GET_BDA(video_cols);
486 if (ul.x > lr.x || ul.y > lr.y)
489 u16 nblines = regs->al;
490 if (!nblines || nblines > lr.y - ul.y + 1)
491 nblines = lr.y - ul.y + 1;
493 vgafb_scroll(dir * nblines, regs->bh, ul, lr);
497 handle_1006(struct bregs *regs)
499 verify_scroll(regs, 1);
503 handle_1007(struct bregs *regs)
505 verify_scroll(regs, -1);
509 handle_1008(struct bregs *regs)
511 struct carattr ca = vgafb_read_char(get_cursor_pos(regs->bh));
517 write_chars(u8 page, struct carattr ca, u16 count)
519 struct cursorpos cp = get_cursor_pos(page);
521 vgafb_write_char(cp, ca);
527 handle_1009(struct bregs *regs)
529 struct carattr ca = {regs->al, regs->bl, 1};
530 write_chars(regs->bh, ca, regs->cx);
534 handle_100a(struct bregs *regs)
536 struct carattr ca = {regs->al, regs->bl, 0};
537 write_chars(regs->bh, ca, regs->cx);
542 handle_100b00(struct bregs *regs)
544 vgahw_set_border_color(regs->bl);
548 handle_100b01(struct bregs *regs)
550 vgahw_set_palette(regs->bl);
554 handle_100bXX(struct bregs *regs)
560 handle_100b(struct bregs *regs)
563 case 0x00: handle_100b00(regs); break;
564 case 0x01: handle_100b01(regs); break;
565 default: handle_100bXX(regs); break;
571 handle_100c(struct bregs *regs)
574 biosfn_write_pixel(regs->bh, regs->al, regs->cx, regs->dx);
578 handle_100d(struct bregs *regs)
581 biosfn_read_pixel(regs->bh, regs->cx, regs->dx, ®s->ax);
585 handle_100e(struct bregs *regs)
587 // Ralf Brown Interrupt list is WRONG on bh(page)
588 // We do output only on the current page !
589 struct carattr ca = {regs->al, regs->bl, 0};
590 struct cursorpos cp = get_cursor_pos(0xff);
591 cp = write_teletype(cp, ca);
596 handle_100f(struct bregs *regs)
598 regs->bh = GET_BDA(video_page);
599 regs->al = GET_BDA(video_mode) | (GET_BDA(video_ctl) & 0x80);
600 regs->ah = GET_BDA(video_cols);
605 handle_101000(struct bregs *regs)
609 vgahw_set_single_palette_reg(regs->bl, regs->bh);
613 handle_101001(struct bregs *regs)
615 vgahw_set_overscan_border_color(regs->bh);
619 handle_101002(struct bregs *regs)
621 vgahw_set_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
625 handle_101003(struct bregs *regs)
627 vgahw_toggle_intensity(regs->bl);
631 handle_101007(struct bregs *regs)
635 regs->bh = vgahw_get_single_palette_reg(regs->bl);
639 handle_101008(struct bregs *regs)
641 regs->bh = vgahw_get_overscan_border_color(regs);
645 handle_101009(struct bregs *regs)
647 vgahw_get_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
651 handle_101010(struct bregs *regs)
653 u8 rgb[3] = {regs->dh, regs->ch, regs->cl};
654 vgahw_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
658 handle_101012(struct bregs *regs)
660 vgahw_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
664 handle_101013(struct bregs *regs)
666 vgahw_select_video_dac_color_page(regs->bl, regs->bh);
670 handle_101015(struct bregs *regs)
673 vgahw_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
680 handle_101017(struct bregs *regs)
682 vgahw_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
686 handle_101018(struct bregs *regs)
688 vgahw_set_pel_mask(regs->bl);
692 handle_101019(struct bregs *regs)
694 regs->bl = vgahw_get_pel_mask();
698 handle_10101a(struct bregs *regs)
700 vgahw_read_video_dac_state(®s->bl, ®s->bh);
704 handle_10101b(struct bregs *regs)
706 biosfn_perform_gray_scale_summing(regs->bx, regs->cx);
710 handle_1010XX(struct bregs *regs)
716 handle_1010(struct bregs *regs)
719 case 0x00: handle_101000(regs); break;
720 case 0x01: handle_101001(regs); break;
721 case 0x02: handle_101002(regs); break;
722 case 0x03: handle_101003(regs); break;
723 case 0x07: handle_101007(regs); break;
724 case 0x08: handle_101008(regs); break;
725 case 0x09: handle_101009(regs); break;
726 case 0x10: handle_101010(regs); break;
727 case 0x12: handle_101012(regs); break;
728 case 0x13: handle_101013(regs); break;
729 case 0x15: handle_101015(regs); break;
730 case 0x17: handle_101017(regs); break;
731 case 0x18: handle_101018(regs); break;
732 case 0x19: handle_101019(regs); break;
733 case 0x1a: handle_10101a(regs); break;
734 case 0x1b: handle_10101b(regs); break;
735 default: handle_1010XX(regs); break;
741 handle_101100(struct bregs *regs)
743 vgafb_load_font(regs->es, (void*)(regs->bp+0), regs->cx
744 , regs->dx, regs->bl, regs->bh);
748 handle_101101(struct bregs *regs)
750 vgafb_load_font(get_global_seg(), vgafont14, 0x100, 0, regs->bl, 14);
754 handle_101102(struct bregs *regs)
756 vgafb_load_font(get_global_seg(), vgafont8, 0x100, 0, regs->bl, 8);
760 handle_101103(struct bregs *regs)
762 vgahw_set_text_block_specifier(regs->bl);
766 handle_101104(struct bregs *regs)
768 vgafb_load_font(get_global_seg(), vgafont16, 0x100, 0, regs->bl, 16);
772 handle_101110(struct bregs *regs)
774 vgafb_load_font(regs->es, (void*)(regs->bp+0), regs->cx
775 , regs->dx, regs->bl, regs->bh);
776 set_scan_lines(regs->bh);
780 handle_101111(struct bregs *regs)
782 vgafb_load_font(get_global_seg(), vgafont14, 0x100, 0, regs->bl, 14);
787 handle_101112(struct bregs *regs)
789 vgafb_load_font(get_global_seg(), vgafont8, 0x100, 0, regs->bl, 8);
794 handle_101114(struct bregs *regs)
796 vgafb_load_font(get_global_seg(), vgafont16, 0x100, 0, regs->bl, 16);
801 handle_101130(struct bregs *regs)
805 u32 segoff = GET_IVT(0x1f).segoff;
806 regs->es = segoff >> 16;
811 u32 segoff = GET_IVT(0x43).segoff;
812 regs->es = segoff >> 16;
817 regs->es = get_global_seg();
818 regs->bp = (u32)vgafont14;
821 regs->es = get_global_seg();
822 regs->bp = (u32)vgafont8;
825 regs->es = get_global_seg();
826 regs->bp = (u32)vgafont8 + 128 * 8;
829 regs->es = get_global_seg();
830 regs->bp = (u32)vgafont14alt;
833 regs->es = get_global_seg();
834 regs->bp = (u32)vgafont16;
837 regs->es = get_global_seg();
838 regs->bp = (u32)vgafont16alt;
841 dprintf(1, "Get font info BH(%02x) was discarded\n", regs->bh);
844 // Set byte/char of on screen font
845 regs->cx = GET_BDA(char_height) & 0xff;
847 // Set Highest char row
848 regs->dx = GET_BDA(video_rows);
852 handle_1011XX(struct bregs *regs)
858 handle_1011(struct bregs *regs)
861 case 0x00: handle_101100(regs); break;
862 case 0x01: handle_101101(regs); break;
863 case 0x02: handle_101102(regs); break;
864 case 0x03: handle_101103(regs); break;
865 case 0x04: handle_101104(regs); break;
866 case 0x10: handle_101110(regs); break;
867 case 0x11: handle_101111(regs); break;
868 case 0x12: handle_101112(regs); break;
869 case 0x14: handle_101114(regs); break;
870 case 0x30: handle_101130(regs); break;
871 default: handle_1011XX(regs); break;
877 handle_101210(struct bregs *regs)
879 u16 crtc_addr = GET_BDA(crtc_address);
880 if (crtc_addr == VGAREG_MDA_CRTC_ADDRESS)
884 regs->cx = GET_BDA(video_switches) & 0x0f;
888 handle_101230(struct bregs *regs)
890 u8 mctl = GET_BDA(modeset_ctl);
891 u8 vswt = GET_BDA(video_switches);
895 mctl = (mctl & ~0x10) | 0x80;
896 vswt = (vswt & ~0x0f) | 0x08;
901 vswt = (vswt & ~0x0f) | 0x09;
905 mctl = (mctl & ~0x80) | 0x10;
906 vswt = (vswt & ~0x0f) | 0x09;
909 dprintf(1, "Select vert res (%02x) was discarded\n", regs->al);
912 SET_BDA(modeset_ctl, mctl);
913 SET_BDA(video_switches, vswt);
918 handle_101231(struct bregs *regs)
920 u8 v = (regs->al & 0x01) << 3;
921 u8 mctl = GET_BDA(video_ctl) & ~0x08;
922 SET_BDA(video_ctl, mctl | v);
927 handle_101232(struct bregs *regs)
929 vgahw_enable_video_addressing(regs->al);
934 handle_101233(struct bregs *regs)
936 u8 v = ((regs->al << 1) & 0x02) ^ 0x02;
937 u8 v2 = GET_BDA(modeset_ctl) & ~0x02;
938 SET_BDA(modeset_ctl, v | v2);
943 handle_101234(struct bregs *regs)
945 u8 v = (regs->al & 0x01) ^ 0x01;
946 u8 v2 = GET_BDA(modeset_ctl) & ~0x01;
947 SET_BDA(modeset_ctl, v | v2);
952 handle_101235(struct bregs *regs)
959 handle_101236(struct bregs *regs)
966 handle_1012XX(struct bregs *regs)
972 handle_1012(struct bregs *regs)
975 case 0x10: handle_101210(regs); break;
976 case 0x30: handle_101230(regs); break;
977 case 0x31: handle_101231(regs); break;
978 case 0x32: handle_101232(regs); break;
979 case 0x33: handle_101233(regs); break;
980 case 0x34: handle_101234(regs); break;
981 case 0x35: handle_101235(regs); break;
982 case 0x36: handle_101236(regs); break;
983 default: handle_1012XX(regs); break;
986 // XXX - cirrus has 1280, 1281, 1282, 1285, 129a, 12a0, 12a1, 12a2, 12ae
991 handle_1013(struct bregs *regs)
993 struct cursorpos cp = {regs->dl, regs->dh, regs->bh};
994 // if row=0xff special case : use current cursor position
996 cp = get_cursor_pos(cp.page);
997 write_string(cp, regs->al, regs->bl, regs->cx
998 , regs->es, (void*)(regs->bp + 0));
1003 handle_101a00(struct bregs *regs)
1005 regs->bx = GET_BDA(dcc_index);
1010 handle_101a01(struct bregs *regs)
1012 SET_BDA(dcc_index, regs->bl);
1013 dprintf(1, "Alternate Display code (%02x) was discarded\n", regs->bh);
1018 handle_101aXX(struct bregs *regs)
1024 handle_101a(struct bregs *regs)
1027 case 0x00: handle_101a00(regs); break;
1028 case 0x01: handle_101a01(regs); break;
1029 default: handle_101aXX(regs); break;
1035 u16 static_functionality_off;
1036 u16 static_functionality_seg;
1056 handle_101b(struct bregs *regs)
1059 struct funcInfo *info = (void*)(regs->di+0);
1060 memset_far(seg, info, 0, sizeof(*info));
1061 // Address of static functionality table
1062 SET_FARVAR(seg, info->static_functionality_off, (u32)static_functionality);
1063 SET_FARVAR(seg, info->static_functionality_seg, get_global_seg());
1065 // Hard coded copy from BIOS area. Should it be cleaner ?
1066 memcpy_far(seg, info->bda_0x49, SEG_BDA, (void*)0x49, 30);
1067 memcpy_far(seg, info->bda_0x84, SEG_BDA, (void*)0x84, 3);
1069 SET_FARVAR(seg, info->dcc_index, GET_BDA(dcc_index));
1070 SET_FARVAR(seg, info->colors, 16);
1071 SET_FARVAR(seg, info->pages, 8);
1072 SET_FARVAR(seg, info->scan_lines, 2);
1073 SET_FARVAR(seg, info->video_mem, 3);
1079 handle_101c00(struct bregs *regs)
1081 u16 flags = regs->cx;
1084 size += sizeof(struct saveVideoHardware);
1086 size += sizeof(struct saveBDAstate);
1088 size += sizeof(struct saveDACcolors);
1094 handle_101c01(struct bregs *regs)
1096 u16 flags = regs->cx;
1098 void *data = (void*)(regs->bx+0);
1100 vgahw_save_state(seg, data);
1101 data += sizeof(struct saveVideoHardware);
1104 biosfn_save_bda_state(seg, data);
1105 data += sizeof(struct saveBDAstate);
1108 vgahw_save_dac_state(seg, data);
1113 handle_101c02(struct bregs *regs)
1115 u16 flags = regs->cx;
1117 void *data = (void*)(regs->bx+0);
1119 vgahw_restore_state(seg, data);
1120 data += sizeof(struct saveVideoHardware);
1123 biosfn_restore_bda_state(seg, data);
1124 data += sizeof(struct saveBDAstate);
1127 vgahw_restore_dac_state(seg, data);
1132 handle_101cXX(struct bregs *regs)
1138 handle_101c(struct bregs *regs)
1141 case 0x00: handle_101c00(regs); break;
1142 case 0x01: handle_101c01(regs); break;
1143 case 0x02: handle_101c02(regs); break;
1144 default: handle_101cXX(regs); break;
1150 handle_104f00(struct bregs *regs)
1152 // XXX - vbe_biosfn_return_controller_information(&AX,ES,DI);
1153 // XXX - OR cirrus_vesa_00h
1157 handle_104f01(struct bregs *regs)
1159 // XXX - vbe_biosfn_return_mode_information(&AX,CX,ES,DI);
1160 // XXX - OR cirrus_vesa_01h
1164 handle_104f02(struct bregs *regs)
1166 // XXX - vbe_biosfn_set_mode(&AX,BX,ES,DI);
1167 // XXX - OR cirrus_vesa_02h
1171 handle_104f03(struct bregs *regs)
1173 // XXX - vbe_biosfn_return_current_mode
1174 // XXX - OR cirrus_vesa_03h
1178 handle_104f04(struct bregs *regs)
1180 // XXX - vbe_biosfn_save_restore_state(&AX, CX, DX, ES, &BX);
1184 handle_104f05(struct bregs *regs)
1186 // XXX - vbe_biosfn_display_window_control
1187 // XXX - OR cirrus_vesa_05h
1191 handle_104f06(struct bregs *regs)
1193 // XXX - vbe_biosfn_set_get_logical_scan_line_length
1194 // XXX - OR cirrus_vesa_06h
1198 handle_104f07(struct bregs *regs)
1200 // XXX - vbe_biosfn_set_get_display_start
1201 // XXX - OR cirrus_vesa_07h
1205 handle_104f08(struct bregs *regs)
1207 // XXX - vbe_biosfn_set_get_dac_palette_format
1211 handle_104f0a(struct bregs *regs)
1213 // XXX - vbe_biosfn_return_protected_mode_interface
1217 handle_104fXX(struct bregs *regs)
1224 handle_104f(struct bregs *regs)
1226 if (! CONFIG_VBE || !vbe_has_vbe_display()) {
1227 handle_104fXX(regs);
1232 case 0x00: handle_104f00(regs); break;
1233 case 0x01: handle_104f01(regs); break;
1234 case 0x02: handle_104f02(regs); break;
1235 case 0x03: handle_104f03(regs); break;
1236 case 0x04: handle_104f04(regs); break;
1237 case 0x05: handle_104f05(regs); break;
1238 case 0x06: handle_104f06(regs); break;
1239 case 0x07: handle_104f07(regs); break;
1240 case 0x08: handle_104f08(regs); break;
1241 case 0x0a: handle_104f0a(regs); break;
1242 default: handle_104fXX(regs); break;
1248 handle_10XX(struct bregs *regs)
1253 // INT 10h Video Support Service Entry Point
1255 handle_10(struct bregs *regs)
1257 debug_enter(regs, DEBUG_VGA_10);
1259 case 0x00: handle_1000(regs); break;
1260 case 0x01: handle_1001(regs); break;
1261 case 0x02: handle_1002(regs); break;
1262 case 0x03: handle_1003(regs); break;
1263 case 0x04: handle_1004(regs); break;
1264 case 0x05: handle_1005(regs); break;
1265 case 0x06: handle_1006(regs); break;
1266 case 0x07: handle_1007(regs); break;
1267 case 0x08: handle_1008(regs); break;
1268 case 0x09: handle_1009(regs); break;
1269 case 0x0a: handle_100a(regs); break;
1270 case 0x0b: handle_100b(regs); break;
1271 case 0x0c: handle_100c(regs); break;
1272 case 0x0d: handle_100d(regs); break;
1273 case 0x0e: handle_100e(regs); break;
1274 case 0x0f: handle_100f(regs); break;
1275 case 0x10: handle_1010(regs); break;
1276 case 0x11: handle_1011(regs); break;
1277 case 0x12: handle_1012(regs); break;
1278 case 0x13: handle_1013(regs); break;
1279 case 0x1a: handle_101a(regs); break;
1280 case 0x1b: handle_101b(regs); break;
1281 case 0x1c: handle_101c(regs); break;
1282 case 0x4f: handle_104f(regs); break;
1283 default: handle_10XX(regs); break;
1288 /****************************************************************
1290 ****************************************************************/
1295 // init detected hardware BIOS Area
1296 // set 80x25 color (not clear from RBIL but usual)
1297 u16 eqf = GET_BDA(equipment_list_flags);
1298 SET_BDA(equipment_list_flags, (eqf & 0xffcf) | 0x20);
1300 // Just for the first int10 find its children
1302 // the default char height
1303 SET_BDA(char_height, 0x10);
1306 SET_BDA(video_ctl, 0x60);
1308 // Set the basic screen we have
1309 SET_BDA(video_switches, 0xf9);
1311 // Set the basic modeset options
1312 SET_BDA(modeset_ctl, 0x51);
1314 // Set the default MSR
1315 SET_BDA(video_msr, 0x09);
1319 vga_post(struct bregs *regs)
1321 debug_enter(regs, DEBUG_VGA_POST);
1330 extern void entry_10(void);
1331 SET_IVT(0x10, get_global_seg(), (u32)entry_10);
1336 // XXX - clear screen and display info
1339 SET_VGA(video_save_pointer_table[0], (u32)video_param_table);
1340 SET_VGA(video_save_pointer_table[1], get_global_seg());
1343 extern u8 _rom_header_size, _rom_header_checksum;
1344 SET_VGA(_rom_header_checksum, 0);
1345 u8 sum = -checksum_far(get_global_seg(), 0, _rom_header_size * 512);
1346 SET_VGA(_rom_header_checksum, sum);