1 // VGA bios implementation
3 // Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2001-2008 the LGPL VGABios developers Team
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
10 // * review correctness of converted asm by comparing with RBIL
12 // * convert vbe/clext code
14 #include "bregs.h" // struct bregs
15 #include "biosvar.h" // GET_BDA
16 #include "util.h" // memset
17 #include "vgatables.h" // find_vga_entry
18 #include "optionroms.h" // struct pci_data
19 #include "config.h" // CONFIG_*
20 #include "vbe.h" // vbe_*
23 #define DEBUG_VGA_POST 1
24 #define DEBUG_VGA_10 3
26 #define SET_VGA(var, val) SET_FARVAR(get_global_seg(), (var), (val))
28 /****************************************************************
30 ****************************************************************/
31 #if CONFIG_VGA_PCI == 1
32 struct pci_data rom_pci_data VAR16VISIBLE = {
33 .signature = PCI_ROM_SIGNATURE,
34 .vendor = CONFIG_VGA_VID,
35 .device = CONFIG_VGA_DID,
39 .type = PCIROM_CODETYPE_X86,
44 /****************************************************************
46 ****************************************************************/
49 call16_vgaint(u32 eax, u32 ebx)
61 perform_gray_scale_summing(u16 start, u16 count)
63 vgahw_screen_disable();
65 for (i = start; i < start+count; i++) {
67 vgahw_get_dac_regs(GET_SEG(SS), rgb, i, 1);
69 // intensity = ( 0.3 * Red ) + ( 0.59 * Green ) + ( 0.11 * Blue )
70 u16 intensity = ((77 * rgb[0] + 151 * rgb[1] + 28 * rgb[2]) + 0x80) >> 8;
74 vgahw_set_dac_regs(GET_SEG(SS), rgb, i, 1);
76 vgahw_screen_enable();
80 set_cursor_shape(u8 start, u8 end)
85 u16 curs = (start << 8) + end;
86 SET_BDA(cursor_type, curs);
88 u8 modeset_ctl = GET_BDA(modeset_ctl);
89 u16 cheight = GET_BDA(char_height);
90 if ((modeset_ctl & 0x01) && (cheight > 8) && (end < 8) && (start < 0x20)) {
91 if (end != (start + 1))
92 start = ((start + 1) * cheight / 8) - 1;
94 start = ((end + 1) * cheight / 8) - 2;
95 end = ((end + 1) * cheight / 8) - 1;
97 vgahw_set_cursor_shape(start, end);
101 get_cursor_shape(u8 page)
105 // FIXME should handle VGA 14/16 lines
106 return GET_BDA(cursor_type);
110 set_cursor_pos(struct cursorpos cp)
112 // Should not happen...
117 SET_BDA(cursor_pos[cp.page], (cp.y << 8) | cp.x);
119 // Set the hardware cursor
120 u8 current = GET_BDA(video_page);
121 if (cp.page != current)
124 // Get the dimensions
125 u16 nbcols = GET_BDA(video_cols);
126 u16 nbrows = GET_BDA(video_rows) + 1;
128 // Calculate the address knowing nbcols nbrows and page num
129 u16 address = (SCREEN_IO_START(nbcols, nbrows, cp.page)
130 + cp.x + cp.y * nbcols);
132 vgahw_set_cursor_pos(address);
135 static struct cursorpos
136 get_cursor_pos(u8 page)
139 // special case - use current page
140 page = GET_BDA(video_page);
142 struct cursorpos cp = { 0, 0, 0xfe };
145 // FIXME should handle VGA 14/16 lines
146 u16 xy = GET_BDA(cursor_pos[page]);
147 struct cursorpos cp = {xy, xy>>8, page};
152 set_active_page(u8 page)
158 struct vgamode_s *vmode_g = find_vga_entry(GET_BDA(video_mode));
162 // Get pos curs pos for the right page
163 struct cursorpos cp = get_cursor_pos(page);
166 if (GET_GLOBAL(vmode_g->memmodel) & TEXT) {
167 // Get the dimensions
168 u16 nbcols = GET_BDA(video_cols);
169 u16 nbrows = GET_BDA(video_rows) + 1;
171 // Calculate the address knowing nbcols nbrows and page num
172 address = SCREEN_MEM_START(nbcols, nbrows, page);
173 SET_BDA(video_pagestart, address);
176 address = SCREEN_IO_START(nbcols, nbrows, page);
178 struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam);
179 address = page * GET_GLOBAL(vparam_g->slength);
182 vgahw_set_active_page(address);
184 // And change the BIOS page
185 SET_BDA(video_page, page);
187 dprintf(1, "Set active page %02x address %04x\n", page, address);
189 // Display the cursor, now the page is active
194 set_scan_lines(u8 lines)
196 vgahw_set_scan_lines(lines);
198 set_cursor_shape(0x06, 0x07);
200 set_cursor_shape(lines - 4, lines - 3);
201 SET_BDA(char_height, lines);
202 u16 vde = vgahw_get_vde();
203 u8 rows = vde / lines;
204 SET_BDA(video_rows, rows - 1);
205 u16 cols = GET_BDA(video_cols);
206 SET_BDA(video_pagesize, rows * cols * 2);
210 /****************************************************************
212 ****************************************************************/
214 // Scroll the screen one line. This function is designed to be called
215 // tail-recursive to reduce stack usage.
217 scroll_one(u16 nbrows, u16 nbcols, u8 page)
219 struct cursorpos ul = {0, 0, page};
220 struct cursorpos lr = {nbcols-1, nbrows-1, page};
221 vgafb_scroll(1, -1, ul, lr);
224 // Write a character to the screen at a given position. Implement
225 // special characters and scroll the screen if necessary.
227 write_teletype(struct cursorpos *pcp, struct carattr ca)
229 struct cursorpos cp = *pcp;
231 // Get the dimensions
232 u16 nbrows = GET_BDA(video_rows) + 1;
233 u16 nbcols = GET_BDA(video_cols);
251 struct carattr dummyca = {' ', ca.attr, ca.use_attr};
252 vgafb_write_char(cp, dummyca);
254 } while (cp.x < nbcols && cp.x % 8);
257 vgafb_write_char(cp, ca);
261 // Do we need to wrap ?
262 if (cp.x == nbcols) {
266 // Do we need to scroll ?
274 scroll_one(nbrows, nbcols, cp.page);
277 // Write out a buffer of alternating characters and attributes.
279 write_attr_string(struct cursorpos *pcp, u16 count, u16 seg, u8 *offset_far)
282 u8 car = GET_FARVAR(seg, *offset_far);
284 u8 attr = GET_FARVAR(seg, *offset_far);
287 struct carattr ca = {car, attr, 1};
288 write_teletype(pcp, ca);
292 // Write out a buffer of characters.
294 write_string(struct cursorpos *pcp, u8 attr, u16 count, u16 seg, u8 *offset_far)
297 u8 car = GET_FARVAR(seg, *offset_far);
300 struct carattr ca = {car, attr, 1};
301 write_teletype(pcp, ca);
306 /****************************************************************
307 * Save and restore bda state
308 ****************************************************************/
311 save_bda_state(u16 seg, struct saveBDAstate *info)
313 SET_FARVAR(seg, info->video_mode, GET_BDA(video_mode));
314 SET_FARVAR(seg, info->video_cols, GET_BDA(video_cols));
315 SET_FARVAR(seg, info->video_pagesize, GET_BDA(video_pagesize));
316 SET_FARVAR(seg, info->crtc_address, GET_BDA(crtc_address));
317 SET_FARVAR(seg, info->video_rows, GET_BDA(video_rows));
318 SET_FARVAR(seg, info->char_height, GET_BDA(char_height));
319 SET_FARVAR(seg, info->video_ctl, GET_BDA(video_ctl));
320 SET_FARVAR(seg, info->video_switches, GET_BDA(video_switches));
321 SET_FARVAR(seg, info->modeset_ctl, GET_BDA(modeset_ctl));
322 SET_FARVAR(seg, info->cursor_type, GET_BDA(cursor_type));
325 SET_FARVAR(seg, info->cursor_pos[i], GET_BDA(cursor_pos[i]));
326 SET_FARVAR(seg, info->video_pagestart, GET_BDA(video_pagestart));
327 SET_FARVAR(seg, info->video_page, GET_BDA(video_page));
329 SET_FARVAR(seg, info->font0, GET_IVT(0x1f));
330 SET_FARVAR(seg, info->font1, GET_IVT(0x43));
334 restore_bda_state(u16 seg, struct saveBDAstate *info)
336 SET_BDA(video_mode, GET_FARVAR(seg, info->video_mode));
337 SET_BDA(video_cols, GET_FARVAR(seg, info->video_cols));
338 SET_BDA(video_pagesize, GET_FARVAR(seg, info->video_pagesize));
339 SET_BDA(crtc_address, GET_FARVAR(seg, info->crtc_address));
340 SET_BDA(video_rows, GET_FARVAR(seg, info->video_rows));
341 SET_BDA(char_height, GET_FARVAR(seg, info->char_height));
342 SET_BDA(video_ctl, GET_FARVAR(seg, info->video_ctl));
343 SET_BDA(video_switches, GET_FARVAR(seg, info->video_switches));
344 SET_BDA(modeset_ctl, GET_FARVAR(seg, info->modeset_ctl));
345 SET_BDA(cursor_type, GET_FARVAR(seg, info->cursor_type));
347 for (i = 0; i < 8; i++)
348 SET_BDA(cursor_pos[i], GET_FARVAR(seg, info->cursor_pos[i]));
349 SET_BDA(video_pagestart, GET_FARVAR(seg, info->video_pagestart));
350 SET_BDA(video_page, GET_FARVAR(seg, info->video_page));
352 SET_IVT(0x1f, GET_FARVAR(seg, info->font0));
353 SET_IVT(0x43, GET_FARVAR(seg, info->font1));
357 /****************************************************************
359 ****************************************************************/
363 vga_set_mode(u8 mode, u8 noclearmem)
365 // find the entry in the video modes
366 struct vgamode_s *vmode_g = find_vga_entry(mode);
367 dprintf(1, "mode search %02x found %p\n", mode, vmode_g);
371 // Read the bios mode set control
372 u8 modeset_ctl = GET_BDA(modeset_ctl);
374 // Then we know the number of lines
377 // if palette loading (bit 3 of modeset ctl = 0)
378 if ((modeset_ctl & 0x08) == 0) { // Set the PEL mask
379 vgahw_set_pel_mask(GET_GLOBAL(vmode_g->pelmask));
381 // From which palette
382 u8 *palette_g = GET_GLOBAL(vmode_g->dac);
383 u16 palsize = GET_GLOBAL(vmode_g->dacsize) / 3;
385 // Always 256*3 values
386 vgahw_set_dac_regs(get_global_seg(), palette_g, 0, palsize);
388 for (i = palsize; i < 0x0100; i++) {
389 static u8 rgb[3] VAR16;
390 vgahw_set_dac_regs(get_global_seg(), rgb, i, 1);
393 if ((modeset_ctl & 0x02) == 0x02)
394 perform_gray_scale_summing(0x00, 0x100);
397 struct VideoParam_s *vparam_g = GET_GLOBAL(vmode_g->vparam);
398 vgahw_set_mode(vparam_g);
400 if (noclearmem == 0x00)
401 clear_screen(vmode_g);
403 // Set CRTC address VGA or MDA
404 u16 crtc_addr = VGAREG_VGA_CRTC_ADDRESS;
405 if (GET_GLOBAL(vmode_g->memmodel) == MTEXT)
406 crtc_addr = VGAREG_MDA_CRTC_ADDRESS;
409 u16 cheight = GET_GLOBAL(vparam_g->cheight);
410 SET_BDA(video_mode, mode);
411 SET_BDA(video_cols, GET_GLOBAL(vparam_g->twidth));
412 SET_BDA(video_pagesize, GET_GLOBAL(vparam_g->slength));
413 SET_BDA(crtc_address, crtc_addr);
414 SET_BDA(video_rows, GET_GLOBAL(vparam_g->theightm1));
415 SET_BDA(char_height, cheight);
416 SET_BDA(video_ctl, (0x60 | noclearmem));
417 SET_BDA(video_switches, 0xF9);
418 SET_BDA(modeset_ctl, GET_BDA(modeset_ctl) & 0x7f);
420 // FIXME We nearly have the good tables. to be reworked
421 SET_BDA(dcc_index, 0x08); // 8 is VGA should be ok for now
422 SET_BDA(video_savetable
423 , SEGOFF(get_global_seg(), (u32)video_save_pointer_table));
426 SET_BDA(video_msr, 0x00); // Unavailable on vanilla vga, but...
427 SET_BDA(video_pal, 0x00); // Unavailable on vanilla vga, but...
430 if (GET_GLOBAL(vmode_g->memmodel) & TEXT)
431 set_cursor_shape(0x06, 0x07);
432 // Set cursor pos for page 0..7
434 for (i = 0; i < 8; i++) {
435 struct cursorpos cp = {0, 0, i};
440 set_active_page(0x00);
442 // Write the fonts in memory
443 if (GET_GLOBAL(vmode_g->memmodel) & TEXT) {
444 call16_vgaint(0x1104, 0);
445 call16_vgaint(0x1103, 0);
447 // Set the ints 0x1F and 0x43
448 SET_IVT(0x1f, SEGOFF(get_global_seg(), (u32)&vgafont8[128 * 8]));
452 SET_IVT(0x43, SEGOFF(get_global_seg(), (u32)vgafont8));
455 SET_IVT(0x43, SEGOFF(get_global_seg(), (u32)vgafont14));
458 SET_IVT(0x43, SEGOFF(get_global_seg(), (u32)vgafont16));
464 handle_1000(struct bregs *regs)
466 u8 noclearmem = regs->al & 0x80;
467 u8 mode = regs->al & 0x7f;
477 if (CONFIG_VGA_CIRRUS)
478 cirrus_set_video_mode(mode);
483 vga_set_mode(mode, noclearmem);
487 handle_1001(struct bregs *regs)
489 set_cursor_shape(regs->ch, regs->cl);
493 handle_1002(struct bregs *regs)
495 struct cursorpos cp = {regs->dl, regs->dh, regs->bh};
500 handle_1003(struct bregs *regs)
502 regs->cx = get_cursor_shape(regs->bh);
503 struct cursorpos cp = get_cursor_pos(regs->bh);
508 // Read light pen pos (unimplemented)
510 handle_1004(struct bregs *regs)
513 regs->ax = regs->bx = regs->cx = regs->dx = 0;
517 handle_1005(struct bregs *regs)
519 set_active_page(regs->al);
523 verify_scroll(struct bregs *regs, int dir)
525 u8 page = GET_BDA(video_page);
526 struct cursorpos ul = {regs->cl, regs->ch, page};
527 struct cursorpos lr = {regs->dl, regs->dh, page};
529 u16 nbrows = GET_BDA(video_rows) + 1;
532 u16 nbcols = GET_BDA(video_cols);
536 if (ul.x > lr.x || ul.y > lr.y)
539 u16 nblines = regs->al;
540 if (!nblines || nblines > lr.y - ul.y + 1)
541 nblines = lr.y - ul.y + 1;
543 vgafb_scroll(dir * nblines, regs->bh, ul, lr);
547 handle_1006(struct bregs *regs)
549 verify_scroll(regs, 1);
553 handle_1007(struct bregs *regs)
555 verify_scroll(regs, -1);
559 handle_1008(struct bregs *regs)
561 struct carattr ca = vgafb_read_char(get_cursor_pos(regs->bh));
567 write_chars(u8 page, struct carattr ca, u16 count)
569 struct cursorpos cp = get_cursor_pos(page);
571 vgafb_write_char(cp, ca);
577 handle_1009(struct bregs *regs)
579 struct carattr ca = {regs->al, regs->bl, 1};
580 write_chars(regs->bh, ca, regs->cx);
584 handle_100a(struct bregs *regs)
586 struct carattr ca = {regs->al, regs->bl, 0};
587 write_chars(regs->bh, ca, regs->cx);
592 handle_100b00(struct bregs *regs)
594 vgahw_set_border_color(regs->bl);
598 handle_100b01(struct bregs *regs)
600 vgahw_set_palette(regs->bl);
604 handle_100bXX(struct bregs *regs)
610 handle_100b(struct bregs *regs)
613 case 0x00: handle_100b00(regs); break;
614 case 0x01: handle_100b01(regs); break;
615 default: handle_100bXX(regs); break;
621 handle_100c(struct bregs *regs)
623 // XXX - page (regs->bh) is unused
624 vgafb_write_pixel(regs->al, regs->cx, regs->dx);
628 handle_100d(struct bregs *regs)
630 // XXX - page (regs->bh) is unused
631 regs->al = vgafb_read_pixel(regs->cx, regs->dx);
635 handle_100e(struct bregs *regs)
637 // Ralf Brown Interrupt list is WRONG on bh(page)
638 // We do output only on the current page !
639 struct carattr ca = {regs->al, regs->bl, 0};
640 struct cursorpos cp = get_cursor_pos(0xff);
641 write_teletype(&cp, ca);
646 handle_100f(struct bregs *regs)
648 regs->bh = GET_BDA(video_page);
649 regs->al = GET_BDA(video_mode) | (GET_BDA(video_ctl) & 0x80);
650 regs->ah = GET_BDA(video_cols);
655 handle_101000(struct bregs *regs)
659 vgahw_set_single_palette_reg(regs->bl, regs->bh);
663 handle_101001(struct bregs *regs)
665 vgahw_set_overscan_border_color(regs->bh);
669 handle_101002(struct bregs *regs)
671 vgahw_set_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
675 handle_101003(struct bregs *regs)
677 vgahw_toggle_intensity(regs->bl);
681 handle_101007(struct bregs *regs)
685 regs->bh = vgahw_get_single_palette_reg(regs->bl);
689 handle_101008(struct bregs *regs)
691 regs->bh = vgahw_get_overscan_border_color();
695 handle_101009(struct bregs *regs)
697 vgahw_get_all_palette_reg(regs->es, (u8*)(regs->dx + 0));
701 handle_101010(struct bregs *regs)
703 u8 rgb[3] = {regs->dh, regs->ch, regs->cl};
704 vgahw_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
708 handle_101012(struct bregs *regs)
710 vgahw_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
714 handle_101013(struct bregs *regs)
716 vgahw_select_video_dac_color_page(regs->bl, regs->bh);
720 handle_101015(struct bregs *regs)
723 vgahw_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
730 handle_101017(struct bregs *regs)
732 vgahw_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
736 handle_101018(struct bregs *regs)
738 vgahw_set_pel_mask(regs->bl);
742 handle_101019(struct bregs *regs)
744 regs->bl = vgahw_get_pel_mask();
748 handle_10101a(struct bregs *regs)
750 vgahw_read_video_dac_state(®s->bl, ®s->bh);
754 handle_10101b(struct bregs *regs)
756 perform_gray_scale_summing(regs->bx, regs->cx);
760 handle_1010XX(struct bregs *regs)
766 handle_1010(struct bregs *regs)
769 case 0x00: handle_101000(regs); break;
770 case 0x01: handle_101001(regs); break;
771 case 0x02: handle_101002(regs); break;
772 case 0x03: handle_101003(regs); break;
773 case 0x07: handle_101007(regs); break;
774 case 0x08: handle_101008(regs); break;
775 case 0x09: handle_101009(regs); break;
776 case 0x10: handle_101010(regs); break;
777 case 0x12: handle_101012(regs); break;
778 case 0x13: handle_101013(regs); break;
779 case 0x15: handle_101015(regs); break;
780 case 0x17: handle_101017(regs); break;
781 case 0x18: handle_101018(regs); break;
782 case 0x19: handle_101019(regs); break;
783 case 0x1a: handle_10101a(regs); break;
784 case 0x1b: handle_10101b(regs); break;
785 default: handle_1010XX(regs); break;
791 handle_101100(struct bregs *regs)
793 vgafb_load_font(regs->es, (void*)(regs->bp+0), regs->cx
794 , regs->dx, regs->bl, regs->bh);
798 handle_101101(struct bregs *regs)
800 vgafb_load_font(get_global_seg(), vgafont14, 0x100, 0, regs->bl, 14);
804 handle_101102(struct bregs *regs)
806 vgafb_load_font(get_global_seg(), vgafont8, 0x100, 0, regs->bl, 8);
810 handle_101103(struct bregs *regs)
812 vgahw_set_text_block_specifier(regs->bl);
816 handle_101104(struct bregs *regs)
818 vgafb_load_font(get_global_seg(), vgafont16, 0x100, 0, regs->bl, 16);
822 handle_101110(struct bregs *regs)
824 vgafb_load_font(regs->es, (void*)(regs->bp+0), regs->cx
825 , regs->dx, regs->bl, regs->bh);
826 set_scan_lines(regs->bh);
830 handle_101111(struct bregs *regs)
832 vgafb_load_font(get_global_seg(), vgafont14, 0x100, 0, regs->bl, 14);
837 handle_101112(struct bregs *regs)
839 vgafb_load_font(get_global_seg(), vgafont8, 0x100, 0, regs->bl, 8);
844 handle_101114(struct bregs *regs)
846 vgafb_load_font(get_global_seg(), vgafont16, 0x100, 0, regs->bl, 16);
851 handle_101130(struct bregs *regs)
855 struct segoff_s so = GET_IVT(0x1f);
857 regs->bp = so.offset;
861 struct segoff_s so = GET_IVT(0x43);
863 regs->bp = so.offset;
867 regs->es = get_global_seg();
868 regs->bp = (u32)vgafont14;
871 regs->es = get_global_seg();
872 regs->bp = (u32)vgafont8;
875 regs->es = get_global_seg();
876 regs->bp = (u32)vgafont8 + 128 * 8;
879 regs->es = get_global_seg();
880 regs->bp = (u32)vgafont14alt;
883 regs->es = get_global_seg();
884 regs->bp = (u32)vgafont16;
887 regs->es = get_global_seg();
888 regs->bp = (u32)vgafont16alt;
891 dprintf(1, "Get font info BH(%02x) was discarded\n", regs->bh);
894 // Set byte/char of on screen font
895 regs->cx = GET_BDA(char_height) & 0xff;
897 // Set Highest char row
898 regs->dx = GET_BDA(video_rows);
902 handle_1011XX(struct bregs *regs)
908 handle_1011(struct bregs *regs)
911 case 0x00: handle_101100(regs); break;
912 case 0x01: handle_101101(regs); break;
913 case 0x02: handle_101102(regs); break;
914 case 0x03: handle_101103(regs); break;
915 case 0x04: handle_101104(regs); break;
916 case 0x10: handle_101110(regs); break;
917 case 0x11: handle_101111(regs); break;
918 case 0x12: handle_101112(regs); break;
919 case 0x14: handle_101114(regs); break;
920 case 0x30: handle_101130(regs); break;
921 default: handle_1011XX(regs); break;
927 handle_101210(struct bregs *regs)
929 u16 crtc_addr = GET_BDA(crtc_address);
930 if (crtc_addr == VGAREG_MDA_CRTC_ADDRESS)
934 regs->cx = GET_BDA(video_switches) & 0x0f;
938 handle_101230(struct bregs *regs)
940 u8 mctl = GET_BDA(modeset_ctl);
941 u8 vswt = GET_BDA(video_switches);
945 mctl = (mctl & ~0x10) | 0x80;
946 vswt = (vswt & ~0x0f) | 0x08;
951 vswt = (vswt & ~0x0f) | 0x09;
955 mctl = (mctl & ~0x80) | 0x10;
956 vswt = (vswt & ~0x0f) | 0x09;
959 dprintf(1, "Select vert res (%02x) was discarded\n", regs->al);
962 SET_BDA(modeset_ctl, mctl);
963 SET_BDA(video_switches, vswt);
968 handle_101231(struct bregs *regs)
970 u8 v = (regs->al & 0x01) << 3;
971 u8 mctl = GET_BDA(video_ctl) & ~0x08;
972 SET_BDA(video_ctl, mctl | v);
977 handle_101232(struct bregs *regs)
979 vgahw_enable_video_addressing(regs->al);
984 handle_101233(struct bregs *regs)
986 u8 v = ((regs->al << 1) & 0x02) ^ 0x02;
987 u8 v2 = GET_BDA(modeset_ctl) & ~0x02;
988 SET_BDA(modeset_ctl, v | v2);
993 handle_101234(struct bregs *regs)
995 u8 v = (regs->al & 0x01) ^ 0x01;
996 u8 v2 = GET_BDA(modeset_ctl) & ~0x01;
997 SET_BDA(modeset_ctl, v | v2);
1002 handle_101235(struct bregs *regs)
1009 handle_101236(struct bregs *regs)
1016 handle_1012XX(struct bregs *regs)
1022 handle_1012(struct bregs *regs)
1025 case 0x10: handle_101210(regs); break;
1026 case 0x30: handle_101230(regs); break;
1027 case 0x31: handle_101231(regs); break;
1028 case 0x32: handle_101232(regs); break;
1029 case 0x33: handle_101233(regs); break;
1030 case 0x34: handle_101234(regs); break;
1031 case 0x35: handle_101235(regs); break;
1032 case 0x36: handle_101236(regs); break;
1033 default: handle_1012XX(regs); break;
1036 // XXX - cirrus has 1280, 1281, 1282, 1285, 129a, 12a0, 12a1, 12a2, 12ae
1041 static void noinline
1042 handle_1013(struct bregs *regs)
1044 struct cursorpos cp = {regs->dl, regs->dh, regs->bh};
1045 // if row=0xff special case : use current cursor position
1047 cp = get_cursor_pos(cp.page);
1050 write_attr_string(&cp, regs->cx, regs->es, (void*)(regs->bp + 0));
1052 write_string(&cp, regs->bl, regs->cx, regs->es, (void*)(regs->bp + 0));
1060 handle_101a00(struct bregs *regs)
1062 regs->bx = GET_BDA(dcc_index);
1067 handle_101a01(struct bregs *regs)
1069 SET_BDA(dcc_index, regs->bl);
1070 dprintf(1, "Alternate Display code (%02x) was discarded\n", regs->bh);
1075 handle_101aXX(struct bregs *regs)
1081 handle_101a(struct bregs *regs)
1084 case 0x00: handle_101a00(regs); break;
1085 case 0x01: handle_101a01(regs); break;
1086 default: handle_101aXX(regs); break;
1092 u16 static_functionality_off;
1093 u16 static_functionality_seg;
1113 handle_101b(struct bregs *regs)
1116 struct funcInfo *info = (void*)(regs->di+0);
1117 memset_far(seg, info, 0, sizeof(*info));
1118 // Address of static functionality table
1119 SET_FARVAR(seg, info->static_functionality_off, (u32)static_functionality);
1120 SET_FARVAR(seg, info->static_functionality_seg, get_global_seg());
1122 // Hard coded copy from BIOS area. Should it be cleaner ?
1123 memcpy_far(seg, info->bda_0x49, SEG_BDA, (void*)0x49
1124 , sizeof(info->bda_0x49));
1125 memcpy_far(seg, info->bda_0x84, SEG_BDA, (void*)0x84
1126 , sizeof(info->bda_0x84));
1128 SET_FARVAR(seg, info->dcc_index, GET_BDA(dcc_index));
1129 SET_FARVAR(seg, info->colors, 16);
1130 SET_FARVAR(seg, info->pages, 8);
1131 SET_FARVAR(seg, info->scan_lines, 2);
1132 SET_FARVAR(seg, info->video_mem, 3);
1138 handle_101c00(struct bregs *regs)
1140 u16 flags = regs->cx;
1143 size += sizeof(struct saveVideoHardware);
1145 size += sizeof(struct saveBDAstate);
1147 size += sizeof(struct saveDACcolors);
1153 handle_101c01(struct bregs *regs)
1155 u16 flags = regs->cx;
1157 void *data = (void*)(regs->bx+0);
1159 vgahw_save_state(seg, data);
1160 data += sizeof(struct saveVideoHardware);
1163 save_bda_state(seg, data);
1164 data += sizeof(struct saveBDAstate);
1167 vgahw_save_dac_state(seg, data);
1172 handle_101c02(struct bregs *regs)
1174 u16 flags = regs->cx;
1176 void *data = (void*)(regs->bx+0);
1178 vgahw_restore_state(seg, data);
1179 data += sizeof(struct saveVideoHardware);
1182 restore_bda_state(seg, data);
1183 data += sizeof(struct saveBDAstate);
1186 vgahw_restore_dac_state(seg, data);
1191 handle_101cXX(struct bregs *regs)
1197 handle_101c(struct bregs *regs)
1200 case 0x00: handle_101c00(regs); break;
1201 case 0x01: handle_101c01(regs); break;
1202 case 0x02: handle_101c02(regs); break;
1203 default: handle_101cXX(regs); break;
1208 handle_104f00(struct bregs *regs)
1211 struct vbe_info *info = (void*)(regs->di+0);
1213 if (GET_FARVAR(seg, info->signature) == VBE2_SIGNATURE) {
1214 dprintf(4, "Get VBE Controller: VBE2 Signature found\n");
1215 } else if (GET_FARVAR(seg, info->signature) == VESA_SIGNATURE) {
1216 dprintf(4, "Get VBE Controller: VESA Signature found\n");
1218 dprintf(4, "Get VBE Controller: Invalid Signature\n");
1221 memset_far(seg, info, 0, sizeof(*info));
1223 SET_FARVAR(seg, info->signature, VESA_SIGNATURE);
1225 SET_FARVAR(seg, info->version, 0x0200);
1227 SET_FARVAR(seg, info->oem_string,
1228 SEGOFF(get_global_seg(), (u32)VBE_OEM_STRING));
1229 SET_FARVAR(seg, info->capabilities[0], 0x1); /* 8BIT DAC */
1231 /* We generate our mode list in the reserved field of the info block */
1232 SET_FARVAR(seg, info->video_mode, SEGOFF(seg, regs->di + 34));
1234 /* Total memory (in 64 blocks) */
1235 SET_FARVAR(seg, info->total_memory, vbe_total_mem());
1237 SET_FARVAR(seg, info->oem_vendor_string,
1238 SEGOFF(get_global_seg(), (u32)VBE_VENDOR_STRING));
1239 SET_FARVAR(seg, info->oem_product_string,
1240 SEGOFF(get_global_seg(), (u32)VBE_PRODUCT_STRING));
1241 SET_FARVAR(seg, info->oem_revision_string,
1242 SEGOFF(get_global_seg(), (u32)VBE_REVISION_STRING));
1244 /* Fill list of modes */
1245 vbe_list_modes(seg, regs->di + 32);
1247 regs->al = regs->ah; /* 0x4F, Function supported */
1248 regs->ah = 0x0; /* 0x0, Function call successful */
1252 handle_104f01(struct bregs *regs)
1255 struct vbe_mode_info *info = (void*)(regs->di+0);
1256 u16 mode = regs->cx;
1257 struct vbe_modeinfo modeinfo;
1260 dprintf(1, "VBE mode info request: %x\n", mode);
1262 rc = vbe_mode_info(mode, &modeinfo);
1264 dprintf(1, "VBE mode %x not found\n", mode);
1269 u16 mode_attr = VBE_MODE_ATTRIBUTE_SUPPORTED |
1270 VBE_MODE_ATTRIBUTE_EXTENDED_INFORMATION_AVAILABLE |
1271 VBE_MODE_ATTRIBUTE_COLOR_MODE |
1272 VBE_MODE_ATTRIBUTE_GRAPHICS_MODE;
1273 if (modeinfo.depth == 4)
1274 mode_attr |= VBE_MODE_ATTRIBUTE_TTY_BIOS_SUPPORT;
1276 mode_attr |= VBE_MODE_ATTRIBUTE_LINEAR_FRAME_BUFFER_MODE;
1277 SET_FARVAR(seg, info->mode_attributes, mode_attr);
1278 SET_FARVAR(seg, info->winA_attributes,
1279 VBE_WINDOW_ATTRIBUTE_RELOCATABLE |
1280 VBE_WINDOW_ATTRIBUTE_READABLE |
1281 VBE_WINDOW_ATTRIBUTE_WRITEABLE);
1282 SET_FARVAR(seg, info->winB_attributes, 0);
1283 SET_FARVAR(seg, info->win_granularity, 64); /* Bank size 64K */
1284 SET_FARVAR(seg, info->win_size, 64); /* Bank size 64K */
1285 SET_FARVAR(seg, info->winA_seg, 0xA000);
1286 SET_FARVAR(seg, info->winB_seg, 0x0);
1287 SET_FARVAR(seg, info->win_func_ptr, 0x0);
1288 SET_FARVAR(seg, info->bytes_per_scanline, modeinfo.linesize);
1289 SET_FARVAR(seg, info->xres, modeinfo.width);
1290 SET_FARVAR(seg, info->yres, modeinfo.height);
1291 SET_FARVAR(seg, info->xcharsize, 8);
1292 SET_FARVAR(seg, info->ycharsize, 16);
1293 if (modeinfo.depth == 4)
1294 SET_FARVAR(seg, info->planes, 4);
1296 SET_FARVAR(seg, info->planes, 1);
1297 SET_FARVAR(seg, info->bits_per_pixel, modeinfo.depth);
1298 SET_FARVAR(seg, info->banks,
1299 (modeinfo.linesize * modeinfo.height + 65535) / 65536);
1300 if (modeinfo.depth == 4)
1301 SET_FARVAR(seg, info->mem_model, VBE_MEMORYMODEL_PLANAR);
1302 else if (modeinfo.depth == 8)
1303 SET_FARVAR(seg, info->mem_model, VBE_MEMORYMODEL_PACKED_PIXEL);
1305 SET_FARVAR(seg, info->mem_model, VBE_MEMORYMODEL_DIRECT_COLOR);
1306 SET_FARVAR(seg, info->bank_size, 0);
1307 u32 pages = modeinfo.vram_size / (modeinfo.height * modeinfo.linesize);
1308 if (modeinfo.depth == 4)
1309 SET_FARVAR(seg, info->pages, (pages / 4) - 1);
1311 SET_FARVAR(seg, info->pages, pages - 1);
1312 SET_FARVAR(seg, info->reserved0, 1);
1314 u8 r_size, r_pos, g_size, g_pos, b_size, b_pos, a_size, a_pos;
1316 switch (modeinfo.depth) {
1317 case 15: r_size = 5; r_pos = 10; g_size = 5; g_pos = 5;
1318 b_size = 5; b_pos = 0; a_size = 1; a_pos = 15; break;
1319 case 16: r_size = 5; r_pos = 11; g_size = 6; g_pos = 5;
1320 b_size = 5; b_pos = 0; a_size = 0; a_pos = 0; break;
1321 case 24: r_size = 8; r_pos = 16; g_size = 8; g_pos = 8;
1322 b_size = 8; b_pos = 0; a_size = 0; a_pos = 0; break;
1323 case 32: r_size = 8; r_pos = 16; g_size = 8; g_pos = 8;
1324 b_size = 8; b_pos = 0; a_size = 8; a_pos = 24; break;
1325 default: r_size = 0; r_pos = 0; g_size = 0; g_pos = 0;
1326 b_size = 0; b_pos = 0; a_size = 0; a_pos = 0; break;
1329 SET_FARVAR(seg, info->red_size, r_size);
1330 SET_FARVAR(seg, info->red_pos, r_pos);
1331 SET_FARVAR(seg, info->green_size, g_size);
1332 SET_FARVAR(seg, info->green_pos, g_pos);
1333 SET_FARVAR(seg, info->blue_size, b_size);
1334 SET_FARVAR(seg, info->blue_pos, b_pos);
1335 SET_FARVAR(seg, info->alpha_size, a_size);
1336 SET_FARVAR(seg, info->alpha_pos, a_pos);
1338 if (modeinfo.depth == 32)
1339 SET_FARVAR(seg, info->directcolor_info,
1340 VBE_DIRECTCOLOR_RESERVED_BITS_AVAILABLE);
1342 SET_FARVAR(seg, info->directcolor_info, 0);
1344 if (modeinfo.depth > 4)
1345 SET_FARVAR(seg, info->phys_base, modeinfo.phys_base);
1347 SET_FARVAR(seg, info->phys_base, 0);
1349 SET_FARVAR(seg, info->reserved1, 0);
1350 SET_FARVAR(seg, info->reserved2, 0);
1351 SET_FARVAR(seg, info->linear_bytes_per_scanline, modeinfo.linesize);
1352 SET_FARVAR(seg, info->bank_pages, 0);
1353 SET_FARVAR(seg, info->linear_pages, 0);
1354 SET_FARVAR(seg, info->linear_red_size, r_size);
1355 SET_FARVAR(seg, info->linear_red_pos, r_pos);
1356 SET_FARVAR(seg, info->linear_green_size, g_size);
1357 SET_FARVAR(seg, info->linear_green_pos, g_pos);
1358 SET_FARVAR(seg, info->linear_blue_size, b_size);
1359 SET_FARVAR(seg, info->linear_blue_pos, b_pos);
1360 SET_FARVAR(seg, info->linear_alpha_size, a_size);
1361 SET_FARVAR(seg, info->linear_alpha_pos, a_pos);
1362 SET_FARVAR(seg, info->pixclock_max, 0);
1364 regs->al = regs->ah; /* 0x4F, Function supported */
1365 regs->ah = 0x0; /* 0x0, Function call successful */
1369 handle_104f02(struct bregs *regs)
1371 //u16 seg = regs->es;
1372 //struct vbe_crtc_info *crtc_info = (void*)(regs->di+0);
1373 u16 mode = regs->bx;
1374 struct vbe_modeinfo modeinfo;
1377 dprintf(1, "VBE mode set: %x\n", mode);
1379 if (mode < 0x100) { /* VGA */
1380 dprintf(1, "set VGA mode %x\n", mode);
1382 vbe_hires_enable(0);
1383 vga_set_mode(mode, 0);
1385 rc = vbe_mode_info(mode & 0x1ff, &modeinfo);
1387 dprintf(1, "VBE mode %x not found\n", mode & 0x1ff);
1391 vbe_hires_enable(1);
1392 vbe_set_mode(mode & 0x1ff, &modeinfo);
1394 if (mode & 0x4000) {
1395 /* Linear frame buffer */
1398 if (!(mode & 0x8000)) {
1403 regs->al = regs->ah; /* 0x4F, Function supported */
1404 regs->ah = 0x0; /* 0x0, Function call successful */
1408 handle_104f03(struct bregs *regs)
1410 if (!vbe_hires_enabled()) {
1411 regs->bx = GET_BDA(video_mode);
1413 regs->bx = vbe_curr_mode();
1416 dprintf(1, "VBE current mode=%x\n", regs->bx);
1418 regs->al = regs->ah; /* 0x4F, Function supported */
1419 regs->ah = 0x0; /* 0x0, Function call successful */
1423 handle_104f04(struct bregs *regs)
1425 debug_enter(regs, DEBUG_VGA_10);
1430 handle_104f05(struct bregs *regs)
1432 debug_enter(regs, DEBUG_VGA_10);
1437 handle_104f06(struct bregs *regs)
1439 debug_enter(regs, DEBUG_VGA_10);
1444 handle_104f07(struct bregs *regs)
1446 debug_enter(regs, DEBUG_VGA_10);
1451 handle_104f08(struct bregs *regs)
1453 debug_enter(regs, DEBUG_VGA_10);
1458 handle_104f0a(struct bregs *regs)
1460 debug_enter(regs, DEBUG_VGA_10);
1465 handle_104fXX(struct bregs *regs)
1472 handle_104f(struct bregs *regs)
1474 if (!vbe_enabled()) {
1475 handle_104fXX(regs);
1480 case 0x00: handle_104f00(regs); break;
1481 case 0x01: handle_104f01(regs); break;
1482 case 0x02: handle_104f02(regs); break;
1483 case 0x03: handle_104f03(regs); break;
1484 case 0x04: handle_104f04(regs); break;
1485 case 0x05: handle_104f05(regs); break;
1486 case 0x06: handle_104f06(regs); break;
1487 case 0x07: handle_104f07(regs); break;
1488 case 0x08: handle_104f08(regs); break;
1489 case 0x0a: handle_104f0a(regs); break;
1490 default: handle_104fXX(regs); break;
1496 handle_10XX(struct bregs *regs)
1501 // INT 10h Video Support Service Entry Point
1503 handle_10(struct bregs *regs)
1505 debug_enter(regs, DEBUG_VGA_10);
1507 case 0x00: handle_1000(regs); break;
1508 case 0x01: handle_1001(regs); break;
1509 case 0x02: handle_1002(regs); break;
1510 case 0x03: handle_1003(regs); break;
1511 case 0x04: handle_1004(regs); break;
1512 case 0x05: handle_1005(regs); break;
1513 case 0x06: handle_1006(regs); break;
1514 case 0x07: handle_1007(regs); break;
1515 case 0x08: handle_1008(regs); break;
1516 case 0x09: handle_1009(regs); break;
1517 case 0x0a: handle_100a(regs); break;
1518 case 0x0b: handle_100b(regs); break;
1519 case 0x0c: handle_100c(regs); break;
1520 case 0x0d: handle_100d(regs); break;
1521 case 0x0e: handle_100e(regs); break;
1522 case 0x0f: handle_100f(regs); break;
1523 case 0x10: handle_1010(regs); break;
1524 case 0x11: handle_1011(regs); break;
1525 case 0x12: handle_1012(regs); break;
1526 case 0x13: handle_1013(regs); break;
1527 case 0x1a: handle_101a(regs); break;
1528 case 0x1b: handle_101b(regs); break;
1529 case 0x1c: handle_101c(regs); break;
1530 case 0x4f: handle_104f(regs); break;
1531 default: handle_10XX(regs); break;
1536 /****************************************************************
1538 ****************************************************************/
1541 init_bios_area(void)
1543 // init detected hardware BIOS Area
1544 // set 80x25 color (not clear from RBIL but usual)
1545 u16 eqf = GET_BDA(equipment_list_flags);
1546 SET_BDA(equipment_list_flags, (eqf & 0xffcf) | 0x20);
1548 // Just for the first int10 find its children
1550 // the default char height
1551 SET_BDA(char_height, 0x10);
1554 SET_BDA(video_ctl, 0x60);
1556 // Set the basic screen we have
1557 SET_BDA(video_switches, 0xf9);
1559 // Set the basic modeset options
1560 SET_BDA(modeset_ctl, 0x51);
1562 // Set the default MSR
1563 SET_BDA(video_msr, 0x09);
1567 vga_post(struct bregs *regs)
1569 debug_enter(regs, DEBUG_VGA_POST);
1575 vbe_init(regs->ah, regs->al);
1577 extern void entry_10(void);
1578 SET_IVT(0x10, SEGOFF(get_global_seg(), (u32)entry_10));
1580 if (CONFIG_VGA_CIRRUS)
1583 // XXX - clear screen and display info
1586 SET_VGA(video_save_pointer_table[0], (u32)video_param_table);
1587 SET_VGA(video_save_pointer_table[1], get_global_seg());
1590 extern u8 _rom_header_size, _rom_header_checksum;
1591 SET_VGA(_rom_header_checksum, 0);
1592 u8 sum = -checksum_far(get_global_seg(), 0, _rom_header_size * 512);
1593 SET_VGA(_rom_header_checksum, sum);