vgabios: Don't have geode code peak into stdvga mode struct.
[seabios.git] / vgasrc / stdvgamodes.c
1 // Standard VGA mode information.
2 //
3 // Copyright (C) 2009  Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2001-2008 the LGPL VGABios developers Team
5 //
6 // This file may be distributed under the terms of the GNU LGPLv3 license.
7
8 #include "vgabios.h" // struct VideoParamTableEntry_s
9 #include "biosvar.h" // GET_GLOBAL
10 #include "util.h" // memcpy_far
11 #include "stdvga.h" // stdvga_find_mode
12
13
14 /****************************************************************
15  * Video mode register definitions
16  ****************************************************************/
17
18 /* Mono */
19 static u8 palette0[] VAR16 = {
20   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
21   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
22   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
23   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
24   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
25   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
26   0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f,
27   0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f,
28   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
29   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
30   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
31   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
32   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
33   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
34   0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f,
35   0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f
36 };
37
38 static u8 palette1[] VAR16 = {
39   0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
40   0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
41   0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
42   0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
43   0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
44   0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
45   0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
46   0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
47   0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
48   0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
49   0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
50   0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
51   0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
52   0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
53   0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
54   0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f
55 };
56
57 static u8 palette2[] VAR16 = {
58   0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
59   0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x2a,0x00, 0x2a,0x2a,0x2a,
60   0x00,0x00,0x15, 0x00,0x00,0x3f, 0x00,0x2a,0x15, 0x00,0x2a,0x3f,
61   0x2a,0x00,0x15, 0x2a,0x00,0x3f, 0x2a,0x2a,0x15, 0x2a,0x2a,0x3f,
62   0x00,0x15,0x00, 0x00,0x15,0x2a, 0x00,0x3f,0x00, 0x00,0x3f,0x2a,
63   0x2a,0x15,0x00, 0x2a,0x15,0x2a, 0x2a,0x3f,0x00, 0x2a,0x3f,0x2a,
64   0x00,0x15,0x15, 0x00,0x15,0x3f, 0x00,0x3f,0x15, 0x00,0x3f,0x3f,
65   0x2a,0x15,0x15, 0x2a,0x15,0x3f, 0x2a,0x3f,0x15, 0x2a,0x3f,0x3f,
66   0x15,0x00,0x00, 0x15,0x00,0x2a, 0x15,0x2a,0x00, 0x15,0x2a,0x2a,
67   0x3f,0x00,0x00, 0x3f,0x00,0x2a, 0x3f,0x2a,0x00, 0x3f,0x2a,0x2a,
68   0x15,0x00,0x15, 0x15,0x00,0x3f, 0x15,0x2a,0x15, 0x15,0x2a,0x3f,
69   0x3f,0x00,0x15, 0x3f,0x00,0x3f, 0x3f,0x2a,0x15, 0x3f,0x2a,0x3f,
70   0x15,0x15,0x00, 0x15,0x15,0x2a, 0x15,0x3f,0x00, 0x15,0x3f,0x2a,
71   0x3f,0x15,0x00, 0x3f,0x15,0x2a, 0x3f,0x3f,0x00, 0x3f,0x3f,0x2a,
72   0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
73   0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f
74 };
75
76 static u8 palette3[] VAR16 = {
77   0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
78   0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
79   0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
80   0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
81   0x00,0x00,0x00, 0x05,0x05,0x05, 0x08,0x08,0x08, 0x0b,0x0b,0x0b,
82   0x0e,0x0e,0x0e, 0x11,0x11,0x11, 0x14,0x14,0x14, 0x18,0x18,0x18,
83   0x1c,0x1c,0x1c, 0x20,0x20,0x20, 0x24,0x24,0x24, 0x28,0x28,0x28,
84   0x2d,0x2d,0x2d, 0x32,0x32,0x32, 0x38,0x38,0x38, 0x3f,0x3f,0x3f,
85   0x00,0x00,0x3f, 0x10,0x00,0x3f, 0x1f,0x00,0x3f, 0x2f,0x00,0x3f,
86   0x3f,0x00,0x3f, 0x3f,0x00,0x2f, 0x3f,0x00,0x1f, 0x3f,0x00,0x10,
87   0x3f,0x00,0x00, 0x3f,0x10,0x00, 0x3f,0x1f,0x00, 0x3f,0x2f,0x00,
88   0x3f,0x3f,0x00, 0x2f,0x3f,0x00, 0x1f,0x3f,0x00, 0x10,0x3f,0x00,
89   0x00,0x3f,0x00, 0x00,0x3f,0x10, 0x00,0x3f,0x1f, 0x00,0x3f,0x2f,
90   0x00,0x3f,0x3f, 0x00,0x2f,0x3f, 0x00,0x1f,0x3f, 0x00,0x10,0x3f,
91   0x1f,0x1f,0x3f, 0x27,0x1f,0x3f, 0x2f,0x1f,0x3f, 0x37,0x1f,0x3f,
92   0x3f,0x1f,0x3f, 0x3f,0x1f,0x37, 0x3f,0x1f,0x2f, 0x3f,0x1f,0x27,
93
94   0x3f,0x1f,0x1f, 0x3f,0x27,0x1f, 0x3f,0x2f,0x1f, 0x3f,0x37,0x1f,
95   0x3f,0x3f,0x1f, 0x37,0x3f,0x1f, 0x2f,0x3f,0x1f, 0x27,0x3f,0x1f,
96   0x1f,0x3f,0x1f, 0x1f,0x3f,0x27, 0x1f,0x3f,0x2f, 0x1f,0x3f,0x37,
97   0x1f,0x3f,0x3f, 0x1f,0x37,0x3f, 0x1f,0x2f,0x3f, 0x1f,0x27,0x3f,
98   0x2d,0x2d,0x3f, 0x31,0x2d,0x3f, 0x36,0x2d,0x3f, 0x3a,0x2d,0x3f,
99   0x3f,0x2d,0x3f, 0x3f,0x2d,0x3a, 0x3f,0x2d,0x36, 0x3f,0x2d,0x31,
100   0x3f,0x2d,0x2d, 0x3f,0x31,0x2d, 0x3f,0x36,0x2d, 0x3f,0x3a,0x2d,
101   0x3f,0x3f,0x2d, 0x3a,0x3f,0x2d, 0x36,0x3f,0x2d, 0x31,0x3f,0x2d,
102   0x2d,0x3f,0x2d, 0x2d,0x3f,0x31, 0x2d,0x3f,0x36, 0x2d,0x3f,0x3a,
103   0x2d,0x3f,0x3f, 0x2d,0x3a,0x3f, 0x2d,0x36,0x3f, 0x2d,0x31,0x3f,
104   0x00,0x00,0x1c, 0x07,0x00,0x1c, 0x0e,0x00,0x1c, 0x15,0x00,0x1c,
105   0x1c,0x00,0x1c, 0x1c,0x00,0x15, 0x1c,0x00,0x0e, 0x1c,0x00,0x07,
106   0x1c,0x00,0x00, 0x1c,0x07,0x00, 0x1c,0x0e,0x00, 0x1c,0x15,0x00,
107   0x1c,0x1c,0x00, 0x15,0x1c,0x00, 0x0e,0x1c,0x00, 0x07,0x1c,0x00,
108   0x00,0x1c,0x00, 0x00,0x1c,0x07, 0x00,0x1c,0x0e, 0x00,0x1c,0x15,
109   0x00,0x1c,0x1c, 0x00,0x15,0x1c, 0x00,0x0e,0x1c, 0x00,0x07,0x1c,
110
111   0x0e,0x0e,0x1c, 0x11,0x0e,0x1c, 0x15,0x0e,0x1c, 0x18,0x0e,0x1c,
112   0x1c,0x0e,0x1c, 0x1c,0x0e,0x18, 0x1c,0x0e,0x15, 0x1c,0x0e,0x11,
113   0x1c,0x0e,0x0e, 0x1c,0x11,0x0e, 0x1c,0x15,0x0e, 0x1c,0x18,0x0e,
114   0x1c,0x1c,0x0e, 0x18,0x1c,0x0e, 0x15,0x1c,0x0e, 0x11,0x1c,0x0e,
115   0x0e,0x1c,0x0e, 0x0e,0x1c,0x11, 0x0e,0x1c,0x15, 0x0e,0x1c,0x18,
116   0x0e,0x1c,0x1c, 0x0e,0x18,0x1c, 0x0e,0x15,0x1c, 0x0e,0x11,0x1c,
117   0x14,0x14,0x1c, 0x16,0x14,0x1c, 0x18,0x14,0x1c, 0x1a,0x14,0x1c,
118   0x1c,0x14,0x1c, 0x1c,0x14,0x1a, 0x1c,0x14,0x18, 0x1c,0x14,0x16,
119   0x1c,0x14,0x14, 0x1c,0x16,0x14, 0x1c,0x18,0x14, 0x1c,0x1a,0x14,
120   0x1c,0x1c,0x14, 0x1a,0x1c,0x14, 0x18,0x1c,0x14, 0x16,0x1c,0x14,
121   0x14,0x1c,0x14, 0x14,0x1c,0x16, 0x14,0x1c,0x18, 0x14,0x1c,0x1a,
122   0x14,0x1c,0x1c, 0x14,0x1a,0x1c, 0x14,0x18,0x1c, 0x14,0x16,0x1c,
123   0x00,0x00,0x10, 0x04,0x00,0x10, 0x08,0x00,0x10, 0x0c,0x00,0x10,
124   0x10,0x00,0x10, 0x10,0x00,0x0c, 0x10,0x00,0x08, 0x10,0x00,0x04,
125   0x10,0x00,0x00, 0x10,0x04,0x00, 0x10,0x08,0x00, 0x10,0x0c,0x00,
126   0x10,0x10,0x00, 0x0c,0x10,0x00, 0x08,0x10,0x00, 0x04,0x10,0x00,
127
128   0x00,0x10,0x00, 0x00,0x10,0x04, 0x00,0x10,0x08, 0x00,0x10,0x0c,
129   0x00,0x10,0x10, 0x00,0x0c,0x10, 0x00,0x08,0x10, 0x00,0x04,0x10,
130   0x08,0x08,0x10, 0x0a,0x08,0x10, 0x0c,0x08,0x10, 0x0e,0x08,0x10,
131   0x10,0x08,0x10, 0x10,0x08,0x0e, 0x10,0x08,0x0c, 0x10,0x08,0x0a,
132   0x10,0x08,0x08, 0x10,0x0a,0x08, 0x10,0x0c,0x08, 0x10,0x0e,0x08,
133   0x10,0x10,0x08, 0x0e,0x10,0x08, 0x0c,0x10,0x08, 0x0a,0x10,0x08,
134   0x08,0x10,0x08, 0x08,0x10,0x0a, 0x08,0x10,0x0c, 0x08,0x10,0x0e,
135   0x08,0x10,0x10, 0x08,0x0e,0x10, 0x08,0x0c,0x10, 0x08,0x0a,0x10,
136   0x0b,0x0b,0x10, 0x0c,0x0b,0x10, 0x0d,0x0b,0x10, 0x0f,0x0b,0x10,
137   0x10,0x0b,0x10, 0x10,0x0b,0x0f, 0x10,0x0b,0x0d, 0x10,0x0b,0x0c,
138   0x10,0x0b,0x0b, 0x10,0x0c,0x0b, 0x10,0x0d,0x0b, 0x10,0x0f,0x0b,
139   0x10,0x10,0x0b, 0x0f,0x10,0x0b, 0x0d,0x10,0x0b, 0x0c,0x10,0x0b,
140   0x0b,0x10,0x0b, 0x0b,0x10,0x0c, 0x0b,0x10,0x0d, 0x0b,0x10,0x0f,
141   0x0b,0x10,0x10, 0x0b,0x0f,0x10, 0x0b,0x0d,0x10, 0x0b,0x0c,0x10,
142   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
143   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00
144 };
145
146 static u8 sequ_01[] VAR16 = { 0x08, 0x03, 0x00, 0x02 };
147 static u8 crtc_01[] VAR16 = {
148     0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
149     0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
150     0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
151     0xff };
152 static u8 actl_01[] VAR16 = {
153     0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
154     0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
155     0x0c, 0x00, 0x0f, 0x08 };
156 static u8 grdc_01[] VAR16 = {
157     0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff };
158 static u8 sequ_03[] VAR16 = { 0x00, 0x03, 0x00, 0x02 };
159 static u8 crtc_03[] VAR16 = {
160     0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
161     0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
162     0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
163     0xff };
164 static u8 sequ_04[] VAR16 = { 0x09, 0x03, 0x00, 0x02 };
165 static u8 crtc_04[] VAR16 = {
166     0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
167     0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
168     0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
169     0xff };
170 static u8 actl_04[] VAR16 = {
171     0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
172     0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
173     0x01, 0x00, 0x03, 0x00 };
174 static u8 grdc_04[] VAR16 = {
175     0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x0f, 0xff };
176 static u8 sequ_06[] VAR16 = { 0x01, 0x01, 0x00, 0x06 };
177 static u8 crtc_06[] VAR16 = {
178     0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
179     0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
180     0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xc2,
181     0xff };
182 static u8 actl_06[] VAR16 = {
183     0x00, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
184     0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
185     0x01, 0x00, 0x01, 0x00 };
186 static u8 grdc_06[] VAR16 = {
187     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x0f, 0xff };
188 static u8 crtc_07[] VAR16 = {
189     0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
190     0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
191     0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3,
192     0xff };
193 static u8 actl_07[] VAR16 = {
194     0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
195     0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
196     0x0e, 0x00, 0x0f, 0x08 };
197 static u8 grdc_07[] VAR16 = {
198     0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x0f, 0xff };
199 static u8 sequ_0d[] VAR16 = { 0x09, 0x0f, 0x00, 0x06 };
200 static u8 crtc_0d[] VAR16 = {
201     0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
202     0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
203     0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xe3,
204     0xff };
205 static u8 actl_0d[] VAR16 = {
206     0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
207     0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
208     0x01, 0x00, 0x0f, 0x00 };
209 static u8 grdc_0d[] VAR16 = {
210     0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff };
211 static u8 sequ_0e[] VAR16 = { 0x01, 0x0f, 0x00, 0x06 };
212 static u8 crtc_0e[] VAR16 = {
213     0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
214     0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
215     0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xe3,
216     0xff };
217 static u8 crtc_0f[] VAR16 = {
218     0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
219     0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
220     0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
221     0xff };
222 static u8 actl_0f[] VAR16 = {
223     0x00, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00,
224     0x00, 0x08, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00,
225     0x01, 0x00, 0x01, 0x00 };
226 static u8 actl_10[] VAR16 = {
227     0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
228     0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
229     0x01, 0x00, 0x0f, 0x00 };
230 static u8 crtc_11[] VAR16 = {
231     0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
232     0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
233     0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
234     0xff };
235 static u8 actl_11[] VAR16 = {
236     0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f,
237     0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f,
238     0x01, 0x00, 0x0f, 0x00 };
239 static u8 sequ_13[] VAR16 = { 0x01, 0x0f, 0x00, 0x0e };
240 static u8 crtc_13[] VAR16 = {
241     0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
242     0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
243     0x9c, 0x8e, 0x8f, 0x28, 0x40, 0x96, 0xb9, 0xa3,
244     0xff };
245 static u8 actl_13[] VAR16 = {
246     0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
247     0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
248     0x41, 0x00, 0x0f, 0x00 };
249 static u8 grdc_13[] VAR16 = {
250     0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f, 0xff };
251 static u8 crtc_6A[] VAR16 = {
252     0x7f, 0x63, 0x63, 0x83, 0x6b, 0x1b, 0x72, 0xf0,
253     0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
254     0x59, 0x8d, 0x57, 0x32, 0x00, 0x57, 0x73, 0xe3,
255     0xff };
256
257 #define PAL(x) x, sizeof(x)
258
259 static struct stdvga_mode_s vga_modes[] VAR16 = {
260     //mode { model       tx   ty bpp cw ch  sstart    }
261     // pelm  dac            sequ     misc  crtc     actl     grdc
262     {0x00, { MM_TEXT,    40,  25, 4, 9, 16, SEG_CTEXT }
263      , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01},
264     {0x01, { MM_TEXT,    40,  25, 4, 9, 16, SEG_CTEXT }
265      , 0xFF, PAL(palette2), sequ_01, 0x67, crtc_01, actl_01, grdc_01},
266     {0x02, { MM_TEXT,    80,  25, 4, 9, 16, SEG_CTEXT }
267      , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01},
268     {0x03, { MM_TEXT,    80,  25, 4, 9, 16, SEG_CTEXT }
269      , 0xFF, PAL(palette2), sequ_03, 0x67, crtc_03, actl_01, grdc_01},
270     {0x04, { MM_CGA,    320, 200, 2, 8,  8, SEG_CTEXT }
271      , 0xFF, PAL(palette1), sequ_04, 0x63, crtc_04, actl_04, grdc_04},
272     {0x05, { MM_CGA,    320, 200, 2, 8,  8, SEG_CTEXT }
273      , 0xFF, PAL(palette1), sequ_04, 0x63, crtc_04, actl_04, grdc_04},
274     {0x06, { MM_CGA,    640, 200, 1, 8,  8, SEG_CTEXT }
275      , 0xFF, PAL(palette1), sequ_06, 0x63, crtc_06, actl_06, grdc_06},
276     {0x07, { MM_TEXT,    80,  25, 4, 9, 16, SEG_MTEXT }
277      , 0xFF, PAL(palette0), sequ_03, 0x66, crtc_07, actl_07, grdc_07},
278     {0x0D, { MM_PLANAR, 320, 200, 4, 8,  8, SEG_GRAPH }
279      , 0xFF, PAL(palette1), sequ_0d, 0x63, crtc_0d, actl_0d, grdc_0d},
280     {0x0E, { MM_PLANAR, 640, 200, 4, 8,  8, SEG_GRAPH }
281      , 0xFF, PAL(palette1), sequ_0e, 0x63, crtc_0e, actl_0d, grdc_0d},
282     {0x0F, { MM_PLANAR, 640, 350, 1, 8, 14, SEG_GRAPH }
283      , 0xFF, PAL(palette0), sequ_0e, 0xa3, crtc_0f, actl_0f, grdc_0d},
284     {0x10, { MM_PLANAR, 640, 350, 4, 8, 14, SEG_GRAPH }
285      , 0xFF, PAL(palette2), sequ_0e, 0xa3, crtc_0f, actl_10, grdc_0d},
286     {0x11, { MM_PLANAR, 640, 480, 1, 8, 16, SEG_GRAPH }
287      , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_11, actl_11, grdc_0d},
288     {0x12, { MM_PLANAR, 640, 480, 4, 8, 16, SEG_GRAPH }
289      , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_11, actl_10, grdc_0d},
290     {0x13, { MM_PACKED, 320, 200, 8, 8,  8, SEG_GRAPH }
291      , 0xFF, PAL(palette3), sequ_13, 0x63, crtc_13, actl_13, grdc_13},
292     {0x6A, { MM_PLANAR, 800, 600, 4, 8, 16, SEG_GRAPH }
293      , 0xFF, PAL(palette2), sequ_0e, 0xe3, crtc_6A, actl_10, grdc_0d},
294 };
295
296
297 /****************************************************************
298  * Mode functions
299  ****************************************************************/
300
301 struct vgamode_s *
302 stdvga_find_mode(int mode)
303 {
304     int i;
305     for (i = 0; i < ARRAY_SIZE(vga_modes); i++) {
306         struct stdvga_mode_s *stdmode_g = &vga_modes[i];
307         if (GET_GLOBAL(stdmode_g->mode) == mode)
308             return &stdmode_g->info;
309     }
310     return NULL;
311 }
312
313 void
314 stdvga_build_video_param(void)
315 {
316     static u8 parammodes[] VAR16 = {
317         0, 0, 0, 0, 0x04, 0x05, 0x06, 0x07,
318         0, 0, 0, 0, 0, 0x0d, 0x0e, 0,
319         0, 0x0f, 0x10, 0, 0, 0, 0, 0x01,
320         0x03, 0x07, 0x11, 0x12, 0x13
321     };
322
323     int i;
324     for (i=0; i<ARRAY_SIZE(parammodes); i++) {
325         int mode = GET_GLOBAL(parammodes[i]);
326         if (! mode)
327             continue;
328         struct VideoParam_s *vparam_g = &video_param_table[i];
329         struct vgamode_s *vmode_g = stdvga_find_mode(mode);
330         if (!vmode_g)
331             continue;
332         int width = GET_GLOBAL(vmode_g->width);
333         int height = GET_GLOBAL(vmode_g->height);
334         u8 memmodel = GET_GLOBAL(vmode_g->memmodel);
335         int cheight = GET_GLOBAL(vmode_g->cheight);
336         if (memmodel == MM_TEXT) {
337             SET_VGA(vparam_g->twidth, width);
338             SET_VGA(vparam_g->theightm1, height-1);
339         } else {
340             int cwidth = GET_GLOBAL(vmode_g->cwidth);
341             SET_VGA(vparam_g->twidth, width / cwidth);
342             SET_VGA(vparam_g->theightm1, (height / cheight) - 1);
343         }
344         SET_VGA(vparam_g->cheight, cheight);
345         SET_VGA(vparam_g->slength, calc_page_size(memmodel, width, height));
346         struct stdvga_mode_s *stdmode_g = container_of(
347             vmode_g, struct stdvga_mode_s, info);
348         memcpy_far(get_global_seg(), vparam_g->sequ_regs
349                    , get_global_seg(), GET_GLOBAL(stdmode_g->sequ_regs)
350                    , ARRAY_SIZE(vparam_g->sequ_regs));
351         SET_VGA(vparam_g->miscreg, GET_GLOBAL(stdmode_g->miscreg));
352         memcpy_far(get_global_seg(), vparam_g->crtc_regs
353                    , get_global_seg(), GET_GLOBAL(stdmode_g->crtc_regs)
354                    , ARRAY_SIZE(vparam_g->crtc_regs));
355         memcpy_far(get_global_seg(), vparam_g->actl_regs
356                    , get_global_seg(), GET_GLOBAL(stdmode_g->actl_regs)
357                    , ARRAY_SIZE(vparam_g->actl_regs));
358         memcpy_far(get_global_seg(), vparam_g->grdc_regs
359                    , get_global_seg(), GET_GLOBAL(stdmode_g->grdc_regs)
360                    , ARRAY_SIZE(vparam_g->grdc_regs));
361     }
362 }
363
364 void
365 stdvga_override_crtc(int mode, u8 *crtc)
366 {
367     struct vgamode_s *vmode_g = stdvga_find_mode(mode);
368     if (!vmode_g)
369         return;
370     struct stdvga_mode_s *stdmode_g = container_of(
371         vmode_g, struct stdvga_mode_s, info);
372     SET_VGA(stdmode_g->crtc_regs, crtc);
373 }