1 // Geode GX2/LX VGA functions
3 // Copyright (C) 2009 Chris Kindt
5 // Writen for Google Summer of Code 2009 for the coreboot project
7 // This file may be distributed under the terms of the GNU LGPLv3 license.
12 #define VRC_INDEX 0xAC1C // Index register
13 #define VRC_DATA 0xAC1E // Data register
14 #define VR_UNLOCK 0xFC53 // Virtual register unlock code
16 #define EXTENDED_REGISTER_LOCK 0x30
17 #define EXTENDED_MODE_CONTROL 0x43
18 #define EXTENDED_START_ADDR 0x44
20 #define CRTCE_UNLOCK 0x4c
21 #define CRTCE_LOCK 0xff
23 // Graphics-specific registers:
29 #define DC_LOCK_LOCK 0x00000000
30 #define DC_LOCK_UNLOCK 0x00004758
33 #define MSR_GLIU0 (1 << 28)
34 #define MSR_GLIU0_BASE4 (MSR_GLIU0 + 0x23) /* LX */
35 #define GLIU0_P2D_BM_4 (MSR_GLIU0 + 0x24) /* GX2 */
36 #define GLIU0_IOD_BM_0 (MSR_GLIU0 + 0xE0)
37 #define GLIU0_IOD_BM_1 (MSR_GLIU0 + 0xE1)
38 #define DC_SPARE 0x80000011
39 #define VP_MSR_CONFIG_GX2 0xc0002001 /* GX2 */
40 #define VP_MSR_CONFIG_LX 0x48002001 /* LX */
44 #define DC_GENERAL_CFG 0x4
45 #define DC_DISPLAY_CFG 0x8
46 #define DC_FB_ST_OFFSET 0x10
47 #define DC_CB_ST_OFFSET 0x14
48 #define DC_CURS_ST_OFFSET 0x18
49 #define DC_GLIU0_MEM_OFFSET 0x84
58 #define DC_VGAE (1 << 7)
59 #define DC_GDEN (1 << 3)
60 #define DC_TRUP (1 << 6)
63 #define VP_CRT_EN (1 << 0)
64 #define VP_HSYNC_EN (1 << 1)
65 #define VP_VSYNC_EN (1 << 2)
66 #define VP_DAC_BL_EN (1 << 3)
67 #define VP_CRT_SKEW (1 << 16)
68 #define VP_BYP_BOTH (1 << 0)
71 #define DC_CFG_MSK 0xf000a6