1 // Bochs VGA interface to extended "VBE" modes
3 // Copyright (C) 2012 Kevin O'Connor <kevin@koconnor.net>
4 // Copyright (C) 2011 Julian Pidancet <julian.pidancet@citrix.com>
5 // Copyright (C) 2002 Jeroen Janssen
7 // This file may be distributed under the terms of the GNU LGPLv3 license.
9 #include "vgabios.h" // struct vbe_modeinfo
10 #include "vbe.h" // VBE_CAPABILITY_8BIT_DAC
11 #include "bochsvga.h" // bochsvga_set_mode
12 #include "util.h" // dprintf
13 #include "config.h" // CONFIG_*
14 #include "biosvar.h" // GET_GLOBAL
15 #include "stdvga.h" // VGAREG_SEQU_ADDRESS
16 #include "pci.h" // pci_config_readl
17 #include "pci_regs.h" // PCI_BASE_ADDRESS_0
20 /****************************************************************
22 ****************************************************************/
24 static struct bochsvga_mode
27 struct vgamode_s info;
28 } bochsvga_modes[] VAR16 = {
30 { 0x100, { MM_PACKED, 640, 400, 8, 8, 16, SEG_GRAPH } },
31 { 0x101, { MM_PACKED, 640, 480, 8, 8, 16, SEG_GRAPH } },
32 { 0x102, { MM_PLANAR, 800, 600, 4, 8, 16, SEG_GRAPH } },
33 { 0x103, { MM_PACKED, 800, 600, 8, 8, 16, SEG_GRAPH } },
34 { 0x104, { MM_PLANAR, 1024, 768, 4, 8, 16, SEG_GRAPH } },
35 { 0x105, { MM_PACKED, 1024, 768, 8, 8, 16, SEG_GRAPH } },
36 { 0x106, { MM_PLANAR, 1280, 1024, 4, 8, 16, SEG_GRAPH } },
37 { 0x107, { MM_PACKED, 1280, 1024, 8, 8, 16, SEG_GRAPH } },
38 { 0x10D, { MM_DIRECT, 320, 200, 15, 8, 16, SEG_GRAPH } },
39 { 0x10E, { MM_DIRECT, 320, 200, 16, 8, 16, SEG_GRAPH } },
40 { 0x10F, { MM_DIRECT, 320, 200, 24, 8, 16, SEG_GRAPH } },
41 { 0x110, { MM_DIRECT, 640, 480, 15, 8, 16, SEG_GRAPH } },
42 { 0x111, { MM_DIRECT, 640, 480, 16, 8, 16, SEG_GRAPH } },
43 { 0x112, { MM_DIRECT, 640, 480, 24, 8, 16, SEG_GRAPH } },
44 { 0x113, { MM_DIRECT, 800, 600, 15, 8, 16, SEG_GRAPH } },
45 { 0x114, { MM_DIRECT, 800, 600, 16, 8, 16, SEG_GRAPH } },
46 { 0x115, { MM_DIRECT, 800, 600, 24, 8, 16, SEG_GRAPH } },
47 { 0x116, { MM_DIRECT, 1024, 768, 15, 8, 16, SEG_GRAPH } },
48 { 0x117, { MM_DIRECT, 1024, 768, 16, 8, 16, SEG_GRAPH } },
49 { 0x118, { MM_DIRECT, 1024, 768, 24, 8, 16, SEG_GRAPH } },
50 { 0x119, { MM_DIRECT, 1280, 1024, 15, 8, 16, SEG_GRAPH } },
51 { 0x11A, { MM_DIRECT, 1280, 1024, 16, 8, 16, SEG_GRAPH } },
52 { 0x11B, { MM_DIRECT, 1280, 1024, 24, 8, 16, SEG_GRAPH } },
53 { 0x11C, { MM_PACKED, 1600, 1200, 8, 8, 16, SEG_GRAPH } },
54 { 0x11D, { MM_DIRECT, 1600, 1200, 15, 8, 16, SEG_GRAPH } },
55 { 0x11E, { MM_DIRECT, 1600, 1200, 16, 8, 16, SEG_GRAPH } },
56 { 0x11F, { MM_DIRECT, 1600, 1200, 24, 8, 16, SEG_GRAPH } },
58 { 0x140, { MM_DIRECT, 320, 200, 32, 8, 16, SEG_GRAPH } },
59 { 0x141, { MM_DIRECT, 640, 400, 32, 8, 16, SEG_GRAPH } },
60 { 0x142, { MM_DIRECT, 640, 480, 32, 8, 16, SEG_GRAPH } },
61 { 0x143, { MM_DIRECT, 800, 600, 32, 8, 16, SEG_GRAPH } },
62 { 0x144, { MM_DIRECT, 1024, 768, 32, 8, 16, SEG_GRAPH } },
63 { 0x145, { MM_DIRECT, 1280, 1024, 32, 8, 16, SEG_GRAPH } },
64 { 0x146, { MM_PACKED, 320, 200, 8, 8, 16, SEG_GRAPH } },
65 { 0x147, { MM_DIRECT, 1600, 1200, 32, 8, 16, SEG_GRAPH } },
66 { 0x148, { MM_PACKED, 1152, 864, 8, 8, 16, SEG_GRAPH } },
67 { 0x149, { MM_DIRECT, 1152, 864, 15, 8, 16, SEG_GRAPH } },
68 { 0x14a, { MM_DIRECT, 1152, 864, 16, 8, 16, SEG_GRAPH } },
69 { 0x14b, { MM_DIRECT, 1152, 864, 24, 8, 16, SEG_GRAPH } },
70 { 0x14c, { MM_DIRECT, 1152, 864, 32, 8, 16, SEG_GRAPH } },
71 { 0x178, { MM_DIRECT, 1280, 800, 16, 8, 16, SEG_GRAPH } },
72 { 0x179, { MM_DIRECT, 1280, 800, 24, 8, 16, SEG_GRAPH } },
73 { 0x17a, { MM_DIRECT, 1280, 800, 32, 8, 16, SEG_GRAPH } },
74 { 0x17b, { MM_DIRECT, 1280, 960, 16, 8, 16, SEG_GRAPH } },
75 { 0x17c, { MM_DIRECT, 1280, 960, 24, 8, 16, SEG_GRAPH } },
76 { 0x17d, { MM_DIRECT, 1280, 960, 32, 8, 16, SEG_GRAPH } },
77 { 0x17e, { MM_DIRECT, 1440, 900, 16, 8, 16, SEG_GRAPH } },
78 { 0x17f, { MM_DIRECT, 1440, 900, 24, 8, 16, SEG_GRAPH } },
79 { 0x180, { MM_DIRECT, 1440, 900, 32, 8, 16, SEG_GRAPH } },
80 { 0x181, { MM_DIRECT, 1400, 1050, 16, 8, 16, SEG_GRAPH } },
81 { 0x182, { MM_DIRECT, 1400, 1050, 24, 8, 16, SEG_GRAPH } },
82 { 0x183, { MM_DIRECT, 1400, 1050, 32, 8, 16, SEG_GRAPH } },
83 { 0x184, { MM_DIRECT, 1680, 1050, 16, 8, 16, SEG_GRAPH } },
84 { 0x185, { MM_DIRECT, 1680, 1050, 24, 8, 16, SEG_GRAPH } },
85 { 0x186, { MM_DIRECT, 1680, 1050, 32, 8, 16, SEG_GRAPH } },
86 { 0x187, { MM_DIRECT, 1920, 1200, 16, 8, 16, SEG_GRAPH } },
87 { 0x188, { MM_DIRECT, 1920, 1200, 24, 8, 16, SEG_GRAPH } },
88 { 0x189, { MM_DIRECT, 1920, 1200, 32, 8, 16, SEG_GRAPH } },
89 { 0x18a, { MM_DIRECT, 2560, 1600, 16, 8, 16, SEG_GRAPH } },
90 { 0x18b, { MM_DIRECT, 2560, 1600, 24, 8, 16, SEG_GRAPH } },
91 { 0x18c, { MM_DIRECT, 2560, 1600, 32, 8, 16, SEG_GRAPH } },
94 static int is_bochsvga_mode(struct vgamode_s *vmode_g)
96 return (vmode_g >= &bochsvga_modes[0].info
97 && vmode_g <= &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)-1].info);
100 struct vgamode_s *bochsvga_find_mode(int mode)
102 struct bochsvga_mode *m = bochsvga_modes;
103 for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++)
104 if (GET_GLOBAL(m->mode) == mode)
106 return stdvga_find_mode(mode);
110 bochsvga_list_modes(u16 seg, u16 *dest, u16 *last)
112 struct bochsvga_mode *m = bochsvga_modes;
113 for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)] && dest<last; m++) {
114 u16 mode = GET_GLOBAL(m->mode);
117 SET_FARVAR(seg, *dest, mode);
120 stdvga_list_modes(seg, dest, last);
124 /****************************************************************
126 ****************************************************************/
129 bochsvga_get_window(struct vgamode_s *vmode_g, int window)
133 return dispi_read(VBE_DISPI_INDEX_BANK);
137 bochsvga_set_window(struct vgamode_s *vmode_g, int window, int val)
141 dispi_write(VBE_DISPI_INDEX_BANK, val);
142 if (dispi_read(VBE_DISPI_INDEX_BANK) != val)
148 bochsvga_get_linelength(struct vgamode_s *vmode_g)
150 return dispi_read(VBE_DISPI_INDEX_VIRT_WIDTH) * vga_bpp(vmode_g) / 8;
154 bochsvga_set_linelength(struct vgamode_s *vmode_g, int val)
156 stdvga_set_linelength(vmode_g, val);
157 int pixels = (val * 8) / vga_bpp(vmode_g);
158 dispi_write(VBE_DISPI_INDEX_VIRT_WIDTH, pixels);
163 bochsvga_get_displaystart(struct vgamode_s *vmode_g)
165 int bpp = vga_bpp(vmode_g);
166 int linelength = dispi_read(VBE_DISPI_INDEX_VIRT_WIDTH) * bpp / 8;
167 int x = dispi_read(VBE_DISPI_INDEX_X_OFFSET);
168 int y = dispi_read(VBE_DISPI_INDEX_Y_OFFSET);
169 return x * bpp / 8 + linelength * y;
173 bochsvga_set_displaystart(struct vgamode_s *vmode_g, int val)
175 stdvga_set_displaystart(vmode_g, val);
176 int bpp = vga_bpp(vmode_g);
177 int linelength = dispi_read(VBE_DISPI_INDEX_VIRT_WIDTH) * bpp / 8;
178 dispi_write(VBE_DISPI_INDEX_X_OFFSET, (val % linelength) * 8 / bpp);
179 dispi_write(VBE_DISPI_INDEX_Y_OFFSET, val / linelength);
184 /****************************************************************
186 ****************************************************************/
189 bochsvga_set_mode(struct vgamode_s *vmode_g, int flags)
191 dispi_write(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_DISABLED);
192 if (! is_bochsvga_mode(vmode_g))
193 return stdvga_set_mode(vmode_g, flags);
195 u8 depth = GET_GLOBAL(vmode_g->depth);
197 stdvga_set_mode(stdvga_find_mode(0x6a), 0);
199 // XXX load_dac_palette(3);
202 dispi_write(VBE_DISPI_INDEX_BPP, depth);
203 u16 width = GET_GLOBAL(vmode_g->width);
204 u16 height = GET_GLOBAL(vmode_g->height);
205 dispi_write(VBE_DISPI_INDEX_XRES, width);
206 dispi_write(VBE_DISPI_INDEX_YRES, height);
207 dispi_write(VBE_DISPI_INDEX_BANK, 0);
208 u16 bf = ((flags & MF_NOCLEARMEM ? VBE_DISPI_NOCLEARMEM : 0)
209 | (flags & MF_LINEARFB ? VBE_DISPI_LFB_ENABLED : 0));
210 dispi_write(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_ENABLED | bf);
212 /* VGA compat setup */
213 u16 crtc_addr = VGAREG_VGA_CRTC_ADDRESS;
214 stdvga_crtc_write(crtc_addr, 0x11, 0x00);
215 stdvga_crtc_write(crtc_addr, 0x01, width / 8 - 1);
216 stdvga_set_linelength(vmode_g, width);
217 stdvga_crtc_write(crtc_addr, 0x12, height - 1);
219 if ((height - 1) & 0x0100)
221 if ((height - 1) & 0x0200)
223 stdvga_crtc_mask(crtc_addr, 0x07, 0x42, v);
225 stdvga_crtc_write(crtc_addr, 0x09, 0x00);
226 stdvga_crtc_mask(crtc_addr, 0x17, 0x00, 0x03);
227 stdvga_attr_mask(0x10, 0x00, 0x01);
228 stdvga_grdc_write(0x06, 0x05);
229 stdvga_sequ_write(0x02, 0x0f);
231 stdvga_crtc_mask(crtc_addr, 0x14, 0x00, 0x40);
232 stdvga_attr_mask(0x10, 0x00, 0x40);
233 stdvga_sequ_mask(0x04, 0x00, 0x08);
234 stdvga_grdc_mask(0x05, 0x20, 0x40);
241 /****************************************************************
243 ****************************************************************/
248 int ret = stdvga_init();
253 dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID0);
254 if (dispi_read(VBE_DISPI_INDEX_ID) != VBE_DISPI_ID0) {
255 dprintf(1, "No VBE DISPI interface detected\n");
259 dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID5);
261 if (GET_GLOBAL(HaveRunInit))
264 u32 lfb_addr = VBE_DISPI_LFB_PHYSICAL_ADDRESS;
265 int bdf = GET_GLOBAL(VgaBDF);
266 if (CONFIG_VGA_PCI && bdf >= 0) {
268 u32 bar = pci_config_readl(bdf, PCI_BASE_ADDRESS_0);
269 if ((bar & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
271 bar = pci_config_readl(bdf, PCI_BASE_ADDRESS_1);
273 lfb_addr = bar & PCI_BASE_ADDRESS_MEM_MASK;
274 dprintf(1, "VBE DISPI: bdf %02x:%02x.%x, bar %d\n", pci_bdf_to_bus(bdf)
275 , pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf), barid);
278 SET_VGA(VBE_framebuffer, lfb_addr);
279 u32 totalmem = dispi_read(VBE_DISPI_INDEX_VIDEO_MEMORY_64K) * 64 * 1024;
280 SET_VGA(VBE_total_memory, totalmem);
281 SET_VGA(VBE_capabilities, VBE_CAPABILITY_8BIT_DAC);
283 dprintf(1, "VBE DISPI: lfb_addr=%x, size %d MB\n",
284 lfb_addr, totalmem / 16);
287 u16 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
288 dispi_write(VBE_DISPI_INDEX_ENABLE, en | VBE_DISPI_GETCAPS);
289 u16 max_xres = dispi_read(VBE_DISPI_INDEX_XRES);
290 u16 max_bpp = dispi_read(VBE_DISPI_INDEX_BPP);
291 dispi_write(VBE_DISPI_INDEX_ENABLE, en);
292 struct bochsvga_mode *m = bochsvga_modes;
293 for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++) {
294 u16 width = GET_GLOBAL(m->info.width);
295 u16 height = GET_GLOBAL(m->info.height);
296 u8 depth = GET_GLOBAL(m->info.depth);
297 u32 mem = (height * DIV_ROUND_UP(width * vga_bpp(&m->info), 8)
298 * 4 / stdvga_bpp_factor(&m->info));
300 if (width > max_xres || depth > max_bpp || mem > totalmem) {
301 dprintf(1, "Removing mode %x\n", GET_GLOBAL(m->mode));
302 SET_VGA(m->mode, 0xffff);