1 // Code for handling UHCI USB controllers.
3 // Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
5 // This file may be distributed under the terms of the GNU LGPLv3 license.
7 #include "util.h" // dprintf
8 #include "pci.h" // pci_bdf_to_bus
9 #include "config.h" // CONFIG_*
10 #include "ioport.h" // outw
11 #include "usb-uhci.h" // USBLEGSUP
12 #include "pci_regs.h" // PCI_BASE_ADDRESS_4
13 #include "usb.h" // struct usb_s
14 #include "farptr.h" // GET_FLATPTR
17 reset_uhci(struct usb_s *cntl)
19 // XXX - don't reset if not needed.
22 pci_config_writew(cntl->bdf, USBLEGSUP, USBLEGSUP_RWC);
25 outw(USBCMD_HCRESET, cntl->uhci.iobase + USBCMD);
28 // Disable interrupts and commands (just to be safe).
29 outw(0, cntl->uhci.iobase + USBINTR);
30 outw(0, cntl->uhci.iobase + USBCMD);
34 configure_uhci(struct usb_s *cntl)
36 // Allocate ram for schedule storage
37 struct uhci_td *term_td = malloc_high(sizeof(*term_td));
38 struct uhci_framelist *fl = memalign_high(sizeof(*fl), sizeof(*fl));
39 struct uhci_qh *intr_qh = malloc_high(sizeof(*intr_qh));
40 struct uhci_qh *data_qh = malloc_high(sizeof(*data_qh));
41 struct uhci_qh *term_qh = malloc_high(sizeof(*term_qh));
42 if (!term_td || !fl || !intr_qh || !data_qh || !term_qh) {
48 dprintf(1, "No ram for uhci init\n");
52 // Work around for PIIX errata
53 memset(term_td, 0, sizeof(*term_td));
54 term_td->link = UHCI_PTR_TERM;
55 term_td->token = (uhci_explen(0) | (0x7f << TD_TOKEN_DEVADDR_SHIFT)
57 memset(term_qh, 0, sizeof(*term_qh));
58 term_qh->element = (u32)term_td;
59 term_qh->link = UHCI_PTR_TERM;
61 // Setup primary queue head.
62 memset(data_qh, 0, sizeof(*data_qh));
63 data_qh->element = UHCI_PTR_TERM;
64 data_qh->link = (u32)term_qh | UHCI_PTR_QH;
65 cntl->uhci.qh = data_qh;
67 // Set schedule to point to primary intr queue head
68 memset(intr_qh, 0, sizeof(*intr_qh));
69 intr_qh->element = UHCI_PTR_TERM;
70 intr_qh->link = (u32)data_qh | UHCI_PTR_QH;
72 for (i=0; i<ARRAY_SIZE(fl->links); i++)
73 fl->links[i] = (u32)intr_qh | UHCI_PTR_QH;
74 cntl->uhci.framelist = fl;
76 // Set the frame length to the default: 1 ms exactly
77 outb(USBSOF_DEFAULT, cntl->uhci.iobase + USBSOF);
79 // Store the frame list base address
80 outl((u32)fl->links, cntl->uhci.iobase + USBFLBASEADD);
82 // Set the current frame number
83 outw(0, cntl->uhci.iobase + USBFRNUM);
87 start_uhci(struct usb_s *cntl)
89 // Mark as configured and running with a 64-byte max packet.
90 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, cntl->uhci.iobase + USBCMD);
93 // Find any devices connected to the root hub.
95 check_ports(struct usb_s *cntl)
97 u16 port1 = inw(cntl->uhci.iobase + USBPORTSC1);
98 u16 port2 = inw(cntl->uhci.iobase + USBPORTSC2);
100 if (!((port1 & USBPORTSC_CCS) || (port2 & USBPORTSC_CCS)))
105 if (port1 & USBPORTSC_CCS)
106 outw(USBPORTSC_PR, cntl->uhci.iobase + USBPORTSC1);
107 if (port2 & USBPORTSC_CCS)
108 outw(USBPORTSC_PR, cntl->uhci.iobase + USBPORTSC2);
109 msleep(USB_TIME_DRSTR);
110 outw(0, cntl->uhci.iobase + USBPORTSC1);
111 outw(0, cntl->uhci.iobase + USBPORTSC2);
112 msleep(USB_TIME_RSTRCY);
116 port1 = inw(cntl->uhci.iobase + USBPORTSC1);
117 if (port1 & USBPORTSC_CCS) {
118 outw(USBPORTSC_PE, cntl->uhci.iobase + USBPORTSC1);
119 int count = configure_usb_device(cntl, !!(port1 & USBPORTSC_LSDA));
121 outw(0, cntl->uhci.iobase + USBPORTSC1);
124 port2 = inw(cntl->uhci.iobase + USBPORTSC2);
125 if (port2 & USBPORTSC_CCS) {
126 outw(USBPORTSC_PE, cntl->uhci.iobase + USBPORTSC2);
127 int count = configure_usb_device(cntl, !!(port2 & USBPORTSC_LSDA));
129 outw(0, cntl->uhci.iobase + USBPORTSC2);
136 uhci_init(void *data)
138 if (! CONFIG_USB_UHCI)
140 struct usb_s *cntl = data;
142 // XXX - don't call pci_config_XXX from a thread
143 cntl->type = USB_TYPE_UHCI;
144 cntl->uhci.iobase = (pci_config_readl(cntl->bdf, PCI_BASE_ADDRESS_4)
145 & PCI_BASE_ADDRESS_IO_MASK);
147 dprintf(3, "UHCI init on dev %02x:%02x.%x (io=%x)\n"
148 , pci_bdf_to_bus(cntl->bdf), pci_bdf_to_dev(cntl->bdf)
149 , pci_bdf_to_fn(cntl->bdf), cntl->uhci.iobase);
151 pci_config_maskw(cntl->bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
154 configure_uhci(cntl);
157 int count = check_ports(cntl);
159 // XXX - no devices; free data structures.
164 wait_qh(struct usb_s *cntl, struct uhci_qh *qh)
166 // XXX - 500ms just a guess
167 u64 end = calc_future_tsc(500);
169 if (qh->element & UHCI_PTR_TERM)
171 if (check_time(end)) {
172 struct uhci_td *td = (void*)(qh->element & ~UHCI_PTR_BITS);
173 dprintf(1, "Timeout on wait_qh %p (td=%p s=%x c=%x/%x)\n"
175 , inw(cntl->uhci.iobase + USBCMD)
176 , inw(cntl->uhci.iobase + USBSTS));
184 uhci_control(u32 endp, int dir, const void *cmd, int cmdsize
185 , void *data, int datasize)
187 if (! CONFIG_USB_UHCI)
190 dprintf(5, "uhci_control %x\n", endp);
191 struct usb_s *cntl = endp2cntl(endp);
192 int maxpacket = endp2maxsize(endp);
193 int lowspeed = endp2speed(endp);
194 int devaddr = endp2devaddr(endp) | (endp2ep(endp) << 7);
196 // Setup transfer descriptors
197 int count = 2 + DIV_ROUND_UP(datasize, maxpacket);
198 struct uhci_td *tds = malloc_tmphigh(sizeof(*tds) * count);
200 tds[0].link = (u32)&tds[1] | UHCI_PTR_DEPTH;
201 tds[0].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
203 tds[0].token = (uhci_explen(cmdsize) | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
205 tds[0].buffer = (void*)cmd;
206 int toggle = TD_TOKEN_TOGGLE;
208 for (i=1; i<count-1; i++) {
209 tds[i].link = (u32)&tds[i+1] | UHCI_PTR_DEPTH;
210 tds[i].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
212 int len = (i == count-2 ? (datasize - (i-1)*maxpacket) : maxpacket);
213 tds[i].token = (uhci_explen(len) | toggle
214 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
215 | (dir ? USB_PID_IN : USB_PID_OUT));
216 tds[i].buffer = data + (i-1) * maxpacket;
217 toggle ^= TD_TOKEN_TOGGLE;
219 tds[i].link = UHCI_PTR_TERM;
220 tds[i].status = (uhci_maxerr(0) | (lowspeed ? TD_CTRL_LS : 0)
222 tds[i].token = (uhci_explen(0) | TD_TOKEN_TOGGLE
223 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
224 | (dir ? USB_PID_OUT : USB_PID_IN));
228 struct uhci_qh *data_qh = cntl->uhci.qh;
229 data_qh->element = (u32)&tds[0];
230 int ret = wait_qh(cntl, data_qh);
232 data_qh->element = UHCI_PTR_TERM;
241 uhci_alloc_intr_pipe(u32 endp, int frameexp)
243 if (! CONFIG_USB_UHCI)
246 dprintf(7, "uhci_alloc_intr_pipe %x %d\n", endp, frameexp);
249 struct usb_s *cntl = endp2cntl(endp);
250 int maxpacket = endp2maxsize(endp);
251 int lowspeed = endp2speed(endp);
252 int devaddr = endp2devaddr(endp) | (endp2ep(endp) << 7);
253 // Determine number of entries needed for 2 timer ticks.
254 int ms = 1<<frameexp;
255 int count = DIV_ROUND_UP(PIT_TICK_INTERVAL * 1000 * 2, PIT_TICK_RATE * ms);
256 struct uhci_qh *qh = malloc_low(sizeof(*qh));
257 struct uhci_td *tds = malloc_low(sizeof(*tds) * count);
258 if (!qh || !tds || maxpacket > sizeof(tds[0].data)) {
263 qh->element = (u32)tds;
266 for (i=0; i<count; i++) {
267 tds[i].link = (i==count-1 ? (u32)&tds[0] : (u32)&tds[i+1]);
268 tds[i].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
270 tds[i].token = (uhci_explen(maxpacket) | toggle
271 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
273 tds[i].buffer = &tds[i].data;
274 toggle ^= TD_TOKEN_TOGGLE;
277 qh->next_td = &tds[0];
278 qh->pipe.endp = endp;
280 // Add to interrupt schedule.
281 struct uhci_framelist *fl = cntl->uhci.framelist;
283 // Add to existing interrupt entry.
284 struct uhci_qh *intr_qh = (void*)(fl->links[0] & ~UHCI_PTR_BITS);
285 qh->link = intr_qh->link;
286 intr_qh->link = (u32)qh | UHCI_PTR_QH;
288 int startpos = 1<<(frameexp-1);
289 qh->link = fl->links[startpos];
290 for (i=startpos; i<ARRAY_SIZE(fl->links); i+=ms)
291 fl->links[i] = (u32)qh | UHCI_PTR_QH;
298 uhci_poll_intr(struct usb_pipe *pipe, void *data)
301 if (! CONFIG_USB_UHCI)
304 struct uhci_qh *qh = container_of(pipe, struct uhci_qh, pipe);
305 struct uhci_td *td = GET_FLATPTR(qh->next_td);
306 u32 status = GET_FLATPTR(td->status);
307 u32 token = GET_FLATPTR(td->token);
308 if (status & TD_CTRL_ACTIVE)
311 // XXX - check for errors.
314 memcpy_far(GET_SEG(SS), data
315 , FLATPTR_TO_SEG(td->data), (void*)FLATPTR_TO_OFFSET(td->data)
316 , uhci_expected_length(token));
319 u32 next = GET_FLATPTR(td->link);
320 SET_FLATPTR(td->status, (uhci_maxerr(0) | (status & TD_CTRL_LS)
322 SET_FLATPTR(qh->next_td, (void*)(next & ~UHCI_PTR_BITS));