1 // Code for handling UHCI USB controllers.
3 // Copyright (C) 2009 Kevin O'Connor <kevin@koconnor.net>
5 // This file may be distributed under the terms of the GNU LGPLv3 license.
7 #include "util.h" // dprintf
8 #include "pci.h" // pci_bdf_to_bus
9 #include "config.h" // CONFIG_*
10 #include "ioport.h" // outw
11 #include "usb-uhci.h" // USBLEGSUP
12 #include "pci_regs.h" // PCI_BASE_ADDRESS_4
13 #include "usb.h" // struct usb_s
14 #include "farptr.h" // GET_FLATPTR
17 reset_uhci(struct usb_s *cntl)
19 // XXX - don't reset if not needed.
22 pci_config_writew(cntl->bdf, USBLEGSUP, USBLEGSUP_RWC);
25 outw(USBCMD_HCRESET, cntl->uhci.iobase + USBCMD);
28 // Disable interrupts and commands (just to be safe).
29 outw(0, cntl->uhci.iobase + USBINTR);
30 outw(0, cntl->uhci.iobase + USBCMD);
34 configure_uhci(struct usb_s *cntl)
36 // Allocate ram for schedule storage
37 struct uhci_td *term_td = malloc_high(sizeof(*term_td));
38 struct uhci_framelist *fl = memalign_high(sizeof(*fl), sizeof(*fl));
39 struct uhci_qh *intr_qh = malloc_high(sizeof(*intr_qh));
40 struct uhci_qh *data_qh = malloc_high(sizeof(*data_qh));
41 struct uhci_qh *term_qh = malloc_high(sizeof(*term_qh));
42 if (!term_td || !fl || !intr_qh || !data_qh || !term_qh) {
52 // Work around for PIIX errata
53 memset(term_td, 0, sizeof(*term_td));
54 term_td->link = UHCI_PTR_TERM;
55 term_td->token = (uhci_explen(0) | (0x7f << TD_TOKEN_DEVADDR_SHIFT)
57 memset(term_qh, 0, sizeof(*term_qh));
58 term_qh->element = (u32)term_td;
59 term_qh->link = UHCI_PTR_TERM;
61 // Setup primary queue head.
62 memset(data_qh, 0, sizeof(*data_qh));
63 data_qh->element = UHCI_PTR_TERM;
64 data_qh->link = (u32)term_qh | UHCI_PTR_QH;
65 cntl->uhci.qh = data_qh;
67 // Set schedule to point to primary intr queue head
68 memset(intr_qh, 0, sizeof(*intr_qh));
69 intr_qh->element = UHCI_PTR_TERM;
70 intr_qh->link = (u32)data_qh | UHCI_PTR_QH;
72 for (i=0; i<ARRAY_SIZE(fl->links); i++)
73 fl->links[i] = (u32)intr_qh | UHCI_PTR_QH;
74 cntl->uhci.framelist = fl;
77 // Set the frame length to the default: 1 ms exactly
78 outb(USBSOF_DEFAULT, cntl->uhci.iobase + USBSOF);
80 // Store the frame list base address
81 outl((u32)fl->links, cntl->uhci.iobase + USBFLBASEADD);
83 // Set the current frame number
84 outw(0, cntl->uhci.iobase + USBFRNUM);
88 start_uhci(struct usb_s *cntl)
90 // Mark as configured and running with a 64-byte max packet.
91 outw(USBCMD_RS | USBCMD_CF | USBCMD_MAXP, cntl->uhci.iobase + USBCMD);
94 // Find any devices connected to the root hub.
96 check_ports(struct usb_s *cntl)
98 // XXX - if just powered up, need to wait for USB_TIME_SIGATT?
99 u16 port1 = inw(cntl->uhci.iobase + USBPORTSC1);
100 u16 port2 = inw(cntl->uhci.iobase + USBPORTSC2);
102 if (!((port1 & USBPORTSC_CCS) || (port2 & USBPORTSC_CCS)))
106 // XXX - if just powered up, need to wait for USB_TIME_ATTDB?
109 if (port1 & USBPORTSC_CCS)
110 outw(USBPORTSC_PR, cntl->uhci.iobase + USBPORTSC1);
111 if (port2 & USBPORTSC_CCS)
112 outw(USBPORTSC_PR, cntl->uhci.iobase + USBPORTSC2);
113 msleep(USB_TIME_DRSTR);
117 outw(0, cntl->uhci.iobase + USBPORTSC1);
118 udelay(6); // 64 high-speed bit times
119 port1 = inw(cntl->uhci.iobase + USBPORTSC1);
120 if (port1 & USBPORTSC_CCS) {
121 outw(USBPORTSC_PE, cntl->uhci.iobase + USBPORTSC1);
122 msleep(USB_TIME_RSTRCY);
123 int count = configure_usb_device(cntl, !!(port1 & USBPORTSC_LSDA));
125 outw(0, cntl->uhci.iobase + USBPORTSC1);
128 outw(0, cntl->uhci.iobase + USBPORTSC2);
130 port2 = inw(cntl->uhci.iobase + USBPORTSC2);
131 if (port2 & USBPORTSC_CCS) {
132 outw(USBPORTSC_PE, cntl->uhci.iobase + USBPORTSC2);
133 msleep(USB_TIME_RSTRCY);
134 int count = configure_usb_device(cntl, !!(port2 & USBPORTSC_LSDA));
136 outw(0, cntl->uhci.iobase + USBPORTSC2);
143 uhci_init(void *data)
145 if (! CONFIG_USB_UHCI)
147 struct usb_s *cntl = data;
149 // XXX - don't call pci_config_XXX from a thread
150 cntl->type = USB_TYPE_UHCI;
151 cntl->uhci.iobase = (pci_config_readl(cntl->bdf, PCI_BASE_ADDRESS_4)
152 & PCI_BASE_ADDRESS_IO_MASK);
154 dprintf(3, "UHCI init on dev %02x:%02x.%x (io=%x)\n"
155 , pci_bdf_to_bus(cntl->bdf), pci_bdf_to_dev(cntl->bdf)
156 , pci_bdf_to_fn(cntl->bdf), cntl->uhci.iobase);
158 pci_config_maskw(cntl->bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
161 configure_uhci(cntl);
164 int count = check_ports(cntl);
166 // XXX - no devices; free data structures.
171 wait_qh(struct usb_s *cntl, struct uhci_qh *qh)
173 // XXX - 500ms just a guess
174 u64 end = calc_future_tsc(500);
176 if (qh->element & UHCI_PTR_TERM)
178 if (check_time(end)) {
180 struct uhci_td *td = (void*)(qh->element & ~UHCI_PTR_BITS);
181 dprintf(1, "Timeout on wait_qh %p (td=%p s=%x c=%x/%x)\n"
183 , inw(cntl->uhci.iobase + USBCMD)
184 , inw(cntl->uhci.iobase + USBSTS));
194 // XXX - implement real tick detection.
199 uhci_control(u32 endp, int dir, const void *cmd, int cmdsize
200 , void *data, int datasize)
202 if (! CONFIG_USB_UHCI)
205 dprintf(5, "uhci_control %x\n", endp);
206 struct usb_s *cntl = endp2cntl(endp);
207 int maxpacket = endp2maxsize(endp);
208 int lowspeed = endp2speed(endp);
209 int devaddr = endp2devaddr(endp) | (endp2ep(endp) << 7);
211 // Setup transfer descriptors
212 int count = 2 + DIV_ROUND_UP(datasize, maxpacket);
213 struct uhci_td *tds = malloc_tmphigh(sizeof(*tds) * count);
215 tds[0].link = (u32)&tds[1] | UHCI_PTR_DEPTH;
216 tds[0].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
218 tds[0].token = (uhci_explen(cmdsize) | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
220 tds[0].buffer = (void*)cmd;
221 int toggle = TD_TOKEN_TOGGLE;
223 for (i=1; i<count-1; i++) {
224 tds[i].link = (u32)&tds[i+1] | UHCI_PTR_DEPTH;
225 tds[i].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
227 int len = (i == count-2 ? (datasize - (i-1)*maxpacket) : maxpacket);
228 tds[i].token = (uhci_explen(len) | toggle
229 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
230 | (dir ? USB_PID_IN : USB_PID_OUT));
231 tds[i].buffer = data + (i-1) * maxpacket;
232 toggle ^= TD_TOKEN_TOGGLE;
234 tds[i].link = UHCI_PTR_TERM;
235 tds[i].status = (uhci_maxerr(0) | (lowspeed ? TD_CTRL_LS : 0)
237 tds[i].token = (uhci_explen(0) | TD_TOKEN_TOGGLE
238 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
239 | (dir ? USB_PID_OUT : USB_PID_IN));
243 struct uhci_qh *data_qh = cntl->uhci.qh;
245 data_qh->element = (u32)&tds[0];
246 int ret = wait_qh(cntl, data_qh);
248 data_qh->element = UHCI_PTR_TERM;
256 uhci_alloc_intr_pipe(u32 endp, int frameexp)
258 if (! CONFIG_USB_UHCI)
261 dprintf(7, "uhci_alloc_intr_pipe %x %d\n", endp, frameexp);
264 struct usb_s *cntl = endp2cntl(endp);
265 int maxpacket = endp2maxsize(endp);
266 int lowspeed = endp2speed(endp);
267 int devaddr = endp2devaddr(endp) | (endp2ep(endp) << 7);
268 // Determine number of entries needed for 2 timer ticks.
269 int ms = 1<<frameexp;
270 int count = DIV_ROUND_UP(PIT_TICK_INTERVAL * 1000 * 2, PIT_TICK_RATE * ms);
271 struct uhci_qh *qh = malloc_low(sizeof(*qh));
272 struct uhci_td *tds = malloc_low(sizeof(*tds) * count);
277 if (maxpacket > sizeof(tds[0].data))
279 qh->element = (u32)tds;
282 for (i=0; i<count; i++) {
283 tds[i].link = (i==count-1 ? (u32)&tds[0] : (u32)&tds[i+1]);
284 tds[i].status = (uhci_maxerr(3) | (lowspeed ? TD_CTRL_LS : 0)
286 tds[i].token = (uhci_explen(maxpacket) | toggle
287 | (devaddr << TD_TOKEN_DEVADDR_SHIFT)
289 tds[i].buffer = &tds[i].data;
290 toggle ^= TD_TOKEN_TOGGLE;
293 qh->next_td = &tds[0];
294 qh->pipe.endp = endp;
296 // Add to interrupt schedule.
297 struct uhci_framelist *fl = cntl->uhci.framelist;
299 // Add to existing interrupt entry.
300 struct uhci_qh *intr_qh = (void*)(fl->links[0] & ~UHCI_PTR_BITS);
301 qh->link = intr_qh->link;
303 intr_qh->link = (u32)qh | UHCI_PTR_QH;
305 int startpos = 1<<(frameexp-1);
306 qh->link = fl->links[startpos];
308 for (i=startpos; i<ARRAY_SIZE(fl->links); i+=ms)
309 fl->links[i] = (u32)qh | UHCI_PTR_QH;
320 uhci_poll_intr(struct usb_pipe *pipe, void *data)
323 if (! CONFIG_USB_UHCI)
326 struct uhci_qh *qh = container_of(pipe, struct uhci_qh, pipe);
327 struct uhci_td *td = GET_FLATPTR(qh->next_td);
328 u32 status = GET_FLATPTR(td->status);
329 u32 token = GET_FLATPTR(td->token);
330 if (status & TD_CTRL_ACTIVE)
333 // XXX - check for errors.
336 memcpy_far(GET_SEG(SS), data
337 , FLATPTR_TO_SEG(td->data), (void*)FLATPTR_TO_OFFSET(td->data)
338 , uhci_expected_length(token));
341 u32 next = GET_FLATPTR(td->link);
343 SET_FLATPTR(td->status, (uhci_maxerr(0) | (status & TD_CTRL_LS)
345 SET_FLATPTR(qh->next_td, (void*)(next & ~UHCI_PTR_BITS));